From: Binbin Wu <binbin.wu@linux.intel.com>
To: Xiaoyao Li <xiaoyao.li@intel.com>,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Cc: seanjc@google.com, pbonzini@redhat.com,
dave.hansen@linux.intel.com, andrew.cooper3@citrix.com,
nik.borisov@suse.com, kas@kernel.org, rick.p.edgecombe@intel.com,
chao.gao@intel.com
Subject: Re: [PATCH v3 3/4] KVM: TDX: Filter configurable CPUID bits
Date: Thu, 3 Sep 2026 16:23:07 +0800 [thread overview]
Message-ID: <8a302351-43fd-4d08-b27b-c30e2be3dff3@linux.intel.com> (raw)
In-Reply-To: <96aaabba-678b-4dc9-bf96-a01c605dad04@intel.com>
On 9/3/2026 4:04 PM, Xiaoyao Li wrote:
>> +static u32 tdx_cfg_non_feature_mask(u32 function, u32 index, int reg)
>> {
>> - if (has_tsx(entry))
>> - clear_tsx(entry);
>> + /*
>> + * For a leaf/subleaf/register that will never be repurposed to hold
>> + * feature bits, it's safe to return TDX_CPUID_ALL_ALLOWED_MASK, i.e.
>> + * leave the TDX module's CPUID config mask intact.
>> + */
>
> I don't think blindly return TDX_CPUID_ALL_ALLOWED_MASK, i.e. all-1s, is a
> good idea. It's just like the current behavior that KVM doesn't gate
> anything and allows userspace to set anything that is allowed by TDX
> module. For example, ...
Sean suggested that "Realistically, CPUID.0x1.E{A,B}X are never going to be
repurposed to hold feature bits, and so generating a mask of allowed bits adds
unnecessary cognitive load and maintenance. Ditto for CPUID 0x4, 0x18, and 0x1F."
https://lore.kernel.org/kvm/aj1fi_0SBxMK5WOB@google.com/
And I added 0x80000008.EAX as well.
>
>> + switch (function) {
>> + case 1:
>> + if (reg == CPUID_EAX || reg == CPUID_EBX)
>> + return TDX_CPUID_ALL_ALLOWED_MASK;
>
> ... TDX module returns 0x0fff3fff for CPUID.1.EAX currently. If KVM makes
> the mask as all-1s, then if in the future the reserved field [15:14] and
> [31:28] are defined for new things and new TDX module starts to report them
> as configurable, then the bits will be configurable by userspace on old
> kernels while we don't know if its safe for KVM/kernel.
>
>> + return 0;
>> + case 4:
>> + case 0x18:
>> + case 0x1f:
>> + return TDX_CPUID_ALL_ALLOWED_MASK;
>> + case 0x24:
>> + if (index == 0 && reg == CPUID_EBX)
>> + return GENMASK_U32(7, 0);
>> + return 0;
>> + case 0x80000008:
>> + if (reg == CPUID_EAX)
>> + return TDX_CPUID_ALL_ALLOWED_MASK;
>> + return 0;
>> + default:
>> + return 0;
>> + }
>> +}
>
next prev parent reply other threads:[~2026-09-03 8:23 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-27 3:18 [PATCH v3 0/4] KVM: TDX: Validate directly configurable CPUID bits Binbin Wu
2026-08-27 3:18 ` [PATCH v3 1/4] KVM: TDX: Track configurable CPUID bits allowed by KVM Binbin Wu
2026-09-01 6:29 ` Tony Lindgren
2026-09-01 8:23 ` Binbin Wu
2026-09-01 8:27 ` Tony Lindgren
2026-09-01 14:35 ` Xiaoyao Li
2026-09-02 0:33 ` Binbin Wu
2026-09-02 15:09 ` Xiaoyao Li
2026-09-02 16:19 ` Binbin Wu
2026-09-02 16:22 ` Edgecombe, Rick P
2026-09-02 16:25 ` Binbin Wu
2026-09-03 7:28 ` Xiaoyao Li
2026-09-03 8:57 ` Binbin Wu
2026-09-08 21:13 ` Edgecombe, Rick P
2026-09-09 16:39 ` Xiaoyao Li
2026-09-09 22:29 ` Sean Christopherson
2026-09-09 23:18 ` Edgecombe, Rick P
2026-09-10 2:39 ` Binbin Wu
2026-09-10 2:53 ` Xiaoyao Li
2026-09-08 21:15 ` Edgecombe, Rick P
2026-08-27 3:18 ` [PATCH v3 2/4] KVM: TDX: Report CORE_CAPABILITIES as configurable Binbin Wu
2026-09-01 6:45 ` Tony Lindgren
2026-09-02 17:43 ` Kishen Maloor
2026-09-03 2:22 ` Binbin Wu
2026-09-03 6:10 ` Kishen Maloor
2026-09-03 8:12 ` Binbin Wu
2026-08-27 3:18 ` [PATCH v3 3/4] KVM: TDX: Filter configurable CPUID bits Binbin Wu
2026-09-01 6:44 ` Tony Lindgren
2026-09-01 8:42 ` Binbin Wu
2026-09-01 9:09 ` Tony Lindgren
2026-09-03 8:04 ` Xiaoyao Li
2026-09-03 8:23 ` Binbin Wu [this message]
2026-08-27 3:18 ` [PATCH v3 4/4] KVM: TDX: Validate userspace CPUID input for KVM_TDX_INIT_VM Binbin Wu
2026-08-27 3:24 ` sashiko-bot
2026-08-27 7:25 ` Binbin Wu
2026-09-01 6:47 ` Tony Lindgren
2026-08-27 19:33 ` [PATCH v3 0/4] KVM: TDX: Validate directly configurable CPUID bits Edgecombe, Rick P
2026-08-28 3:19 ` Binbin Wu
2026-08-28 16:58 ` Edgecombe, Rick P
2026-08-31 5:01 ` Binbin Wu
2026-09-01 9:42 ` Xiaoyao Li
2026-09-01 10:21 ` Xiaoyao Li
2026-09-02 16:09 ` Edgecombe, Rick P
2026-09-02 16:21 ` Binbin Wu
2026-09-09 1:46 ` Binbin Wu
2026-09-01 9:38 ` Xiaoyao Li
2026-09-01 17:41 ` Edgecombe, Rick P
2026-09-02 10:29 ` Xiaoyao Li
2026-09-02 13:13 ` Edgecombe, Rick P
2026-09-02 13:39 ` Xiaoyao Li
2026-09-02 13:53 ` Edgecombe, Rick P
2026-09-02 14:21 ` Xiaoyao Li
2026-09-02 16:26 ` Binbin Wu
2026-09-08 9:42 ` Artem Bityutskiy
2026-09-09 0:04 ` Binbin Wu
2026-09-08 20:30 ` Artem Bityutskiy
2026-09-08 22:31 ` Edgecombe, Rick P
2026-09-09 6:52 ` Artem Bityutskiy
2026-09-09 8:48 ` Binbin Wu
2026-09-09 11:20 ` Artem Bityutskiy
2026-09-10 2:54 ` Binbin Wu
2026-09-08 23:54 ` Binbin Wu
2026-09-09 5:37 ` Binbin Wu
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