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From: "Edgecombe, Rick P" <rick.p.edgecombe@intel.com>
To: "Li, Xiaoyao" <xiaoyao.li@intel.com>,
	"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"binbin.wu@linux.intel.com" <binbin.wu@linux.intel.com>
Cc: "Gao, Chao" <chao.gao@intel.com>,
	"pbonzini@redhat.com" <pbonzini@redhat.com>,
	"nik.borisov@suse.com" <nik.borisov@suse.com>,
	"kas@kernel.org" <kas@kernel.org>,
	"seanjc@google.com" <seanjc@google.com>,
	"andrew.cooper3@citrix.com" <andrew.cooper3@citrix.com>,
	"dave.hansen@linux.intel.com" <dave.hansen@linux.intel.com>
Subject: Re: [PATCH v3 0/4] KVM: TDX: Validate directly configurable CPUID bits
Date: Wed, 2 Sep 2026 13:53:23 +0000	[thread overview]
Message-ID: <9920cbdf0f5f0114fba0e1eb2bb2931c249e9c41.camel@intel.com> (raw)
In-Reply-To: <f4594d40-cc15-41c8-99f1-2db590bba2ef@intel.com>

On Wed, 2026-09-02 at 21:39 +0800, Xiaoyao Li wrote:
> > I don't think they have agreed to it yet (Binbin?), but I think it mostly
> > works this way already. Why do you think it is a burden on TDX module
> > developers?
> 
> Because it can bring confusion to TDX module developers. VM_EXIT_LOAD_XXX
> control is used by SEAM VMCS to load states for TDX module execution context.
> And I think for most features SEAM VMCS doesn't set it (I don't check it
> though).
> 
> SEAMCALL is kind of a VM exit, and SEAMRET is kind of a VM entry. To
> automatically save and restore the host state, what TDX needs are
> VM_EXIT_SAVE_XXX, VM_ENTRY_LOAD_XXX, and vmcs guest state for XXX.

I'd think we could avoid adding options for configuration that won't be used. If
we did have a clobber control interface, matching VMX bits is an interesting
idea.

I'm a bit torn between wanting to fix the area once and for all with a full
solution, and wanting to get this increasingly blocking CPUID bit fix in. I'm
leaning towards just do the bit filtering and give the save/restore guidelines.

Then we can do a save/restore control later if we find the guidelines are not
sufficient.


  reply	other threads:[~2026-09-02 13:53 UTC|newest]

Thread overview: 63+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-27  3:18 [PATCH v3 0/4] KVM: TDX: Validate directly configurable CPUID bits Binbin Wu
2026-08-27  3:18 ` [PATCH v3 1/4] KVM: TDX: Track configurable CPUID bits allowed by KVM Binbin Wu
2026-09-01  6:29   ` Tony Lindgren
2026-09-01  8:23     ` Binbin Wu
2026-09-01  8:27       ` Tony Lindgren
2026-09-01 14:35   ` Xiaoyao Li
2026-09-02  0:33     ` Binbin Wu
2026-09-02 15:09       ` Xiaoyao Li
2026-09-02 16:19         ` Binbin Wu
2026-09-02 16:22           ` Edgecombe, Rick P
2026-09-02 16:25             ` Binbin Wu
2026-09-03  7:28           ` Xiaoyao Li
2026-09-03  8:57             ` Binbin Wu
2026-09-08 21:13             ` Edgecombe, Rick P
2026-09-09 16:39               ` Xiaoyao Li
2026-09-09 22:29                 ` Sean Christopherson
2026-09-09 23:18                   ` Edgecombe, Rick P
2026-09-10  2:39                     ` Binbin Wu
2026-09-10  2:53                     ` Xiaoyao Li
2026-09-08 21:15         ` Edgecombe, Rick P
2026-08-27  3:18 ` [PATCH v3 2/4] KVM: TDX: Report CORE_CAPABILITIES as configurable Binbin Wu
2026-09-01  6:45   ` Tony Lindgren
2026-09-02 17:43   ` Kishen Maloor
2026-09-03  2:22     ` Binbin Wu
2026-09-03  6:10       ` Kishen Maloor
2026-09-03  8:12         ` Binbin Wu
2026-08-27  3:18 ` [PATCH v3 3/4] KVM: TDX: Filter configurable CPUID bits Binbin Wu
2026-09-01  6:44   ` Tony Lindgren
2026-09-01  8:42     ` Binbin Wu
2026-09-01  9:09       ` Tony Lindgren
2026-09-03  8:04   ` Xiaoyao Li
2026-09-03  8:23     ` Binbin Wu
2026-08-27  3:18 ` [PATCH v3 4/4] KVM: TDX: Validate userspace CPUID input for KVM_TDX_INIT_VM Binbin Wu
2026-08-27  3:24   ` sashiko-bot
2026-08-27  7:25     ` Binbin Wu
2026-09-01  6:47   ` Tony Lindgren
2026-08-27 19:33 ` [PATCH v3 0/4] KVM: TDX: Validate directly configurable CPUID bits Edgecombe, Rick P
2026-08-28  3:19   ` Binbin Wu
2026-08-28 16:58     ` Edgecombe, Rick P
2026-08-31  5:01       ` Binbin Wu
2026-09-01  9:42         ` Xiaoyao Li
2026-09-01 10:21           ` Xiaoyao Li
2026-09-02 16:09           ` Edgecombe, Rick P
2026-09-02 16:21             ` Binbin Wu
2026-09-09  1:46             ` Binbin Wu
2026-09-01  9:38     ` Xiaoyao Li
2026-09-01 17:41       ` Edgecombe, Rick P
2026-09-02 10:29         ` Xiaoyao Li
2026-09-02 13:13           ` Edgecombe, Rick P
2026-09-02 13:39             ` Xiaoyao Li
2026-09-02 13:53               ` Edgecombe, Rick P [this message]
2026-09-02 14:21                 ` Xiaoyao Li
2026-09-02 16:26             ` Binbin Wu
2026-09-08  9:42 ` Artem Bityutskiy
2026-09-09  0:04   ` Binbin Wu
2026-09-08 20:30 ` Artem Bityutskiy
2026-09-08 22:31   ` Edgecombe, Rick P
2026-09-09  6:52     ` Artem Bityutskiy
2026-09-09  8:48       ` Binbin Wu
2026-09-09 11:20         ` Artem Bityutskiy
2026-09-10  2:54           ` Binbin Wu
2026-09-08 23:54   ` Binbin Wu
2026-09-09  5:37     ` Binbin Wu

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