Re: [PATCH 3/4] ARM: dts: BCM5301X: Add DT for ASUS RT-AC3200

[Krzysztof Kozlowski <krzk@kernel.org>]

On 17/04/2024 18:47, Florian Fainelli wrote:
> 
> 
> On 4/17/2024 6:23 AM, Krzysztof Kozlowski wrote:
>> On 17/04/2024 05:15, Florian Fainelli wrote:
>>>
>>>
>>> On 4/15/2024 2:10 AM, Arınç ÜNAL wrote:
>>>> On 15.04.2024 10:57, Krzysztof Kozlowski wrote:
>>>>> On 14/04/2024 22:21, Arınç ÜNAL wrote:
>>>>>> NVRAM is described as both flash device partition and memory mapped
>>>>>> NVMEM.
>>>>>> This platform stores NVRAM on flash but makes it also memory accessible.
>>>>>>
>>>>>> As device partitions are described in board DTS, the nvram node must
>>>>>> also
>>>>>
>>>>> Sorry, but we do not talk about partitions. Partitions are indeed board
>>>>> property. But the piece of hardware, so NVMEM, is provided by SoC.
>>>>>
>>>>>> be defined there as its address and size will be different by board.
>>>>>> It has
>>>>>> been widely described on at least bcm4709 and bcm47094 SoC board DTS
>>>>>> files
>>>>>> here.
>>>>>
>>>>> These not proper arguments. What you are saying here is that SoC does no
>>>>> have nvram at address 0x1c08000. Instead you are saying there some sort
>>>>> of bus going out of SoC to the board and on the board physically there
>>>>> is some NVRAM sort of memory attached to this bus.
>>>>
>>>> Yes that is the case. NVRAM is stored on a partition on the flash. On the
>>>> Broadcom NorthStar platform, the NAND flash base is 0x1c000000, the NOR
>>>> flash base is 0x1e000000.
>>>>
>>>> For the board in this patch, the flash is a NAND flash. The NVRAM partition
>>>> starts at address 0x00080000. Therefore, the NVRAM component's address is
>>>> 0x1c080000.
>>>
>>> Because the flash is memory mapped into the CPU's address space, a
>>> separate node was defined since it is not part of the "soc" node which
>>> describes the bridge that connects all of the peripherals.
>>>
>>> Whether we should create an additional bus node which describes the
>>> bridge being used to access the flash devices using the MMIO windows is
>>> debatable. Rafal, what do you think?
>>
>> Sorry guys, I don't get. I don't know the addresses neither the names
>> like Broadcom Northstar, so this does not clarify me at all.
> 
> Northstar is just a code name for the BCM5301X SoC family. The SoC 
> memory map looks like this:
> 
> 0x0000_0000 ~ 0x07FF_FFFF - DDR
> 0x0800_0000 ~ 0x0FFF_FFFF - PCIe0
> 0x1800_0000 ~ 0x180F_FFFF - Core registers (that is 
> chipcommon-a-bus@18000000 and axi@18000000 in DT)
> 0x1810_0000 ~ 0x181F_FFFF - IDM registers
> 0x1900_0000 ~ 0x190F_FFFF - ARMCore registers (that is 
> mpcore-bus@19000000 in DT)
> 0x1C00_0000 ~ 0x1DFF_FFFF - NAND flash
> 0x1E00_0000 ~ 0x1FFF_FFFF - SPI-NOR flash
> 0x4000_0000 ~ 0x47FF_FFFF - PCIe1
> 0x4800_0000 ~ 0x4FFF_FFFF - PCIe2
> 0x8000_0000 ~ 0xBFFF_FFFF - DDR
> 
>  From the system diagram the CPU has 3 AXI ports to the NIC301 AXI 
> fabric, which itself has separate AXI ports to the NAND and SPI-NOR MMIO 
> interface and then different AXI and APB ports to various other peripherals.
> 
> This information was not accessible to Rafal at the time, so it would 
> not have been reasonable to expect from him to know such details.

Sure.

> 
>>
>> Please answer the simple questions:
>> 1. Is NAND flash part of SoC?
>> 2. If not, is NAND flash provided by Broadcom or anyone else?
> 
> The NAND flash is external to the SoC it is not manufactured by Broadcom 
> we have boards with Spansion, Micron, Macronix, Toshiba flashes etc.

Thanks, then this explains why this is no part of SoC and my concerns
are addressed. I have only one remaining question - you use "brcm,nvram"
compatible, which kind of suggests the NVRAM controller or part itself
is coming from Broadcom. Driver looks like software construct, but it is
so widely used that I guess that ship has sailed.

Best regards,
Krzysztof


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