From: Paul Walmsley <pjw@kernel.org>
To: Conor Dooley <conor@kernel.org>
Cc: wangjia@ultrarisc.com, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Daniel Lezcano <daniel.lezcano@kernel.org>,
Thomas Gleixner <tglx@kernel.org>,
Samuel Holland <samuel.holland@sifive.com>,
Anup Patel <anup@brainfault.org>,
Mark Brown <broonie@kernel.org>,
Andi Shyti <andi.shyti@kernel.org>,
Mika Westerberg <mika.westerberg@linux.intel.com>,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>,
Paolo Abeni <pabeni@redhat.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Giuseppe Cavallaro <peppe.cavallaro@st.com>,
Jose Abreu <joabreu@synopsys.com>,
Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>,
Vinod Koul <vkoul@kernel.org>, Frank Li <Frank.Li@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@sifive.com>,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org,
linux-i2c@vger.kernel.org, netdev@vger.kernel.org,
dmaengine@vger.kernel.org
Subject: Re: [PATCH 01/12] dt-bindings: riscv: cpus: Fix yamllint style issues
Date: Tue, 1 Sep 2026 19:15:45 -0600 (MDT) [thread overview]
Message-ID: <96962a7c-3ab7-abc1-60f2-48bed0eeae55@kernel.org> (raw)
In-Reply-To: <20260824-outpost-mandarin-532989726b7d@spud>
On Mon, 24 Aug 2026, Conor Dooley wrote:
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> pw-bot: not-applicable
>
> Or I can take it if needs be.
Thanks, I picked it up for v7.3-rc.
- Paul
WARNING: multiple messages have this Message-ID (diff)
From: Paul Walmsley <pjw@kernel.org>
To: Conor Dooley <conor@kernel.org>
Cc: wangjia@ultrarisc.com, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Daniel Lezcano <daniel.lezcano@kernel.org>,
Thomas Gleixner <tglx@kernel.org>,
Samuel Holland <samuel.holland@sifive.com>,
Anup Patel <anup@brainfault.org>,
Mark Brown <broonie@kernel.org>,
Andi Shyti <andi.shyti@kernel.org>,
Mika Westerberg <mika.westerberg@linux.intel.com>,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>,
Paolo Abeni <pabeni@redhat.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Giuseppe Cavallaro <peppe.cavallaro@st.com>,
Jose Abreu <joabreu@synopsys.com>,
Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>,
Vinod Koul <vkoul@kernel.org>, Frank Li <Frank.Li@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@sifive.com>,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org,
linux-i2c@vger.kernel.org, netdev@vger.kernel.org,
dmaengine@vger.kernel.org
Subject: Re: [PATCH 01/12] dt-bindings: riscv: cpus: Fix yamllint style issues
Date: Tue, 1 Sep 2026 19:15:45 -0600 (MDT) [thread overview]
Message-ID: <96962a7c-3ab7-abc1-60f2-48bed0eeae55@kernel.org> (raw)
In-Reply-To: <20260824-outpost-mandarin-532989726b7d@spud>
On Mon, 24 Aug 2026, Conor Dooley wrote:
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> pw-bot: not-applicable
>
> Or I can take it if needs be.
Thanks, I picked it up for v7.3-rc.
- Paul
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next prev parent reply other threads:[~2026-09-02 1:15 UTC|newest]
Thread overview: 95+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-24 5:54 [PATCH 00/12] riscv: Add device tree support for UltraRISC DP1000 Jia Wang via B4 Relay
2026-08-24 5:54 ` Jia Wang
2026-08-24 5:54 ` Jia Wang via B4 Relay
2026-08-24 5:54 ` [PATCH 01/12] dt-bindings: riscv: cpus: Fix yamllint style issues Jia Wang via B4 Relay
2026-08-24 5:54 ` Jia Wang
2026-08-24 5:54 ` Jia Wang via B4 Relay
2026-08-24 16:35 ` Conor Dooley
2026-08-24 16:35 ` Conor Dooley
2026-09-02 1:15 ` Paul Walmsley [this message]
2026-09-02 1:15 ` Paul Walmsley
2026-08-24 5:54 ` [PATCH 02/12] dt-bindings: vendor-prefixes: Add shenrongda Jia Wang via B4 Relay
2026-08-24 5:54 ` Jia Wang
2026-08-24 5:54 ` Jia Wang via B4 Relay
2026-08-24 17:03 ` Conor Dooley
2026-08-24 17:03 ` Conor Dooley
2026-08-24 5:54 ` [PATCH 03/12] dt-bindings: riscv: cpus: Add UltraRISC CP100 compatible Jia Wang via B4 Relay
2026-08-24 5:54 ` Jia Wang
2026-08-24 5:54 ` Jia Wang via B4 Relay
2026-08-24 17:02 ` Conor Dooley
2026-08-24 17:02 ` Conor Dooley
2026-08-24 5:54 ` [PATCH 04/12] dt-bindings: riscv: Add UltraRISC DP1000 board compatibles Jia Wang via B4 Relay
2026-08-24 5:54 ` Jia Wang
2026-08-24 5:54 ` Jia Wang via B4 Relay
2026-08-24 17:04 ` Conor Dooley
2026-08-24 17:04 ` Conor Dooley
2026-08-24 5:54 ` [PATCH 05/12] dt-bindings: timer: Add UltraRISC DP1000 CLINT Jia Wang via B4 Relay
2026-08-24 5:54 ` Jia Wang
2026-08-24 5:54 ` Jia Wang via B4 Relay
2026-08-24 17:05 ` Conor Dooley
2026-08-24 17:05 ` Conor Dooley
2026-08-24 5:54 ` [PATCH 06/12] spi: dt-bindings: snps,dw-apb-ssi: Add compatible for UltraRISC DP1000 SoC Jia Wang via B4 Relay
2026-08-24 5:54 ` Jia Wang
2026-08-24 5:54 ` Jia Wang via B4 Relay
2026-08-24 17:07 ` Conor Dooley
2026-08-24 17:07 ` Conor Dooley
2026-08-24 17:15 ` Conor Dooley
2026-08-24 17:15 ` Conor Dooley
2026-08-25 8:16 ` Jia Wang
2026-08-25 8:16 ` Jia Wang
2026-08-31 21:27 ` Mark Brown
2026-08-31 21:27 ` Mark Brown
2026-08-24 5:54 ` [PATCH 07/12] dt-bindings: i2c: dw: " Jia Wang via B4 Relay
2026-08-24 5:54 ` Jia Wang
2026-08-24 5:54 ` Jia Wang via B4 Relay
2026-08-24 17:07 ` Conor Dooley
2026-08-24 17:07 ` Conor Dooley
2026-08-24 17:14 ` Conor Dooley
2026-08-24 17:14 ` Conor Dooley
2026-08-25 8:45 ` Jia Wang
2026-08-25 8:45 ` Jia Wang
2026-08-24 5:54 ` [PATCH 08/12] dt-bindings: net: snps,dwmac: " Jia Wang via B4 Relay
2026-08-24 5:54 ` Jia Wang
2026-08-24 5:54 ` Jia Wang via B4 Relay
2026-08-24 17:09 ` Conor Dooley
2026-08-24 17:09 ` Conor Dooley
2026-08-24 17:13 ` Conor Dooley
2026-08-24 17:13 ` Conor Dooley
2026-08-25 10:12 ` Jia Wang
2026-08-25 10:12 ` Jia Wang
2026-08-27 8:17 ` Jia Wang
2026-08-27 8:17 ` Jia Wang
2026-08-25 6:16 ` sashiko-bot
2026-08-24 5:54 ` [PATCH 09/12] dt-bindings: dma: snps,dw-axi-dmac: Add UltraRISC DP1000 compatible Jia Wang via B4 Relay
2026-08-24 5:54 ` Jia Wang
2026-08-24 5:54 ` Jia Wang via B4 Relay
2026-08-24 17:03 ` Conor Dooley
2026-08-24 17:03 ` Conor Dooley
2026-08-24 17:11 ` Conor Dooley
2026-08-24 17:11 ` Conor Dooley
2026-08-26 5:31 ` Jia Wang
2026-08-26 5:31 ` Jia Wang
2026-08-24 5:54 ` [PATCH 10/12] riscv: dts: ultrarisc: Add initial device tree for UltraRISC DP1000 Jia Wang via B4 Relay
2026-08-24 5:54 ` Jia Wang
2026-08-24 5:54 ` Jia Wang via B4 Relay
2026-08-25 6:16 ` sashiko-bot
2026-08-24 5:54 ` [PATCH 11/12] riscv: dts: ultrarisc: Add Shenzhen Rongda M0 board device tree Jia Wang via B4 Relay
2026-08-24 5:54 ` Jia Wang
2026-08-24 5:54 ` Jia Wang via B4 Relay
2026-08-24 13:02 ` Andrew Lunn
2026-08-24 13:02 ` Andrew Lunn
2026-08-27 2:19 ` Jia Wang
2026-08-27 2:19 ` Jia Wang
2026-08-27 2:46 ` Andrew Lunn
2026-08-27 2:46 ` Andrew Lunn
2026-08-27 4:54 ` Jia Wang
2026-08-27 4:54 ` Jia Wang
2026-08-25 6:16 ` sashiko-bot
2026-08-24 5:54 ` [PATCH 12/12] riscv: dts: ultrarisc: Add Milk-V Titan " Jia Wang via B4 Relay
2026-08-24 5:54 ` Jia Wang
2026-08-24 5:54 ` Jia Wang via B4 Relay
2026-08-24 13:06 ` Andrew Lunn
2026-08-24 13:06 ` Andrew Lunn
2026-08-27 2:24 ` Jia Wang
2026-08-27 2:24 ` Jia Wang
2026-08-25 6:16 ` sashiko-bot
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