From: Keir Fraser <keir.fraser@eu.citrix.com>
To: Andi Kleen <andi@firstfloor.org>
Cc: xen-devel <xen-devel@lists.xensource.com>,
Trolle Selander <trolle.selander@gmail.com>
Subject: Re: [PATCH] [RFC] More fp instructions for realmode emulation (Enables booting OS/2 as a HVM guest on Intel/VT hardware)
Date: Mon, 03 Mar 2008 17:30:13 +0000 [thread overview]
Message-ID: <C3F1E625.1D616%keir.fraser@eu.citrix.com> (raw)
In-Reply-To: <20080303165929.GC9853@one.firstfloor.org>
On 3/3/08 16:59, "Andi Kleen" <andi@firstfloor.org> wrote:
>>> Yes you definitely need to. That was a kernel crash bug on native Linux
>>> some time ago...
>>>
>>> Also you need to do the same for any FXSAVEs/FXRSTORs if you haven't
>>> already.
>>
>> FXSAVE/FXRSTOR do not flush pending FPU exceptions, right?
>
> Yes they do not, but there are other ways to make them #GP
We don't trust FXRSTOR but we do trust FXSAVE. The AMD manual says that
FXRSTOR will #GP if 1s are written to MXCSR reserved bits, but I take this
to be a cut-and-paste typo since FXSAVE does not write to MXCSR.
If there's real evidence of FXSAVE causing #GP dependent on current FPU
state, I'd be very happy to find out about it!
-- Keir
next prev parent reply other threads:[~2008-03-03 17:30 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-02-29 22:14 [PATCH] [RFC] More fp instructions for realmode emulation (Enables booting OS/2 as a HVM guest on Intel/VT hardware) Trolle Selander
2008-03-01 8:46 ` Keir Fraser
2008-03-01 9:18 ` Keir Fraser
2008-03-03 12:18 ` Trolle Selander
2008-03-03 12:21 ` Keir Fraser
2008-03-03 14:52 ` Andi Kleen
2008-03-03 15:00 ` Keir Fraser
2008-03-03 16:59 ` Andi Kleen
2008-03-03 17:30 ` Keir Fraser [this message]
2008-03-03 18:11 ` Andi Kleen
2008-03-04 10:13 ` Keir Fraser
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