From: Keir Fraser <keir.fraser@eu.citrix.com>
To: Dan Magenheimer <dan.magenheimer@oracle.com>,
"Xen-Devel (E-mail)" <xen-devel@lists.xensource.com>
Subject: Re: [PATCH] pvcpuid: mask TSC invariant bit for various circumstances
Date: Tue, 27 Oct 2009 00:22:06 +0000 [thread overview]
Message-ID: <C70BEDAE.18718%keir.fraser@eu.citrix.com> (raw)
In-Reply-To: <8a95a56e-c387-46c7-a7d2-5a84bdfd1485@default>
On 26/10/2009 23:12, "Dan Magenheimer" <dan.magenheimer@oracle.com> wrote:
> pvcpuid: mask TSC invariant bit for PV domains if migration
> is not disabled and TSC is not emulated
>
> (Need similar patch for HVM domain)
>
> Signed-off-by: Dan Magenheimer <dan.magenheimer@oracle.com>
This only affects PV domUs. I suggest patching pv_cpuid() to catch dom0, and
then really all domUs should be handled by xc_cpuid_apply_policy(), which
pushes CPUID info down to the hypervisor, as called from xend's
image.py:setCpuid(). The advantage of this is that the hypervisor does not
need to be informed of the 'disable_migrate' flag at all -- it can be
assumed to be true for dom0 -- and it can be handled entirely in the tools.
Hence I can get rid of the new domctl, which is nice.
-- Keir
next prev parent reply other threads:[~2009-10-27 0:22 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-10-26 23:12 [PATCH] pvcpuid: mask TSC invariant bit for various circumstances Dan Magenheimer
2009-10-27 0:22 ` Keir Fraser [this message]
2009-10-27 1:09 ` Dan Magenheimer
2009-10-27 7:31 ` Keir Fraser
2009-10-27 17:03 ` Dan Magenheimer
2009-10-27 17:16 ` Keir Fraser
2009-10-27 20:40 ` Dan Magenheimer
2009-10-27 20:58 ` Keir Fraser
2009-10-27 22:03 ` Dan Magenheimer
2009-10-28 7:16 ` Keir Fraser
2009-10-28 16:27 ` Dan Magenheimer
2009-10-28 16:38 ` Jan Beulich
2009-10-28 16:50 ` Dan Magenheimer
2009-10-28 17:29 ` Keir Fraser
2009-10-29 22:07 ` Jeremy Fitzhardinge
2009-10-29 22:17 ` Dan Magenheimer
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