[PATCH 0/2] Add common clk framework support for PCI mode SPI PXA2XX

[PATCH 0/2] Add common clk framework support for PCI mode SPI PXA2XX

[Chew Chiau Ee]

From: Chew, Chiau Ee <chiau.ee.chew-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>

SPI PXA2XX core layer depends on common clock framework to obtain
information on host supported clock rate. Thus, we setup and register
clock device for PCI mode host in SPI PXA2XX pci glue layer using
common clock APIs.

In addition, in order for PCI mode SPI PXA2XX with common clock framework
support to be built as module, we need to export clk_register_clkdev().

Chew, Chiau Ee (1):
  spi/pxa2xx-pci: Add common clock framework support in PCI glue layer

Darren Hart (1):
  clkdev: Export clk_register_clkdev

 drivers/clk/clkdev.c         |    1
 drivers/spi/spi-pxa2xx-pci.c |   20 ++++++++++++++++++++
 2 files changed, 21 insertions(+), 0 deletions(-)

-- 
1.7.4.4

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[PATCH 0/2] Add common clk framework support for PCI mode SPI PXA2XX

[Chew Chiau Ee]

From: Chew, Chiau Ee <chiau.ee.chew@intel.com>

SPI PXA2XX core layer depends on common clock framework to obtain
information on host supported clock rate. Thus, we setup and register
clock device for PCI mode host in SPI PXA2XX pci glue layer using
common clock APIs.

In addition, in order for PCI mode SPI PXA2XX with common clock framework
support to be built as module, we need to export clk_register_clkdev().

Chew, Chiau Ee (1):
  spi/pxa2xx-pci: Add common clock framework support in PCI glue layer

Darren Hart (1):
  clkdev: Export clk_register_clkdev

 drivers/clk/clkdev.c         |    1
 drivers/spi/spi-pxa2xx-pci.c |   20 ++++++++++++++++++++
 2 files changed, 21 insertions(+), 0 deletions(-)

-- 
1.7.4.4

[PATCH 0/2] Add common clk framework support for PCI mode SPI PXA2XX

[Chew Chiau Ee]

From: Chew, Chiau Ee <chiau.ee.chew@intel.com>

SPI PXA2XX core layer depends on common clock framework to obtain
information on host supported clock rate. Thus, we setup and register
clock device for PCI mode host in SPI PXA2XX pci glue layer using
common clock APIs.

In addition, in order for PCI mode SPI PXA2XX with common clock framework
support to be built as module, we need to export clk_register_clkdev().

Chew, Chiau Ee (1):
  spi/pxa2xx-pci: Add common clock framework support in PCI glue layer

Darren Hart (1):
  clkdev: Export clk_register_clkdev

 drivers/clk/clkdev.c         |    1
 drivers/spi/spi-pxa2xx-pci.c |   20 ++++++++++++++++++++
 2 files changed, 21 insertions(+), 0 deletions(-)

-- 
1.7.4.4

[PATCH 1/2] spi/pxa2xx-pci: Add common clock framework support in PCI glue layer

[Chew Chiau Ee]

From: Chew, Chiau Ee <chiau.ee.chew-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>

SPI PXA2XX core layer has dependency on common clock framework
to obtain information on host supported clock rate. Thus, we
setup the clock device in the PCI glue layer to enable PCI mode
host pass in the clock rate information.

Signed-off-by: Chew, Chiau Ee <chiau.ee.chew-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
---
 drivers/spi/spi-pxa2xx-pci.c |   20 ++++++++++++++++++++
 1 files changed, 20 insertions(+), 0 deletions(-)

diff --git a/drivers/spi/spi-pxa2xx-pci.c b/drivers/spi/spi-pxa2xx-pci.c
index c1865c9..11adc9b 100644
--- a/drivers/spi/spi-pxa2xx-pci.c
+++ b/drivers/spi/spi-pxa2xx-pci.c
@@ -7,6 +7,9 @@
 #include <linux/of_device.h>
 #include <linux/module.h>
 #include <linux/spi/pxa2xx_spi.h>
+#include <linux/clk.h>
+#include <linux/clkdev.h>
+#include <linux/clk-provider.h>
 
 enum {
 	PORT_CE4100,
@@ -21,6 +24,7 @@ struct pxa_spi_info {
 	int tx_chan_id;
 	int rx_slave_id;
 	int rx_chan_id;
+	unsigned long max_clk_rate;
 };
 
 static struct pxa_spi_info spi_info_configs[] = {
@@ -32,6 +36,7 @@ static struct pxa_spi_info spi_info_configs[] = {
 		.tx_chan_id = -1,
 		.rx_slave_id = -1,
 		.rx_chan_id = -1,
+		.max_clk_rate = 3686400,
 	},
 	[PORT_BYT] = {
 		.type = LPSS_SSP,
@@ -41,6 +46,7 @@ static struct pxa_spi_info spi_info_configs[] = {
 		.tx_chan_id = 0,
 		.rx_slave_id = 1,
 		.rx_chan_id = 1,
+		.max_clk_rate = 50000000,
 	},
 };
 
@@ -53,6 +59,7 @@ static int pxa2xx_spi_pci_probe(struct pci_dev *dev,
 	struct pxa2xx_spi_master spi_pdata;
 	struct ssp_device *ssp;
 	struct pxa_spi_info *c;
+	struct clk *clk;
 
 	ret = pcim_enable_device(dev);
 	if (ret)
@@ -84,6 +91,19 @@ static int pxa2xx_spi_pci_probe(struct pci_dev *dev,
 	ssp->port_id = (c->port_id >= 0) ? c->port_id : dev->devfn;
 	ssp->type = c->type;
 
+	clk = clk_register_fixed_rate(&dev->dev, "spi_pxa2xx_clk", NULL,
+					CLK_IS_ROOT, c->max_clk_rate);
+	 if (IS_ERR(clk))
+		return PTR_ERR(clk);
+
+	clk_register_clkdev(clk, NULL, dev_name(&dev->dev));
+
+	ssp->clk = devm_clk_get(&dev->dev, NULL);
+	if (IS_ERR(ssp->clk)) {
+		dev_err(&dev->dev, "failed to get clock\n");
+		return PTR_ERR(ssp->clk);
+	}
+
 	memset(&pi, 0, sizeof(pi));
 	pi.parent = &dev->dev;
 	pi.name = "pxa2xx-spi";
-- 
1.7.4.4

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[PATCH 1/2] spi/pxa2xx-pci: Add common clock framework support in PCI glue layer

[Chew Chiau Ee]

From: Chew, Chiau Ee <chiau.ee.chew@intel.com>

SPI PXA2XX core layer has dependency on common clock framework
to obtain information on host supported clock rate. Thus, we
setup the clock device in the PCI glue layer to enable PCI mode
host pass in the clock rate information.

Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
---
 drivers/spi/spi-pxa2xx-pci.c |   20 ++++++++++++++++++++
 1 files changed, 20 insertions(+), 0 deletions(-)

diff --git a/drivers/spi/spi-pxa2xx-pci.c b/drivers/spi/spi-pxa2xx-pci.c
index c1865c9..11adc9b 100644
--- a/drivers/spi/spi-pxa2xx-pci.c
+++ b/drivers/spi/spi-pxa2xx-pci.c
@@ -7,6 +7,9 @@
 #include <linux/of_device.h>
 #include <linux/module.h>
 #include <linux/spi/pxa2xx_spi.h>
+#include <linux/clk.h>
+#include <linux/clkdev.h>
+#include <linux/clk-provider.h>
 
 enum {
 	PORT_CE4100,
@@ -21,6 +24,7 @@ struct pxa_spi_info {
 	int tx_chan_id;
 	int rx_slave_id;
 	int rx_chan_id;
+	unsigned long max_clk_rate;
 };
 
 static struct pxa_spi_info spi_info_configs[] = {
@@ -32,6 +36,7 @@ static struct pxa_spi_info spi_info_configs[] = {
 		.tx_chan_id = -1,
 		.rx_slave_id = -1,
 		.rx_chan_id = -1,
+		.max_clk_rate = 3686400,
 	},
 	[PORT_BYT] = {
 		.type = LPSS_SSP,
@@ -41,6 +46,7 @@ static struct pxa_spi_info spi_info_configs[] = {
 		.tx_chan_id = 0,
 		.rx_slave_id = 1,
 		.rx_chan_id = 1,
+		.max_clk_rate = 50000000,
 	},
 };
 
@@ -53,6 +59,7 @@ static int pxa2xx_spi_pci_probe(struct pci_dev *dev,
 	struct pxa2xx_spi_master spi_pdata;
 	struct ssp_device *ssp;
 	struct pxa_spi_info *c;
+	struct clk *clk;
 
 	ret = pcim_enable_device(dev);
 	if (ret)
@@ -84,6 +91,19 @@ static int pxa2xx_spi_pci_probe(struct pci_dev *dev,
 	ssp->port_id = (c->port_id >= 0) ? c->port_id : dev->devfn;
 	ssp->type = c->type;
 
+	clk = clk_register_fixed_rate(&dev->dev, "spi_pxa2xx_clk", NULL,
+					CLK_IS_ROOT, c->max_clk_rate);
+	 if (IS_ERR(clk))
+		return PTR_ERR(clk);
+
+	clk_register_clkdev(clk, NULL, dev_name(&dev->dev));
+
+	ssp->clk = devm_clk_get(&dev->dev, NULL);
+	if (IS_ERR(ssp->clk)) {
+		dev_err(&dev->dev, "failed to get clock\n");
+		return PTR_ERR(ssp->clk);
+	}
+
 	memset(&pi, 0, sizeof(pi));
 	pi.parent = &dev->dev;
 	pi.name = "pxa2xx-spi";
-- 
1.7.4.4

[PATCH 1/2] spi/pxa2xx-pci: Add common clock framework support in PCI glue layer

[Chew Chiau Ee]

From: Chew, Chiau Ee <chiau.ee.chew@intel.com>

SPI PXA2XX core layer has dependency on common clock framework
to obtain information on host supported clock rate. Thus, we
setup the clock device in the PCI glue layer to enable PCI mode
host pass in the clock rate information.

Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
---
 drivers/spi/spi-pxa2xx-pci.c |   20 ++++++++++++++++++++
 1 files changed, 20 insertions(+), 0 deletions(-)

diff --git a/drivers/spi/spi-pxa2xx-pci.c b/drivers/spi/spi-pxa2xx-pci.c
index c1865c9..11adc9b 100644
--- a/drivers/spi/spi-pxa2xx-pci.c
+++ b/drivers/spi/spi-pxa2xx-pci.c
@@ -7,6 +7,9 @@
 #include <linux/of_device.h>
 #include <linux/module.h>
 #include <linux/spi/pxa2xx_spi.h>
+#include <linux/clk.h>
+#include <linux/clkdev.h>
+#include <linux/clk-provider.h>
 
 enum {
 	PORT_CE4100,
@@ -21,6 +24,7 @@ struct pxa_spi_info {
 	int tx_chan_id;
 	int rx_slave_id;
 	int rx_chan_id;
+	unsigned long max_clk_rate;
 };
 
 static struct pxa_spi_info spi_info_configs[] = {
@@ -32,6 +36,7 @@ static struct pxa_spi_info spi_info_configs[] = {
 		.tx_chan_id = -1,
 		.rx_slave_id = -1,
 		.rx_chan_id = -1,
+		.max_clk_rate = 3686400,
 	},
 	[PORT_BYT] = {
 		.type = LPSS_SSP,
@@ -41,6 +46,7 @@ static struct pxa_spi_info spi_info_configs[] = {
 		.tx_chan_id = 0,
 		.rx_slave_id = 1,
 		.rx_chan_id = 1,
+		.max_clk_rate = 50000000,
 	},
 };
 
@@ -53,6 +59,7 @@ static int pxa2xx_spi_pci_probe(struct pci_dev *dev,
 	struct pxa2xx_spi_master spi_pdata;
 	struct ssp_device *ssp;
 	struct pxa_spi_info *c;
+	struct clk *clk;
 
 	ret = pcim_enable_device(dev);
 	if (ret)
@@ -84,6 +91,19 @@ static int pxa2xx_spi_pci_probe(struct pci_dev *dev,
 	ssp->port_id = (c->port_id >= 0) ? c->port_id : dev->devfn;
 	ssp->type = c->type;
 
+	clk = clk_register_fixed_rate(&dev->dev, "spi_pxa2xx_clk", NULL,
+					CLK_IS_ROOT, c->max_clk_rate);
+	 if (IS_ERR(clk))
+		return PTR_ERR(clk);
+
+	clk_register_clkdev(clk, NULL, dev_name(&dev->dev));
+
+	ssp->clk = devm_clk_get(&dev->dev, NULL);
+	if (IS_ERR(ssp->clk)) {
+		dev_err(&dev->dev, "failed to get clock\n");
+		return PTR_ERR(ssp->clk);
+	}
+
 	memset(&pi, 0, sizeof(pi));
 	pi.parent = &dev->dev;
 	pi.name = "pxa2xx-spi";
-- 
1.7.4.4

Re: [PATCH 1/2] spi/pxa2xx-pci: Add common clock framework support in PCI glue layer

[Mark Brown]

[-- Attachment #1: Type: text/plain, Size: 632 bytes --]

On Tue, Jun 03, 2014 at 03:46:18AM +0800, Chew Chiau Ee wrote:

> ---
>  drivers/spi/spi-pxa2xx-pci.c |   20 ++++++++++++++++++++
>  1 files changed, 20 insertions(+), 0 deletions(-)

> +	clk = clk_register_fixed_rate(&dev->dev, "spi_pxa2xx_clk", NULL,
> +					CLK_IS_ROOT, c->max_clk_rate);
> +	 if (IS_ERR(clk))
> +		return PTR_ERR(clk);

This is pretty much fine code wise but I'd expect to see some Kconfig
updates adding dependencies on the clock API - clk_register_fixed_rate()
is only provided if the fixed rate driver is present.  I'm also not
seeing any changes to unregister the fixed rate clock as the device is
removed.

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Re: [PATCH 1/2] spi/pxa2xx-pci: Add common clock framework support in PCI glue layer

[Mark Brown]

[-- Attachment #1: Type: text/plain, Size: 632 bytes --]

On Tue, Jun 03, 2014 at 03:46:18AM +0800, Chew Chiau Ee wrote:

> ---
>  drivers/spi/spi-pxa2xx-pci.c |   20 ++++++++++++++++++++
>  1 files changed, 20 insertions(+), 0 deletions(-)

> +	clk = clk_register_fixed_rate(&dev->dev, "spi_pxa2xx_clk", NULL,
> +					CLK_IS_ROOT, c->max_clk_rate);
> +	 if (IS_ERR(clk))
> +		return PTR_ERR(clk);

This is pretty much fine code wise but I'd expect to see some Kconfig
updates adding dependencies on the clock API - clk_register_fixed_rate()
is only provided if the fixed rate driver is present.  I'm also not
seeing any changes to unregister the fixed rate clock as the device is
removed.

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[PATCH 1/2] spi/pxa2xx-pci: Add common clock framework support in PCI glue layer

[Mark Brown]

On Tue, Jun 03, 2014 at 03:46:18AM +0800, Chew Chiau Ee wrote:

> ---
>  drivers/spi/spi-pxa2xx-pci.c |   20 ++++++++++++++++++++
>  1 files changed, 20 insertions(+), 0 deletions(-)

> +	clk = clk_register_fixed_rate(&dev->dev, "spi_pxa2xx_clk", NULL,
> +					CLK_IS_ROOT, c->max_clk_rate);
> +	 if (IS_ERR(clk))
> +		return PTR_ERR(clk);

This is pretty much fine code wise but I'd expect to see some Kconfig
updates adding dependencies on the clock API - clk_register_fixed_rate()
is only provided if the fixed rate driver is present.  I'm also not
seeing any changes to unregister the fixed rate clock as the device is
removed.
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[PATCH 2/2] clkdev: Export clk_register_clkdev

[Chew Chiau Ee]

From: Darren Hart <dvhart-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>

Allow spi-pxa2xx-pci with common clock framework support to build as a
module by exporting clk_register_clkdev.

Signed-off-by: Darren Hart <dvhart-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
Reviewed-by: Chew, Chiau Ee <chiau.ee.chew-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
Cc: Mika Westerberg <mika.westerberg-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
---
 drivers/clk/clkdev.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/drivers/clk/clkdev.c b/drivers/clk/clkdev.c
index a360b2e..bb48348 100644
--- a/drivers/clk/clkdev.c
+++ b/drivers/clk/clkdev.c
@@ -310,6 +310,7 @@ int clk_register_clkdev(struct clk *clk, const char *con_id,
 
 	return 0;
 }
+EXPORT_SYMBOL(clk_register_clkdev);
 
 /**
  * clk_register_clkdevs - register a set of clk_lookup for a struct clk
-- 
1.7.4.4

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[PATCH 2/2] clkdev: Export clk_register_clkdev

[Chew Chiau Ee]

From: Darren Hart <dvhart@linux.intel.com>

Allow spi-pxa2xx-pci with common clock framework support to build as a
module by exporting clk_register_clkdev.

Signed-off-by: Darren Hart <dvhart@linux.intel.com>
Reviewed-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
---
 drivers/clk/clkdev.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/drivers/clk/clkdev.c b/drivers/clk/clkdev.c
index a360b2e..bb48348 100644
--- a/drivers/clk/clkdev.c
+++ b/drivers/clk/clkdev.c
@@ -310,6 +310,7 @@ int clk_register_clkdev(struct clk *clk, const char *con_id,
 
 	return 0;
 }
+EXPORT_SYMBOL(clk_register_clkdev);
 
 /**
  * clk_register_clkdevs - register a set of clk_lookup for a struct clk
-- 
1.7.4.4

[PATCH 2/2] clkdev: Export clk_register_clkdev

[Chew Chiau Ee]

From: Darren Hart <dvhart@linux.intel.com>

Allow spi-pxa2xx-pci with common clock framework support to build as a
module by exporting clk_register_clkdev.

Signed-off-by: Darren Hart <dvhart@linux.intel.com>
Reviewed-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
---
 drivers/clk/clkdev.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/drivers/clk/clkdev.c b/drivers/clk/clkdev.c
index a360b2e..bb48348 100644
--- a/drivers/clk/clkdev.c
+++ b/drivers/clk/clkdev.c
@@ -310,6 +310,7 @@ int clk_register_clkdev(struct clk *clk, const char *con_id,
 
 	return 0;
 }
+EXPORT_SYMBOL(clk_register_clkdev);
 
 /**
  * clk_register_clkdevs - register a set of clk_lookup for a struct clk
-- 
1.7.4.4

Re: [PATCH 2/2] clkdev: Export clk_register_clkdev

[Mark Brown]

[-- Attachment #1: Type: text/plain, Size: 396 bytes --]

On Tue, Jun 03, 2014 at 03:46:19AM +0800, Chew Chiau Ee wrote:
> From: Darren Hart <dvhart@linux.intel.com>
> 
> Allow spi-pxa2xx-pci with common clock framework support to build as a
> module by exporting clk_register_clkdev.

This needs to be patch 1 in the series not patch 2 since the change to
the driver to use the exported symbol depends on this rather than the
other way around.

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[PATCH 2/2] clkdev: Export clk_register_clkdev

[Mark Brown]

On Tue, Jun 03, 2014 at 03:46:19AM +0800, Chew Chiau Ee wrote:
> From: Darren Hart <dvhart@linux.intel.com>
> 
> Allow spi-pxa2xx-pci with common clock framework support to build as a
> module by exporting clk_register_clkdev.

This needs to be patch 1 in the series not patch 2 since the change to
the driver to use the exported symbol depends on this rather than the
other way around.
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Re: [PATCH 2/2] clkdev: Export clk_register_clkdev

[Darren Hart]

On 6/2/14, 5:35, "Mark Brown" <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> wrote:

>On Tue, Jun 03, 2014 at 03:46:19AM +0800, Chew Chiau Ee wrote:
>> From: Darren Hart <dvhart-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
>> 
>> Allow spi-pxa2xx-pci with common clock framework support to build as a
>> module by exporting clk_register_clkdev.
>
>This needs to be patch 1 in the series not patch 2 since the change to
>the driver to use the exported symbol depends on this rather than the
>other way around.
>

That was going to be my only comment as well. It's important to ensure
things build consistently through the git history. Git bisect is a key use
case here, breaking that makes for very cranky kernel engineers :-)
Dependencies first, new mechanisms second.

-- 
Darren Hart					Open Source Technology Center
darren.hart-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org				            Intel Corporation



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Re: [PATCH 2/2] clkdev: Export clk_register_clkdev

[Darren Hart]

On 6/2/14, 5:35, "Mark Brown" <broonie@kernel.org> wrote:

>On Tue, Jun 03, 2014 at 03:46:19AM +0800, Chew Chiau Ee wrote:
>> From: Darren Hart <dvhart@linux.intel.com>
>> 
>> Allow spi-pxa2xx-pci with common clock framework support to build as a
>> module by exporting clk_register_clkdev.
>
>This needs to be patch 1 in the series not patch 2 since the change to
>the driver to use the exported symbol depends on this rather than the
>other way around.
>

That was going to be my only comment as well. It's important to ensure
things build consistently through the git history. Git bisect is a key use
case here, breaking that makes for very cranky kernel engineers :-)
Dependencies first, new mechanisms second.

-- 
Darren Hart					Open Source Technology Center
darren.hart@intel.com				            Intel Corporation

Re: [PATCH 2/2] clkdev: Export clk_register_clkdev

[Darren Hart]

On 6/2/14, 5:35, "Mark Brown" <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> wrote:

>On Tue, Jun 03, 2014 at 03:46:19AM +0800, Chew Chiau Ee wrote:
>> From: Darren Hart <dvhart-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
>> 
>> Allow spi-pxa2xx-pci with common clock framework support to build as a
>> module by exporting clk_register_clkdev.
>
>This needs to be patch 1 in the series not patch 2 since the change to
>the driver to use the exported symbol depends on this rather than the
>other way around.
>

That was going to be my only comment as well. It's important to ensure
things build consistently through the git history. Git bisect is a key use
case here, breaking that makes for very cranky kernel engineers :-)
Dependencies first, new mechanisms second.

-- 
Darren Hart					Open Source Technology Center
darren.hart-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org				            Intel Corporation



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[PATCH 2/2] clkdev: Export clk_register_clkdev

[Darren Hart]

On 6/2/14, 5:35, "Mark Brown" <broonie@kernel.org> wrote:

>On Tue, Jun 03, 2014 at 03:46:19AM +0800, Chew Chiau Ee wrote:
>> From: Darren Hart <dvhart@linux.intel.com>
>> 
>> Allow spi-pxa2xx-pci with common clock framework support to build as a
>> module by exporting clk_register_clkdev.
>
>This needs to be patch 1 in the series not patch 2 since the change to
>the driver to use the exported symbol depends on this rather than the
>other way around.
>

That was going to be my only comment as well. It's important to ensure
things build consistently through the git history. Git bisect is a key use
case here, breaking that makes for very cranky kernel engineers :-)
Dependencies first, new mechanisms second.

-- 
Darren Hart					Open Source Technology Center
darren.hart at intel.com				            Intel Corporation

Re: [PATCH 2/2] clkdev: Export clk_register_clkdev

[Mark Brown]

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On Tue, Jun 03, 2014 at 03:46:19AM +0800, Chew Chiau Ee wrote:

> From: Darren Hart <dvhart@linux.intel.com>
> 
> Allow spi-pxa2xx-pci with common clock framework support to build as a
> module by exporting clk_register_clkdev.
> 
> Signed-off-by: Darren Hart <dvhart@linux.intel.com>
> Reviewed-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>

Oh, and I just noticed - you need to supply a Signed-off-by for any
patches you are submitting, please see Documentation/SubmittingPatches,
this is required for legal reasons.

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[PATCH 2/2] clkdev: Export clk_register_clkdev

[Mark Brown]

On Tue, Jun 03, 2014 at 03:46:19AM +0800, Chew Chiau Ee wrote:

> From: Darren Hart <dvhart@linux.intel.com>
> 
> Allow spi-pxa2xx-pci with common clock framework support to build as a
> module by exporting clk_register_clkdev.
> 
> Signed-off-by: Darren Hart <dvhart@linux.intel.com>
> Reviewed-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>

Oh, and I just noticed - you need to supply a Signed-off-by for any
patches you are submitting, please see Documentation/SubmittingPatches,
this is required for legal reasons.
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