All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Nicholas Piggin" <npiggin@gmail.com>
To: "Richard Henderson" <richard.henderson@linaro.org>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Cédric Le Goater" <clg@redhat.com>,
	qemu-devel@nongnu.org
Cc: <qemu-ppc@nongnu.org>,
	"Daniel Henrique Barboza" <danielhb413@gmail.com>,
	"Laurent Vivier" <laurent@vivier.eu>
Subject: Re: [PATCH 3/9] ppc/ppc405: Remove CPU
Date: Tue, 14 Jan 2025 17:11:01 +1000	[thread overview]
Message-ID: <D71LX5ZNBHSB.9MP9IHEN5WLU@gmail.com> (raw)
In-Reply-To: <08932dd4-f4d2-4eae-b237-2975c820cec1@linaro.org>

On Sat Jan 11, 2025 at 2:25 AM AEST, Richard Henderson wrote:
> On 1/10/25 08:15, Philippe Mathieu-Daudé wrote:
> > Hi Cédric,
> > 
> > Cc'ing Laurent & Richard for user emulation.
> > 
> ...
> > The deprecation message (see previous patch) was about the
> > "ppc ``ref405ep`` machine". Is that OK we remove these CPUs
> > for user emulation?
> > 
> > $ qemu-ppc -cpu help|fgrep 405
> > PowerPC 405d2            PVR 20010000
> > PowerPC 405gpa           PVR 40110000
> > PowerPC 405gpb           PVR 40110040
> > PowerPC 405cra           PVR 40110041
> > PowerPC 405gpc           PVR 40110082
> > PowerPC 405gpd           PVR 401100c4
> > PowerPC 405gp            (alias for 405gpd)
> > PowerPC 405crb           PVR 401100c5
> > PowerPC 405crc           PVR 40110145
> > PowerPC 405cr            (alias for 405crc)
> > PowerPC 405gpe           (alias for 405crc)
> > PowerPC npe405h          PVR 414100c0
> > PowerPC npe405h2         PVR 41410140
> > PowerPC 405ez            PVR 41511460
> > PowerPC npe405l          PVR 416100c0
> > PowerPC 405d4            PVR 41810000
> > PowerPC 405              (alias for 405d4)
> > PowerPC 405lp            PVR 41f10000
> > PowerPC 405gpr           PVR 50910951
> > PowerPC 405ep            PVR 51210950
>
> Up to the ppc maintainers.  I don't know of anything interesting at the user-only level 
> wrt these cpus.

Just getting back to things after the break...

We are looking at modeling some microcontrollers on the POWER
chips. There is an OCC power management controller which is a 405
and some other weird cut down 405 derivatives, we're not up to
those yet but we want to model them.

We should be able to remove a bunch of boards and CPUs, I just
haven't started looking, so might be easier to wait for a bit.
If it's not causing others too much problem, could we leave this
in for the time being?

Thanks,
Nick


  reply	other threads:[~2025-01-14  7:12 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-10 14:17 [PATCH 0/9] ppc: Remove 405 CPU family Cédric Le Goater
2025-01-10 14:17 ` [PATCH 1/9] ppc/ppc405: Remove tests Cédric Le Goater
2025-01-10 16:04   ` Philippe Mathieu-Daudé
2025-01-10 14:17 ` [PATCH 2/9] ppc/ppc405: Remove boards Cédric Le Goater
2025-01-10 16:05   ` Philippe Mathieu-Daudé
2025-01-10 14:17 ` [PATCH 3/9] ppc/ppc405: Remove CPU Cédric Le Goater
2025-01-10 16:15   ` Philippe Mathieu-Daudé
2025-01-10 16:25     ` Richard Henderson
2025-01-14  7:11       ` Nicholas Piggin [this message]
2025-01-14  7:47         ` Cédric Le Goater
2026-04-30  5:30           ` Philippe Mathieu-Daudé
2026-04-30  6:54             ` Harsh Prateek Bora
2026-04-30 15:15               ` Philippe Mathieu-Daudé
2026-04-30 15:43                 ` Miles Glenn
2026-05-04  9:48                   ` Cédric Le Goater
2026-05-04 12:32                     ` Philippe Mathieu-Daudé
2026-05-04 14:59                       ` Miles Glenn
2026-05-04 17:32                         ` Miles Glenn
2026-05-05  8:22                     ` Daniel P. Berrangé
2026-04-30 15:35               ` Miles Glenn
2025-01-16 10:57         ` Daniel Henrique Barboza
2025-01-10 14:17 ` [PATCH 4/9] ppc/ppc405: Remove storage control (SLER) SPR Cédric Le Goater
2025-01-10 14:17 ` [PATCH 5/9] ppc/ppc405: Remove 40x exception model Cédric Le Goater
2025-01-10 14:17 ` [PATCH 6/9] ppc/ppc405: Remove timer support Cédric Le Goater
2025-01-10 14:17 ` [PATCH 7/9] ppc/ppc405: Remove cache handling instructions Cédric Le Goater
2025-01-10 16:09   ` Philippe Mathieu-Daudé
2025-01-10 16:15     ` Cédric Le Goater
2025-01-10 14:17 ` [PATCH 8/9] ppc/ppc405: Remove TLB instructions Cédric Le Goater
2025-01-10 14:18 ` [PATCH 9/9] ppc/ppc405: Remove POWERPC_MMU_SOFT_4xx MMU model Cédric Le Goater

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=D71LX5ZNBHSB.9MP9IHEN5WLU@gmail.com \
    --to=npiggin@gmail.com \
    --cc=clg@redhat.com \
    --cc=danielhb413@gmail.com \
    --cc=laurent@vivier.eu \
    --cc=philmd@linaro.org \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    --cc=richard.henderson@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.