* [PATCH] target/ppc: Add PIR to ppc_cpu_dump_state() for debug print out
@ 2025-03-16 14:43 BALATON Zoltan
2025-03-17 4:24 ` Nicholas Piggin
0 siblings, 1 reply; 2+ messages in thread
From: BALATON Zoltan @ 2025-03-16 14:43 UTC (permalink / raw)
To: qemu-devel, qemu-ppc; +Cc: Nicholas Piggin
Some CPU variants have a Processor Identification Register which was
not printed in register dump. Add it to ppc_cpu_dump_state() which is
used by debug options to print CPU register values.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
target/ppc/cpu_init.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 8b590e7f17..b1f32662ed 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -7606,9 +7606,14 @@ void ppc_cpu_dump_state(CPUState *cs, FILE *f, int flags)
int i;
qemu_fprintf(f, "NIP " TARGET_FMT_lx " LR " TARGET_FMT_lx " CTR "
- TARGET_FMT_lx " XER " TARGET_FMT_lx " CPU#%d\n",
- env->nip, env->lr, env->ctr, cpu_read_xer(env),
- cs->cpu_index);
+ TARGET_FMT_lx " XER " TARGET_FMT_lx,
+ env->nip, env->lr, env->ctr, cpu_read_xer(env));
+ if (env->spr_cb[SPR_PIR].name) {
+ qemu_fprintf(f, " PIR " TARGET_FMT_lx, env->spr[SPR_PIR]);
+ } else if (env->spr_cb[SPR_BOOKE_PIR].name) {
+ qemu_fprintf(f, " PIR " TARGET_FMT_lx, env->spr[SPR_BOOKE_PIR]);
+ }
+ qemu_fprintf(f, " CPU#%d\n", cs->cpu_index);
qemu_fprintf(f, "MSR " TARGET_FMT_lx " HID0 " TARGET_FMT_lx " HF "
"%08x iidx %d didx %d\n",
env->msr, env->spr[SPR_HID0], env->hflags,
--
2.41.3
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] target/ppc: Add PIR to ppc_cpu_dump_state() for debug print out
2025-03-16 14:43 [PATCH] target/ppc: Add PIR to ppc_cpu_dump_state() for debug print out BALATON Zoltan
@ 2025-03-17 4:24 ` Nicholas Piggin
0 siblings, 0 replies; 2+ messages in thread
From: Nicholas Piggin @ 2025-03-17 4:24 UTC (permalink / raw)
To: BALATON Zoltan, qemu-devel, qemu-ppc
On Mon Mar 17, 2025 at 12:43 AM AEST, BALATON Zoltan wrote:
> Some CPU variants have a Processor Identification Register which was
> not printed in register dump. Add it to ppc_cpu_dump_state() which is
> used by debug options to print CPU register values.
>
> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Looks okay. I suppose it's not worth a ppc_cpu_get_pir() type function
to get it...
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Thanks,
Nick
> ---
> target/ppc/cpu_init.c | 11 ++++++++---
> 1 file changed, 8 insertions(+), 3 deletions(-)
>
> diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
> index 8b590e7f17..b1f32662ed 100644
> --- a/target/ppc/cpu_init.c
> +++ b/target/ppc/cpu_init.c
> @@ -7606,9 +7606,14 @@ void ppc_cpu_dump_state(CPUState *cs, FILE *f, int flags)
> int i;
>
> qemu_fprintf(f, "NIP " TARGET_FMT_lx " LR " TARGET_FMT_lx " CTR "
> - TARGET_FMT_lx " XER " TARGET_FMT_lx " CPU#%d\n",
> - env->nip, env->lr, env->ctr, cpu_read_xer(env),
> - cs->cpu_index);
> + TARGET_FMT_lx " XER " TARGET_FMT_lx,
> + env->nip, env->lr, env->ctr, cpu_read_xer(env));
> + if (env->spr_cb[SPR_PIR].name) {
> + qemu_fprintf(f, " PIR " TARGET_FMT_lx, env->spr[SPR_PIR]);
> + } else if (env->spr_cb[SPR_BOOKE_PIR].name) {
> + qemu_fprintf(f, " PIR " TARGET_FMT_lx, env->spr[SPR_BOOKE_PIR]);
> + }
> + qemu_fprintf(f, " CPU#%d\n", cs->cpu_index);
> qemu_fprintf(f, "MSR " TARGET_FMT_lx " HID0 " TARGET_FMT_lx " HF "
> "%08x iidx %d didx %d\n",
> env->msr, env->spr[SPR_HID0], env->hflags,
^ permalink raw reply [flat|nested] 2+ messages in thread
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2025-03-16 14:43 [PATCH] target/ppc: Add PIR to ppc_cpu_dump_state() for debug print out BALATON Zoltan
2025-03-17 4:24 ` Nicholas Piggin
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