All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Radim Krčmář" <rkrcmar@ventanamicro.com>
To: "Anup Patel" <anup@brainfault.org>
Cc: <kvm-riscv@lists.infradead.org>, <kvm@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	"Atish Patra" <atishp@atishpatra.org>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Alexandre Ghiti" <alex@ghiti.fr>,
	"Andrew Jones" <ajones@ventanamicro.com>,
	"Mayuresh Chitale" <mchitale@ventanamicro.com>
Subject: Re: [PATCH 3/5] KVM: RISC-V: remove unnecessary SBI reset state
Date: Thu, 08 May 2025 12:02:07 +0200	[thread overview]
Message-ID: <D9QOY9TMQXSX.2VOEKVRCXKOO1@ventanamicro.com> (raw)
In-Reply-To: <CAAhSdy3y0-hz59Nrqvvhp=+cWJe1s50K7EpuZmKBqfy-XQFd1Q@mail.gmail.com>

2025-05-08T11:48:00+05:30, Anup Patel <anup@brainfault.org>:
> On Thu, Apr 3, 2025 at 5:02 PM Radim Krčmář <rkrcmar@ventanamicro.com> wrote:
>>
>> The SBI reset state has only two variables -- pc and a1.
>> The rest is known, so keep only the necessary information.
>>
>> The reset structures make sense if we want userspace to control the
>> reset state (which we do), but I'd still remove them now and reintroduce
>> with the userspace interface later -- we could probably have just a
>> single reset state per VM, instead of a reset state for each VCPU.
>>
>> Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
>
> Queued this patch for Linux-6.16

[5/5] was already applied, which means that [3/5] would be nicer with

  memset(&vcpu->arch.smstateen_csr, 0, sizeof(vcpu->arch.smstateen_csr));

in the new function (kvm_riscv_vcpu_context_reset) where we memset(0)
the other csr context.

Should I add a patch to do that in v2?

Thanks.

-- 
kvm-riscv mailing list
kvm-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/kvm-riscv

WARNING: multiple messages have this Message-ID (diff)
From: "Radim Krčmář" <rkrcmar@ventanamicro.com>
To: "Anup Patel" <anup@brainfault.org>
Cc: <kvm-riscv@lists.infradead.org>, <kvm@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	"Atish Patra" <atishp@atishpatra.org>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Alexandre Ghiti" <alex@ghiti.fr>,
	"Andrew Jones" <ajones@ventanamicro.com>,
	"Mayuresh Chitale" <mchitale@ventanamicro.com>
Subject: Re: [PATCH 3/5] KVM: RISC-V: remove unnecessary SBI reset state
Date: Thu, 08 May 2025 12:02:07 +0200	[thread overview]
Message-ID: <D9QOY9TMQXSX.2VOEKVRCXKOO1@ventanamicro.com> (raw)
In-Reply-To: <CAAhSdy3y0-hz59Nrqvvhp=+cWJe1s50K7EpuZmKBqfy-XQFd1Q@mail.gmail.com>

2025-05-08T11:48:00+05:30, Anup Patel <anup@brainfault.org>:
> On Thu, Apr 3, 2025 at 5:02 PM Radim Krčmář <rkrcmar@ventanamicro.com> wrote:
>>
>> The SBI reset state has only two variables -- pc and a1.
>> The rest is known, so keep only the necessary information.
>>
>> The reset structures make sense if we want userspace to control the
>> reset state (which we do), but I'd still remove them now and reintroduce
>> with the userspace interface later -- we could probably have just a
>> single reset state per VM, instead of a reset state for each VCPU.
>>
>> Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
>
> Queued this patch for Linux-6.16

[5/5] was already applied, which means that [3/5] would be nicer with

  memset(&vcpu->arch.smstateen_csr, 0, sizeof(vcpu->arch.smstateen_csr));

in the new function (kvm_riscv_vcpu_context_reset) where we memset(0)
the other csr context.

Should I add a patch to do that in v2?

Thanks.

WARNING: multiple messages have this Message-ID (diff)
From: "Radim Krčmář" <rkrcmar@ventanamicro.com>
To: "Anup Patel" <anup@brainfault.org>
Cc: <kvm-riscv@lists.infradead.org>, <kvm@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	"Atish Patra" <atishp@atishpatra.org>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Alexandre Ghiti" <alex@ghiti.fr>,
	"Andrew Jones" <ajones@ventanamicro.com>,
	"Mayuresh Chitale" <mchitale@ventanamicro.com>
Subject: Re: [PATCH 3/5] KVM: RISC-V: remove unnecessary SBI reset state
Date: Thu, 08 May 2025 12:02:07 +0200	[thread overview]
Message-ID: <D9QOY9TMQXSX.2VOEKVRCXKOO1@ventanamicro.com> (raw)
In-Reply-To: <CAAhSdy3y0-hz59Nrqvvhp=+cWJe1s50K7EpuZmKBqfy-XQFd1Q@mail.gmail.com>

2025-05-08T11:48:00+05:30, Anup Patel <anup@brainfault.org>:
> On Thu, Apr 3, 2025 at 5:02 PM Radim Krčmář <rkrcmar@ventanamicro.com> wrote:
>>
>> The SBI reset state has only two variables -- pc and a1.
>> The rest is known, so keep only the necessary information.
>>
>> The reset structures make sense if we want userspace to control the
>> reset state (which we do), but I'd still remove them now and reintroduce
>> with the userspace interface later -- we could probably have just a
>> single reset state per VM, instead of a reset state for each VCPU.
>>
>> Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
>
> Queued this patch for Linux-6.16

[5/5] was already applied, which means that [3/5] would be nicer with

  memset(&vcpu->arch.smstateen_csr, 0, sizeof(vcpu->arch.smstateen_csr));

in the new function (kvm_riscv_vcpu_context_reset) where we memset(0)
the other csr context.

Should I add a patch to do that in v2?

Thanks.

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2025-05-08 10:02 UTC|newest]

Thread overview: 105+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-03 11:25 [PATCH 0/5] KVM: RISC-V: VCPU reset fixes Radim Krčmář
2025-04-03 11:25 ` Radim Krčmář
2025-04-03 11:25 ` Radim Krčmář
2025-04-03 11:25 ` [PATCH 1/5] KVM: RISC-V: refactor vector state reset Radim Krčmář
2025-04-03 11:25   ` Radim Krčmář
2025-04-03 11:25   ` Radim Krčmář
2025-04-25 12:56   ` Andrew Jones
2025-04-25 12:56     ` Andrew Jones
2025-04-25 12:56     ` Andrew Jones
2025-05-07 11:43   ` Anup Patel
2025-05-07 11:43     ` Anup Patel
2025-05-07 11:43     ` Anup Patel
2025-04-03 11:25 ` [PATCH 2/5] KVM: RISC-V: refactor sbi reset request Radim Krčmář
2025-04-03 11:25   ` Radim Krčmář
2025-04-03 11:25   ` Radim Krčmář
2025-04-25 12:58   ` Andrew Jones
2025-04-25 12:58     ` Andrew Jones
2025-04-25 12:58     ` Andrew Jones
2025-05-07 12:01   ` Anup Patel
2025-05-07 12:01     ` Anup Patel
2025-05-07 12:01     ` Anup Patel
2025-05-07 17:28     ` Radim Krčmář
2025-05-07 17:28       ` Radim Krčmář
2025-05-07 17:28       ` Radim Krčmář
2025-05-08  5:02       ` Anup Patel
2025-05-08  5:02         ` Anup Patel
2025-05-08  5:02         ` Anup Patel
2025-04-03 11:25 ` [PATCH 3/5] KVM: RISC-V: remove unnecessary SBI reset state Radim Krčmář
2025-04-03 11:25   ` Radim Krčmář
2025-04-03 11:25   ` Radim Krčmář
2025-04-25 13:05   ` Andrew Jones
2025-04-25 13:05     ` Andrew Jones
2025-04-25 13:05     ` Andrew Jones
2025-04-28 12:16   ` Anup Patel
2025-04-28 12:16     ` Anup Patel
2025-04-28 12:16     ` Anup Patel
2025-04-28 18:00     ` Radim Krčmář
2025-04-28 18:00       ` Radim Krčmář
2025-04-28 18:00       ` Radim Krčmář
2025-04-29  5:50       ` Anup Patel
2025-04-29  5:50         ` Anup Patel
2025-04-29  5:50         ` Anup Patel
2025-05-08  6:18   ` Anup Patel
2025-05-08  6:18     ` Anup Patel
2025-05-08  6:18     ` Anup Patel
2025-05-08 10:02     ` Radim Krčmář [this message]
2025-05-08 10:02       ` Radim Krčmář
2025-05-08 10:02       ` Radim Krčmář
2025-05-08 13:11       ` Anup Patel
2025-05-08 13:11         ` Anup Patel
2025-05-08 13:11         ` Anup Patel
2025-04-03 11:25 ` [PATCH 4/5] KVM: RISC-V: reset VCPU state when becoming runnable Radim Krčmář
2025-04-03 11:25   ` Radim Krčmář
2025-04-03 11:25   ` Radim Krčmář
2025-04-25 13:26   ` Andrew Jones
2025-04-25 13:26     ` Andrew Jones
2025-04-25 13:26     ` Andrew Jones
2025-04-25 16:04     ` Radim Krčmář
2025-04-25 16:04       ` Radim Krčmář
2025-04-25 16:04       ` Radim Krčmář
2025-04-28 12:22   ` Anup Patel
2025-04-28 12:22     ` Anup Patel
2025-04-28 12:22     ` Anup Patel
2025-04-28 17:45     ` Radim Krčmář
2025-04-28 17:45       ` Radim Krčmář
2025-04-28 17:45       ` Radim Krčmář
2025-04-29  5:55       ` Anup Patel
2025-04-29  5:55         ` Anup Patel
2025-04-29  5:55         ` Anup Patel
2025-04-29 10:25         ` Radim Krčmář
2025-04-29 10:25           ` Radim Krčmář
2025-04-29 10:25           ` Radim Krčmář
2025-04-29 15:01           ` Anup Patel
2025-04-29 15:01             ` Anup Patel
2025-04-29 15:01             ` Anup Patel
2025-04-29 16:21             ` Radim Krčmář
2025-04-29 16:21               ` Radim Krčmář
2025-04-29 16:21               ` Radim Krčmář
2025-04-30  4:22               ` Anup Patel
2025-04-30  4:22                 ` Anup Patel
2025-04-30  4:22                 ` Anup Patel
2025-04-30  5:26                 ` Anup Patel
2025-04-30  5:26                   ` Anup Patel
2025-04-30  5:26                   ` Anup Patel
2025-04-30  8:29                   ` Radim Krčmář
2025-04-30  8:29                     ` Radim Krčmář
2025-04-30  8:29                     ` Radim Krčmář
2025-04-30 10:17                     ` Anup Patel
2025-04-30 10:17                       ` Anup Patel
2025-04-30 10:17                       ` Anup Patel
2025-04-30 11:45                       ` Radim Krčmář
2025-04-30 11:45                         ` Radim Krčmář
2025-04-30 11:45                         ` Radim Krčmář
2025-04-30 13:02                         ` Anup Patel
2025-04-30 13:02                           ` Anup Patel
2025-04-30 13:02                           ` Anup Patel
2025-04-30 14:38                           ` Radim Krčmář
2025-04-30 14:38                             ` Radim Krčmář
2025-04-30 14:38                             ` Radim Krčmář
2025-04-03 11:25 ` [PATCH 5/5] KVM: RISC-V: reset smstateen CSRs Radim Krčmář
2025-04-03 11:25   ` Radim Krčmář
2025-04-03 11:25   ` Radim Krčmář
2025-04-25 12:38   ` Anup Patel
2025-04-25 12:38     ` Anup Patel
2025-04-25 12:38     ` Anup Patel

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=D9QOY9TMQXSX.2VOEKVRCXKOO1@ventanamicro.com \
    --to=rkrcmar@ventanamicro.com \
    --cc=ajones@ventanamicro.com \
    --cc=alex@ghiti.fr \
    --cc=anup@brainfault.org \
    --cc=aou@eecs.berkeley.edu \
    --cc=atishp@atishpatra.org \
    --cc=kvm-riscv@lists.infradead.org \
    --cc=kvm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=mchitale@ventanamicro.com \
    --cc=palmer@dabbelt.com \
    --cc=paul.walmsley@sifive.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.