Re: [PATCH 2/3] mtd: spi-nor: Add GD25LB512ME GigaDevice flash_info

From: "Michael Walle" <mwalle@kernel.org>
To: "Zixian Zeng" <sycamoremoon376@gmail.com>,
	"Tudor Ambarus" <tudor.ambarus@linaro.org>,
	"Pratyush Yadav" <pratyush@kernel.org>,
	"Miquel Raynal" <miquel.raynal@bootlin.com>,
	"Richard Weinberger" <richard@nod.at>,
	"Vignesh Raghavendra" <vigneshr@ti.com>,
	"Chen Wang" <unicorn_wang@outlook.com>,
	"Inochi Amaoto" <inochiama@gmail.com>,
	"Mark Brown" <broonie@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Alexandre Ghiti" <alex@ghiti.fr>,
	"Longbin Li" <looong.bin@gmail.com>
Cc: <linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	<sophgo@lists.linux.dev>, <linux-spi@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
	<dlan@gentoo.org>, <ziyao@disroot.org>
Subject: Re: [PATCH 2/3] mtd: spi-nor: Add GD25LB512ME GigaDevice flash_info
Date: Fri, 23 May 2025 13:16:50 +0200	[thread overview]
Message-ID: <DA3HXNN7HTD2.2NUKORU5V6CS2@kernel.org> (raw)
In-Reply-To: <20250523-sfg-spifmc-v1-2-4cf16cf3fd2a@gmail.com>

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Hi,

> Add GD25LB512ME SPI-NOR flash information

Please have a look at [1].

This flash supports SFDP, do you really need a new entry in the
flashdb? Could you try without it?

In any case, could you please dump the SFDP see [1], too.

[1] https://docs.kernel.org/driver-api/mtd/spi-nor.html

> Signed-off-by: Zixian Zeng <sycamoremoon376@gmail.com>
> ---
>  drivers/mtd/spi-nor/gigadevice.c | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
>
> diff --git a/drivers/mtd/spi-nor/gigadevice.c b/drivers/mtd/spi-nor/gigadevice.c
> index ef1edd0add70e6ca501620798a779d621d6bb00d..223b2f598ecd651ce8df6789dfbaf938c534f94f 100644
> --- a/drivers/mtd/spi-nor/gigadevice.c
> +++ b/drivers/mtd/spi-nor/gigadevice.c
> @@ -33,6 +33,15 @@ static const struct spi_nor_fixups gd25q256_fixups = {
>  	.post_bfpt = gd25q256_post_bfpt,
>  };
>  
> +static void gd25lb512me_default_init(struct spi_nor *nor)
> +{
> +	nor->params->quad_enable = spi_nor_sr1_bit6_quad_enable;

Should be automatically set, by SFDP.

> +}
> +
> +static const struct spi_nor_fixups gd25lb512me_fixups = {
> +	.default_init = gd25lb512me_default_init,
> +};
> +
>  static const struct flash_info gigadevice_nor_parts[] = {
>  	{
>  		.id = SNOR_ID(0xc8, 0x40, 0x15),
> @@ -82,6 +91,14 @@ static const struct flash_info gigadevice_nor_parts[] = {
>  		.size = SZ_16M,
>  		.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
>  		.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
> +	}, {
> +		.id = SNOR_ID(0xc8, 0x67, 0x1a),
> +		.name = "gd25lb512me",

No name,

> +		.size = SZ_64M,
> +		.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
> +		.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
No, no_sfdp_flags, as this flash supports SFDP.

> +		.fixups = &gd25lb512me_fixups,
> +		.fixup_flags = SPI_NOR_4B_OPCODES,
>  	},
>  };
>  

-michael

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