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From: Conor Dooley <conor@kernel.org>
To: kvm-riscv@lists.infradead.org
Subject: [PATCH v2 2/7] RISC-V: Detect AIA CSRs from ISA string
Date: Thu, 09 Feb 2023 23:31:36 -0000	[thread overview]
Message-ID: <Y+WCTDgtTwLB/8re@spud> (raw)
In-Reply-To: <CAK9=C2VeyJMHocZMQTZoULveAcH0kdH2vBKZYFt5kq9dMYP_Bw@mail.gmail.com>

Hey all,

Just circling back to this one, since the reply from Palmer was to
another thread with a much smaller CC list.

On Wed, Feb 08, 2023 at 08:27:23PM +0530, Anup Patel wrote:
> On Wed, Feb 8, 2023 at 6:27 PM Conor Dooley <conor.dooley@microchip.com> wrote:
> > On Wed, Feb 08, 2023 at 09:24:28AM +0530, Anup Patel wrote:

> > > The presence of S*aia in ISA string only implies that AIA extended
> > > local interrupt CSRs are implemented by the underlying RISC-V
> > > implementation.
> >
> > Would you mind linking to where this is documented & explaining in your
> > commit message why it is okay operate on the basis of s*aia in the ISA
> > string only mandates the presence of the CSRs and nothing more.
> >
> > I think when I was reading it last night, I saw some commentary in this
> > vein in Section 1.6 of the rc2 spec. Although IIRC it noted changes in
> > interrupt behaviour there too, so I'm not sure if that section is what you
> > are referring to here.
> >
> > Perhaps this is all just a good argument for providing more information
> > in commit messages ;)
> 
> Sure, I am anyway going to send v3 after rebase so I will cite the
> Section 1.6 of AIA spec in the commit description.

We had a nice conversation about this on during the weekly patchwork
sync call :)
The end result of that one was "inconclusive" and the outcome appears to
be that we will wait until the entire spec is frozen before doing
anything here.
Palmer left a comment in response to another thread to that effect:
https://lore.kernel.org/linux-riscv/mhng-474f7ecd-65b8-4cfa-8b75-e51b896cc58e at palmer-ri-x1c9/

Cheers,
Conor.

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WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor@kernel.org>
To: Anup Patel <apatel@ventanamicro.com>
Cc: Conor Dooley <conor.dooley@microchip.com>,
	Atish Patra <atishp@atishpatra.org>,
	Stephano Cetola <stephano@riscv.org>,
	Jeff Scheel <jeff@riscv.org>, Palmer Dabbelt <palmer@dabbelt.com>,
	pbonzini@redhat.com, Paul Walmsley <paul.walmsley@sifive.com>,
	ajones@ventanamicro.com, anup@brainfault.org,
	kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/7] RISC-V: Detect AIA CSRs from ISA string
Date: Thu, 9 Feb 2023 23:31:24 +0000	[thread overview]
Message-ID: <Y+WCTDgtTwLB/8re@spud> (raw)
In-Reply-To: <CAK9=C2VeyJMHocZMQTZoULveAcH0kdH2vBKZYFt5kq9dMYP_Bw@mail.gmail.com>


[-- Attachment #1.1: Type: text/plain, Size: 1662 bytes --]

Hey all,

Just circling back to this one, since the reply from Palmer was to
another thread with a much smaller CC list.

On Wed, Feb 08, 2023 at 08:27:23PM +0530, Anup Patel wrote:
> On Wed, Feb 8, 2023 at 6:27 PM Conor Dooley <conor.dooley@microchip.com> wrote:
> > On Wed, Feb 08, 2023 at 09:24:28AM +0530, Anup Patel wrote:

> > > The presence of S*aia in ISA string only implies that AIA extended
> > > local interrupt CSRs are implemented by the underlying RISC-V
> > > implementation.
> >
> > Would you mind linking to where this is documented & explaining in your
> > commit message why it is okay operate on the basis of s*aia in the ISA
> > string only mandates the presence of the CSRs and nothing more.
> >
> > I think when I was reading it last night, I saw some commentary in this
> > vein in Section 1.6 of the rc2 spec. Although IIRC it noted changes in
> > interrupt behaviour there too, so I'm not sure if that section is what you
> > are referring to here.
> >
> > Perhaps this is all just a good argument for providing more information
> > in commit messages ;)
> 
> Sure, I am anyway going to send v3 after rebase so I will cite the
> Section 1.6 of AIA spec in the commit description.

We had a nice conversation about this on during the weekly patchwork
sync call :)
The end result of that one was "inconclusive" and the outcome appears to
be that we will wait until the entire spec is frozen before doing
anything here.
Palmer left a comment in response to another thread to that effect:
https://lore.kernel.org/linux-riscv/mhng-474f7ecd-65b8-4cfa-8b75-e51b896cc58e@palmer-ri-x1c9/

Cheers,
Conor.


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WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor@kernel.org>
To: Anup Patel <apatel@ventanamicro.com>
Cc: Conor Dooley <conor.dooley@microchip.com>,
	Atish Patra <atishp@atishpatra.org>,
	Stephano Cetola <stephano@riscv.org>,
	Jeff Scheel <jeff@riscv.org>, Palmer Dabbelt <palmer@dabbelt.com>,
	pbonzini@redhat.com, Paul Walmsley <paul.walmsley@sifive.com>,
	ajones@ventanamicro.com, anup@brainfault.org,
	kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/7] RISC-V: Detect AIA CSRs from ISA string
Date: Thu, 9 Feb 2023 23:31:24 +0000	[thread overview]
Message-ID: <Y+WCTDgtTwLB/8re@spud> (raw)
In-Reply-To: <CAK9=C2VeyJMHocZMQTZoULveAcH0kdH2vBKZYFt5kq9dMYP_Bw@mail.gmail.com>

[-- Attachment #1: Type: text/plain, Size: 1662 bytes --]

Hey all,

Just circling back to this one, since the reply from Palmer was to
another thread with a much smaller CC list.

On Wed, Feb 08, 2023 at 08:27:23PM +0530, Anup Patel wrote:
> On Wed, Feb 8, 2023 at 6:27 PM Conor Dooley <conor.dooley@microchip.com> wrote:
> > On Wed, Feb 08, 2023 at 09:24:28AM +0530, Anup Patel wrote:

> > > The presence of S*aia in ISA string only implies that AIA extended
> > > local interrupt CSRs are implemented by the underlying RISC-V
> > > implementation.
> >
> > Would you mind linking to where this is documented & explaining in your
> > commit message why it is okay operate on the basis of s*aia in the ISA
> > string only mandates the presence of the CSRs and nothing more.
> >
> > I think when I was reading it last night, I saw some commentary in this
> > vein in Section 1.6 of the rc2 spec. Although IIRC it noted changes in
> > interrupt behaviour there too, so I'm not sure if that section is what you
> > are referring to here.
> >
> > Perhaps this is all just a good argument for providing more information
> > in commit messages ;)
> 
> Sure, I am anyway going to send v3 after rebase so I will cite the
> Section 1.6 of AIA spec in the commit description.

We had a nice conversation about this on during the weekly patchwork
sync call :)
The end result of that one was "inconclusive" and the outcome appears to
be that we will wait until the entire spec is frozen before doing
anything here.
Palmer left a comment in response to another thread to that effect:
https://lore.kernel.org/linux-riscv/mhng-474f7ecd-65b8-4cfa-8b75-e51b896cc58e@palmer-ri-x1c9/

Cheers,
Conor.


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  reply	other threads:[~2023-02-09 23:31 UTC|newest]

Thread overview: 111+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-28  7:27 [PATCH v2 0/7] RISC-V KVM virtualize AIA CSRs Anup Patel
2023-01-28  7:27 ` Anup Patel
2023-01-28  7:27 ` Anup Patel
2023-01-28  7:27 ` [PATCH v2 1/7] RISC-V: Add AIA related CSR defines Anup Patel
2023-01-28  7:27   ` Anup Patel
2023-01-28  7:27   ` Anup Patel
2023-01-31  9:22   ` Atish Patra
2023-01-31  9:22     ` Atish Patra
2023-01-31  9:22     ` Atish Patra
2023-02-03  0:24   ` Palmer Dabbelt
2023-02-03  0:24     ` Palmer Dabbelt
2023-02-03  0:24     ` Palmer Dabbelt
2023-01-28  7:27 ` [PATCH v2 2/7] RISC-V: Detect AIA CSRs from ISA string Anup Patel
2023-01-28  7:27   ` Anup Patel
2023-01-28  7:27   ` Anup Patel
2023-01-31  9:25   ` Atish Patra
2023-01-31  9:25     ` Atish Patra
2023-01-31  9:25     ` Atish Patra
2023-02-03  0:24   ` Palmer Dabbelt
2023-02-03  0:24     ` Palmer Dabbelt
2023-02-03  0:24     ` Palmer Dabbelt
2023-02-03 12:01     ` Anup Patel
2023-02-03 12:01       ` Anup Patel
2023-02-03 12:01       ` Anup Patel
2023-02-07 18:05       ` Conor Dooley
2023-02-07 18:05         ` Conor Dooley
2023-02-07 18:05         ` Conor Dooley
2023-02-07 18:09         ` Conor Dooley
2023-02-07 18:09           ` Conor Dooley
2023-02-07 18:09           ` Conor Dooley
2023-02-07 18:15         ` Atish Patra
2023-02-07 18:15           ` Atish Patra
2023-02-07 18:15           ` Atish Patra
2023-02-07 20:39           ` Conor Dooley
2023-02-07 20:39             ` Conor Dooley
2023-02-07 20:39             ` Conor Dooley
2023-02-08  3:54             ` Anup Patel
2023-02-08  3:54               ` Anup Patel
2023-02-08  3:54               ` Anup Patel
2023-02-08 12:57               ` Conor Dooley
2023-02-08 12:57                 ` Conor Dooley
2023-02-08 12:57                 ` Conor Dooley
2023-02-08 14:57                 ` Anup Patel
2023-02-08 14:57                   ` Anup Patel
2023-02-08 14:57                   ` Anup Patel
2023-02-09 23:31                   ` Conor Dooley [this message]
2023-02-09 23:31                     ` Conor Dooley
2023-02-09 23:31                     ` Conor Dooley
2023-02-08  3:06           ` Anup Patel
2023-02-08  3:06             ` Anup Patel
2023-02-08  3:06             ` Anup Patel
2023-02-15 15:41     ` Christoph Müllner
2023-02-15 15:41       ` Christoph Müllner
2023-02-15 15:41       ` Christoph Müllner
2023-02-21  7:12       ` Christoph Müllner
2023-02-21  7:12         ` Christoph Müllner
2023-02-21  7:12         ` Christoph Müllner
2023-02-21 10:40         ` Conor Dooley
2023-02-21 10:41           ` Conor Dooley
2023-02-21 10:40           ` Conor Dooley
2023-02-21 10:51           ` Jessica Clarke
2023-02-21 10:51             ` Jessica Clarke
2023-02-21 10:51             ` Jessica Clarke
2023-02-21 10:59             ` Conor Dooley
2023-02-21 11:00               ` Conor Dooley
2023-02-21 10:59               ` Conor Dooley
2023-02-21 11:03               ` Christoph Müllner
2023-02-21 11:03                 ` Christoph Müllner
2023-02-21 11:03                 ` Christoph Müllner
2023-02-21 11:22                 ` Conor Dooley
2023-02-21 11:22                   ` Conor Dooley
2023-02-21 11:22                   ` Conor Dooley
2023-03-31 12:53     ` Anup Patel
2023-03-31 12:53       ` Anup Patel
2023-03-31 12:53       ` Anup Patel
2023-01-28  7:27 ` [PATCH v2 3/7] RISC-V: KVM: Drop the _MASK suffix from hgatp.VMID mask defines Anup Patel
2023-01-28  7:27   ` Anup Patel
2023-01-28  7:27   ` Anup Patel
2023-01-31  9:27   ` Atish Patra
2023-01-31  9:27     ` Atish Patra
2023-01-31  9:27     ` Atish Patra
2023-01-28  7:27 ` [PATCH v2 4/7] RISC-V: KVM: Initial skeletal support for AIA Anup Patel
2023-01-28  7:27   ` Anup Patel
2023-01-28  7:27   ` Anup Patel
2023-01-31  9:51   ` Atish Patra
2023-01-31  9:51     ` Atish Patra
2023-01-31  9:51     ` Atish Patra
2023-01-28  7:27 ` [PATCH v2 5/7] RISC-V: KVM: Add ONE_REG interface for AIA CSRs Anup Patel
2023-01-28  7:27   ` Anup Patel
2023-01-28  7:27   ` Anup Patel
2023-02-08  0:04   ` Atish Patra
2023-02-08  0:04     ` Atish Patra
2023-02-08  0:04     ` Atish Patra
2023-03-31 17:15     ` Anup Patel
2023-03-31 17:15       ` Anup Patel
2023-03-31 17:15       ` Anup Patel
2023-01-28  7:27 ` [PATCH v2 6/7] RISC-V: KVM: Virtualize per-HART " Anup Patel
2023-01-28  7:27   ` Anup Patel
2023-01-28  7:27   ` Anup Patel
2023-01-28  7:27 ` [PATCH v2 7/7] RISC-V: KVM: Implement guest external interrupt line management Anup Patel
2023-01-28  7:27   ` Anup Patel
2023-01-28  7:27   ` Anup Patel
2023-02-08  0:15   ` Atish Patra
2023-02-08  0:15     ` Atish Patra
2023-02-08  0:15     ` Atish Patra
2023-03-31 17:15     ` Anup Patel
2023-03-31 17:15       ` Anup Patel
2023-03-31 17:15       ` Anup Patel
2023-01-31  6:01 ` [PATCH v2 0/7] RISC-V KVM virtualize AIA CSRs Anup Patel
2023-01-31  6:01   ` Anup Patel
2023-01-31  6:01   ` Anup Patel

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