[PATCH 0/2] gpio: pca953x: Add interrupt mask support for pca953x chips

[PATCH 0/2] gpio: pca953x: Add interrupt mask support for pca953x chips

[Levente Révész]

Hello,

Some chips in the pca953x family have an interrupt mask register in
addition to the standard 4 registers:

    0: INPUT
    1: OUTPUT
    2: POLARITY
    3: CONFIGURATION
    4: INTERRUPT MASK

Chips with this register:

    - pca9505
    - pca9506
    - pca9698

The interrupt mask register defaults to all interrupts disabled, so
interrupts are unusable unless the driver sets this register.

Interrupt masking is already implemented for pcal chips. That
implementation could be extended to support this register as well.

This patch series adds support for the interrupt mask register in
mentioned pca chips.

Note 1:

    Interrupt support for the pca9698 is not enabled currently, so the
    interrupt mask support has not been turned on either. An additional
    patch in this series could enable support for it, although I have no
    hardware to test with.

Kind regards,
Levente

Levente Révész (2):
  gpio: pca953x: Generalize interrupt mask register handling
  gpio: pca953x: Add interrupt mask support for chips with the standard
    register set

 drivers/gpio/gpio-pca953x.c | 81 +++++++++++++++++++++++++------------
 1 file changed, 56 insertions(+), 25 deletions(-)

-- 
2.37.3

[PATCH 1/2] gpio: pca953x: Generalize interrupt mask register handling

[Levente Révész]

This change is necessary for a following patch, which introduces an
interrupt mask register different from what is already in the driver.

Currenty the only interrupt mask register the driver handles is
PCAL953x_INT_MASK present in the pcal chips. The functions handling
this register can easily be made generic enough to handle the interrupt
mask register of other chips that do not use the pcal register set,
and have their interrupt mask register at a different address.

Add bit flag PCA_HAS_INT_MASK, which is set for each chip with an
interrupt mask register (including pcal chips).

Define a convenience bitmask PCA_MASKED_INT similar to PCA_LATCH_INT.

Add an int_mask member to struct pca953x_reg_config. This way interrupt
mask handling code can work with registers at different addresses.

Add separate pca953x_reg_config for pcal953x chips. This differs from
the pca953x_regs in the new int_mask field.

In pca953x_readable_register and pca953x_writeable_register only check for
PCA_PCAL if the chip is not PCA957X_TYPE. No chip is both pca957x and pcal.
This makes logic for adding a different interrupt mask register
cleaner.

Signed-off-by: Levente Révész <levente.revesz@eilabs.com>
---
 drivers/gpio/gpio-pca953x.c | 64 +++++++++++++++++++++++++------------
 1 file changed, 43 insertions(+), 21 deletions(-)

diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c
index 61e874c0cde4..71bfc38c3930 100644
--- a/drivers/gpio/gpio-pca953x.c
+++ b/drivers/gpio/gpio-pca953x.c
@@ -63,7 +63,9 @@
 
 #define PCA_INT			BIT(8)
 #define PCA_PCAL		BIT(9)
-#define PCA_LATCH_INT		(PCA_PCAL | PCA_INT)
+#define PCA_HAS_INT_MASK	BIT(10)
+#define PCA_MASKED_INT		(PCA_HAS_INT_MASK | PCA_INT)
+#define PCA_LATCH_INT		(PCA_PCAL | PCA_MASKED_INT)
 #define PCA953X_TYPE		BIT(12)
 #define PCA957X_TYPE		BIT(13)
 #define PCAL653X_TYPE		BIT(14)
@@ -177,6 +179,7 @@ struct pca953x_reg_config {
 	int output;
 	int input;
 	int invert;
+	int int_mask;
 };
 
 static const struct pca953x_reg_config pca953x_regs = {
@@ -186,6 +189,14 @@ static const struct pca953x_reg_config pca953x_regs = {
 	.invert = PCA953X_INVERT,
 };
 
+static const struct pca953x_reg_config pcal953x_regs = {
+	.direction = PCA953X_DIRECTION,
+	.output = PCA953X_OUTPUT,
+	.input = PCA953X_INPUT,
+	.invert = PCA953X_INVERT,
+	.int_mask = PCAL953X_INT_MASK,
+};
+
 static const struct pca953x_reg_config pca957x_regs = {
 	.direction = PCA957X_CFG,
 	.output = PCA957X_OUT,
@@ -356,12 +367,13 @@ static bool pca953x_readable_register(struct device *dev, unsigned int reg)
 	} else {
 		bank = PCA953x_BANK_INPUT | PCA953x_BANK_OUTPUT |
 		       PCA953x_BANK_POLARITY | PCA953x_BANK_CONFIG;
-	}
 
-	if (chip->driver_data & PCA_PCAL) {
-		bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
-			PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK |
-			PCAL9xxx_BANK_IRQ_STAT;
+		if (chip->driver_data & PCA_PCAL)
+			bank |= PCAL9xxx_BANK_IN_LATCH |
+				PCAL9xxx_BANK_PULL_EN |
+				PCAL9xxx_BANK_PULL_SEL |
+				PCAL9xxx_BANK_IRQ_MASK |
+				PCAL9xxx_BANK_IRQ_STAT;
 	}
 
 	return chip->check_reg(chip, reg, bank);
@@ -378,11 +390,13 @@ static bool pca953x_writeable_register(struct device *dev, unsigned int reg)
 	} else {
 		bank = PCA953x_BANK_OUTPUT | PCA953x_BANK_POLARITY |
 			PCA953x_BANK_CONFIG;
-	}
 
-	if (chip->driver_data & PCA_PCAL)
-		bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
-			PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK;
+		if (chip->driver_data & PCA_PCAL)
+			bank |= PCAL9xxx_BANK_IN_LATCH |
+				PCAL9xxx_BANK_PULL_EN |
+				PCAL9xxx_BANK_PULL_SEL |
+				PCAL9xxx_BANK_IRQ_MASK;
+	}
 
 	return chip->check_reg(chip, reg, bank);
 }
@@ -764,14 +778,16 @@ static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
 	DECLARE_BITMAP(reg_direction, MAX_LINE);
 	int level;
 
-	if (chip->driver_data & PCA_PCAL) {
-		/* Enable latch on interrupt-enabled inputs */
-		pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
-
+	if (chip->driver_data & PCA_HAS_INT_MASK) {
 		bitmap_complement(irq_mask, chip->irq_mask, gc->ngpio);
 
 		/* Unmask enabled interrupts */
-		pca953x_write_regs(chip, PCAL953X_INT_MASK, irq_mask);
+		pca953x_write_regs(chip, chip->regs->int_mask, irq_mask);
+	}
+
+	if (chip->driver_data & PCA_PCAL) {
+		/* Enable latch on interrupt-enabled inputs */
+		pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
 	}
 
 	/* Switch direction to input if needed */
@@ -1171,7 +1187,11 @@ static int pca953x_probe(struct i2c_client *client,
 		chip->regs = &pca957x_regs;
 		ret = device_pca957x_init(chip, invert);
 	} else {
-		chip->regs = &pca953x_regs;
+		if (chip->driver_data & PCA_PCAL)
+			chip->regs = &pcal953x_regs;
+		else
+			chip->regs = &pca953x_regs;
+
 		ret = device_pca95xx_init(chip, invert);
 	}
 	if (ret)
@@ -1245,21 +1265,23 @@ static int pca953x_regcache_sync(struct device *dev)
 	}
 
 #ifdef CONFIG_GPIO_PCA953X_IRQ
-	if (chip->driver_data & PCA_PCAL) {
-		regaddr = chip->recalc_addr(chip, PCAL953X_IN_LATCH, 0);
+	if (chip->driver_data & PCA_HAS_INT_MASK) {
+		regaddr = pca953x_recalc_addr(chip, chip->regs->int_mask, 0);
 		ret = regcache_sync_region(chip->regmap, regaddr,
 					   regaddr + NBANK(chip) - 1);
 		if (ret) {
-			dev_err(dev, "Failed to sync INT latch registers: %d\n",
+			dev_err(dev, "Failed to sync INT mask registers: %d\n",
 				ret);
 			return ret;
 		}
+	}
 
-		regaddr = chip->recalc_addr(chip, PCAL953X_INT_MASK, 0);
+	if (chip->driver_data & PCA_PCAL) {
+		regaddr = chip->recalc_addr(chip, PCAL953X_IN_LATCH, 0);
 		ret = regcache_sync_region(chip->regmap, regaddr,
 					   regaddr + NBANK(chip) - 1);
 		if (ret) {
-			dev_err(dev, "Failed to sync INT mask registers: %d\n",
+			dev_err(dev, "Failed to sync INT latch registers: %d\n",
 				ret);
 			return ret;
 		}
-- 
2.37.3

Re: [PATCH 1/2] gpio: pca953x: Generalize interrupt mask register handling

[Martyn Welch]

On Mon, 2022-10-10 at 15:20 +0200, Levente Révész wrote:
> @@ -1245,21 +1265,23 @@ static int pca953x_regcache_sync(struct
> device *dev)
>         }
>  
>  #ifdef CONFIG_GPIO_PCA953X_IRQ
> -       if (chip->driver_data & PCA_PCAL) {
> -               regaddr = chip->recalc_addr(chip, PCAL953X_IN_LATCH,
> 0);
> +       if (chip->driver_data & PCA_HAS_INT_MASK) {
> +               regaddr = pca953x_recalc_addr(chip, chip->regs-
> >int_mask, 0);

For consistency, this should probably continue using 
chip->recalc_addr().

Martyn

>                 ret = regcache_sync_region(chip->regmap, regaddr,
>                                            regaddr + NBANK(chip) -
> 1);
>                 if (ret) {
> -                       dev_err(dev, "Failed to sync INT latch
> registers: %d\n",
> +                       dev_err(dev, "Failed to sync INT mask
> registers: %d\n",
>                                 ret);
>                         return ret;
>                 }
> +       }
>  
> -               regaddr = chip->recalc_addr(chip, PCAL953X_INT_MASK,
> 0);
> +       if (chip->driver_data & PCA_PCAL) {
> +               regaddr = chip->recalc_addr(chip, PCAL953X_IN_LATCH,
> 0);
>                 ret = regcache_sync_region(chip->regmap, regaddr,
>                                            regaddr + NBANK(chip) -
> 1);
>                 if (ret) {
> -                       dev_err(dev, "Failed to sync INT mask
> registers: %d\n",
> +                       dev_err(dev, "Failed to sync INT latch
> registers: %d\n",
>                                 ret);
>                         return ret;
>                 }

[PATCH 2/2] gpio: pca953x: Add interrupt mask support for chips with the standard register set

[Levente Révész]

Some chips in the pca953x family in addition to the standard 4
registers have a fifth interrupt mask register:

    0: INPUT
    1: OUTPUT
    2: POLARITY
    3: CONFIGURATION
    4: INTERRUPT MASK

Chips with this register:

    - pca9505
    - pca9506
    - pca9698

Otherwise the interrupt mask register works exactly the same as the
corresponding register in the already supported pcal chips.

Add PCA_953X_INT_MASK register. Use it as the interrupt register of
(non-pcal) pca953x chips.

Set pca9505 and pca9506 to use this register.

Signed-off-by: Levente Révész <levente.revesz@eilabs.com>
---
 drivers/gpio/gpio-pca953x.c | 17 +++++++++++++----
 1 file changed, 13 insertions(+), 4 deletions(-)

diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c
index 71bfc38c3930..bb8355540a46 100644
--- a/drivers/gpio/gpio-pca953x.c
+++ b/drivers/gpio/gpio-pca953x.c
@@ -28,6 +28,7 @@
 #define PCA953X_OUTPUT		0x01
 #define PCA953X_INVERT		0x02
 #define PCA953X_DIRECTION	0x03
+#define PCA953X_INT_MASK	0x04
 
 #define REG_ADDR_MASK		GENMASK(5, 0)
 #define REG_ADDR_EXT		BIT(6)
@@ -76,8 +77,8 @@
 static const struct i2c_device_id pca953x_id[] = {
 	{ "pca6408", 8  | PCA953X_TYPE | PCA_INT, },
 	{ "pca6416", 16 | PCA953X_TYPE | PCA_INT, },
-	{ "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
-	{ "pca9506", 40 | PCA953X_TYPE | PCA_INT, },
+	{ "pca9505", 40 | PCA953X_TYPE | PCA_MASKED_INT, },
+	{ "pca9506", 40 | PCA953X_TYPE | PCA_MASKED_INT, },
 	{ "pca9534", 8  | PCA953X_TYPE | PCA_INT, },
 	{ "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
 	{ "pca9536", 4  | PCA953X_TYPE, },
@@ -187,6 +188,7 @@ static const struct pca953x_reg_config pca953x_regs = {
 	.output = PCA953X_OUTPUT,
 	.input = PCA953X_INPUT,
 	.invert = PCA953X_INVERT,
+	.int_mask = PCA953X_INT_MASK,
 };
 
 static const struct pca953x_reg_config pcal953x_regs = {
@@ -240,6 +242,7 @@ static int pca953x_bank_shift(struct pca953x_chip *chip)
 #define PCA953x_BANK_OUTPUT	BIT(1)
 #define PCA953x_BANK_POLARITY	BIT(2)
 #define PCA953x_BANK_CONFIG	BIT(3)
+#define PCA953x_BANK_INT_MASK	BIT(4)
 
 #define PCA957x_BANK_INPUT	BIT(0)
 #define PCA957x_BANK_POLARITY	BIT(1)
@@ -261,6 +264,8 @@ static int pca953x_bank_shift(struct pca953x_chip *chip)
  *     Output port			0x00 + 1 * bank_size	RW
  *     Polarity Inversion port		0x00 + 2 * bank_size	RW
  *     Configuration port		0x00 + 3 * bank_size	RW
+ *   - Some chips have the standard layout with additional interrupt mask:
+ *     Interrupt Mask port		0x00 + 4 * bank_size	RW
  *   - PCA957x with mixed up registers
  *     Input port			0x00 + 0 * bank_size	R
  *     Polarity Inversion port		0x00 + 1 * bank_size	RW
@@ -374,6 +379,8 @@ static bool pca953x_readable_register(struct device *dev, unsigned int reg)
 				PCAL9xxx_BANK_PULL_SEL |
 				PCAL9xxx_BANK_IRQ_MASK |
 				PCAL9xxx_BANK_IRQ_STAT;
+		else if (chip->driver_data & PCA_HAS_INT_MASK)
+			bank |= PCA953x_BANK_INT_MASK;
 	}
 
 	return chip->check_reg(chip, reg, bank);
@@ -396,6 +403,8 @@ static bool pca953x_writeable_register(struct device *dev, unsigned int reg)
 				PCAL9xxx_BANK_PULL_EN |
 				PCAL9xxx_BANK_PULL_SEL |
 				PCAL9xxx_BANK_IRQ_MASK;
+		else if (chip->driver_data & PCA_HAS_INT_MASK)
+			bank |= PCA953x_BANK_INT_MASK;
 	}
 
 	return chip->check_reg(chip, reg, bank);
@@ -1342,8 +1351,8 @@ static int pca953x_resume(struct device *dev)
 static const struct of_device_id pca953x_dt_ids[] = {
 	{ .compatible = "nxp,pca6408", .data = OF_953X(8, PCA_INT), },
 	{ .compatible = "nxp,pca6416", .data = OF_953X(16, PCA_INT), },
-	{ .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
-	{ .compatible = "nxp,pca9506", .data = OF_953X(40, PCA_INT), },
+	{ .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_MASKED_INT), },
+	{ .compatible = "nxp,pca9506", .data = OF_953X(40, PCA_MASKED_INT), },
 	{ .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
 	{ .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
 	{ .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
-- 
2.37.3

Re: [PATCH 0/2] gpio: pca953x: Add interrupt mask support for pca953x chips

[Linus Walleij]

On Mon, Oct 10, 2022 at 3:23 PM Levente Révész
<levente.revesz@eilabs.com> wrote:

> Some chips in the pca953x family have an interrupt mask register in
> addition to the standard 4 registers:
>
>     0: INPUT
>     1: OUTPUT
>     2: POLARITY
>     3: CONFIGURATION
>     4: INTERRUPT MASK
>
> Chips with this register:
>
>     - pca9505
>     - pca9506
>     - pca9698
>
> The interrupt mask register defaults to all interrupts disabled, so
> interrupts are unusable unless the driver sets this register.
>
> Interrupt masking is already implemented for pcal chips. That
> implementation could be extended to support this register as well.
>
> This patch series adds support for the interrupt mask register in
> mentioned pca chips.

Added some PCA953x users to the To-line, lots of people use
this driver so please review!

Yours,
Linus Walleij

Re: [PATCH 0/2] gpio: pca953x: Add interrupt mask support for pca953x chips

[Andy Shevchenko]

On Mon, Oct 17, 2022 at 12:02:16PM +0200, Linus Walleij wrote:
> On Mon, Oct 10, 2022 at 3:23 PM Levente Révész
> <levente.revesz@eilabs.com> wrote:
> 
> > Some chips in the pca953x family have an interrupt mask register in
> > addition to the standard 4 registers:
> >
> >     0: INPUT
> >     1: OUTPUT
> >     2: POLARITY
> >     3: CONFIGURATION
> >     4: INTERRUPT MASK
> >
> > Chips with this register:
> >
> >     - pca9505
> >     - pca9506
> >     - pca9698
> >
> > The interrupt mask register defaults to all interrupts disabled, so
> > interrupts are unusable unless the driver sets this register.
> >
> > Interrupt masking is already implemented for pcal chips. That
> > implementation could be extended to support this register as well.
> >
> > This patch series adds support for the interrupt mask register in
> > mentioned pca chips.
> 
> Added some PCA953x users to the To-line, lots of people use
> this driver so please review!

Thank you for Cc'ing me!

At first glance I think this needs two prerequisite patches:

1) convert _TYPE from bits to plain numbers, so we will have room
   for up to 16 types;

2) Introducing PCAL953X_TYPE.

After this is done, the current series will be neater.

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH 0/2] gpio: pca953x: Add interrupt mask support for pca953x chips

[Révész, Levente]

On Monday, October 17, 2022 7:31 PM, Andy Shevchenko wrote:
> At first glance I think this needs two prerequisite patches:
>
> 1) convert _TYPE from bits to plain numbers, so we will have room
>    for up to 16 types;
>
> 2) Introducing PCAL953X_TYPE.
>
> After this is done, the current series will be neater.

Thanks for the suggestions!

I have started implementing this change:

    * Convert _TYPE from bits to 4 bit integer

    * Define 4 chip types: PCA953X_TYPE, PCAL953X_TYPE,
                           PCAL653X_TYPE, PCA957X_TYPE

The PCA_PCAL bit is redundant, we know which chip is PCAL from their
chip type. Remove the PCA_PCAL bit and the PCA_LATCH_INT mask.

The now modified bits were also used in the acpi_device_id
initialization:

    static const struct acpi_device_id pca953x_acpi_ids[] = {
        { "INT3491", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
        { }
    };
    MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);

I do not understand what is happening in this snippet. 
What should be the id?

---
Best regards,
Levente

Re: [PATCH 0/2] gpio: pca953x: Add interrupt mask support for pca953x chips

[Andy Shevchenko]

On Wed, Oct 19, 2022 at 10:15:01AM +0000, Révész, Levente wrote:
> On Monday, October 17, 2022 7:31 PM, Andy Shevchenko wrote:
> > At first glance I think this needs two prerequisite patches:
> >
> > 1) convert _TYPE from bits to plain numbers, so we will have room
> >    for up to 16 types;
> >
> > 2) Introducing PCAL953X_TYPE.
> >
> > After this is done, the current series will be neater.
> 
> Thanks for the suggestions!
> 
> I have started implementing this change:
> 
>     * Convert _TYPE from bits to 4 bit integer
> 
>     * Define 4 chip types: PCA953X_TYPE, PCAL953X_TYPE,
>                            PCAL653X_TYPE, PCA957X_TYPE
> 
> The PCA_PCAL bit is redundant, we know which chip is PCAL from their
> chip type. Remove the PCA_PCAL bit and the PCA_LATCH_INT mask.

Sounds good.

> The now modified bits were also used in the acpi_device_id
> initialization:
> 
>     static const struct acpi_device_id pca953x_acpi_ids[] = {
>         { "INT3491", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
>         { }
>     };
>     MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);

I do not see any modifications in the above.

> I do not understand what is happening in this snippet.
> What should be the id?

INT3491 is the ID. The chip behind is (usually) PCAL9555. In the cases
when it's not, there is no associated interrupt line in the ACPI tables,
so it won't hurt, however it's not the best solution made that time.

-- 
With Best Regards,
Andy Shevchenko