Re: [PATCH for-8.0 09/19] target/microblaze: Convert to 3-phase reset

["Edgar E. Iglesias" <edgar.iglesias@gmail.com>]

On Thu, Nov 24, 2022 at 11:50:12AM +0000, Peter Maydell wrote:
> Convert the microblaze CPU class to use 3-phase reset, so it doesn't
> need to use device_class_set_parent_reset() any more.


Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com>


> 
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>  target/microblaze/cpu-qom.h |  4 ++--
>  target/microblaze/cpu.c     | 12 ++++++++----
>  2 files changed, 10 insertions(+), 6 deletions(-)
> 
> diff --git a/target/microblaze/cpu-qom.h b/target/microblaze/cpu-qom.h
> index 255b39a45df..cda9220fa99 100644
> --- a/target/microblaze/cpu-qom.h
> +++ b/target/microblaze/cpu-qom.h
> @@ -30,7 +30,7 @@ OBJECT_DECLARE_CPU_TYPE(MicroBlazeCPU, MicroBlazeCPUClass, MICROBLAZE_CPU)
>  /**
>   * MicroBlazeCPUClass:
>   * @parent_realize: The parent class' realize handler.
> - * @parent_reset: The parent class' reset handler.
> + * @parent_phases: The parent class' reset phase handlers.
>   *
>   * A MicroBlaze CPU model.
>   */
> @@ -40,7 +40,7 @@ struct MicroBlazeCPUClass {
>      /*< public >*/
>  
>      DeviceRealize parent_realize;
> -    DeviceReset parent_reset;
> +    ResettablePhases parent_phases;
>  };
>  
>  
> diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
> index 89e493f3ff7..817681f9b21 100644
> --- a/target/microblaze/cpu.c
> +++ b/target/microblaze/cpu.c
> @@ -162,14 +162,16 @@ static void microblaze_cpu_set_irq(void *opaque, int irq, int level)
>  }
>  #endif
>  
> -static void mb_cpu_reset(DeviceState *dev)
> +static void mb_cpu_reset_hold(Object *obj)
>  {
> -    CPUState *s = CPU(dev);
> +    CPUState *s = CPU(obj);
>      MicroBlazeCPU *cpu = MICROBLAZE_CPU(s);
>      MicroBlazeCPUClass *mcc = MICROBLAZE_CPU_GET_CLASS(cpu);
>      CPUMBState *env = &cpu->env;
>  
> -    mcc->parent_reset(dev);
> +    if (mcc->parent_phases.hold) {
> +        mcc->parent_phases.hold(obj);
> +    }
>  
>      memset(env, 0, offsetof(CPUMBState, end_reset_fields));
>      env->res_addr = RES_ADDR_NONE;
> @@ -399,10 +401,12 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data)
>      DeviceClass *dc = DEVICE_CLASS(oc);
>      CPUClass *cc = CPU_CLASS(oc);
>      MicroBlazeCPUClass *mcc = MICROBLAZE_CPU_CLASS(oc);
> +    ResettableClass *rc = RESETTABLE_CLASS(oc);
>  
>      device_class_set_parent_realize(dc, mb_cpu_realizefn,
>                                      &mcc->parent_realize);
> -    device_class_set_parent_reset(dc, mb_cpu_reset, &mcc->parent_reset);
> +    resettable_class_set_parent_phases(rc, NULL, mb_cpu_reset_hold, NULL,
> +                                       &mcc->parent_phases);
>  
>      cc->class_by_name = mb_cpu_class_by_name;
>      cc->has_work = mb_cpu_has_work;
> -- 
> 2.25.1
>