From: Samuel Ortiz <sameo@rivosinc.com>
To: "Hongren (Zenithal) Zheng" <i@zenithal.me>
Cc: Palmer Dabbelt <palmer@rivosinc.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Atish Patra <atishp@rivosinc.com>,
Anup Patel <anup@brainfault.org>,
Eric Biederman <ebiederm@xmission.com>,
Kees Cook <keescook@chromium.org>,
linux-mm@kvack.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-api@vger.kernel.org,
Michael Kerrisk <mtk.manpages@gmail.com>,
linux-man@vger.kernel.org, Jiatai He <jiatai2021@iscas.ac.cn>,
Heiko Stuebner <heiko@sntech.de>,
Conor.Dooley@microchip.com
Subject: Re: [PATCH v3 1/3] RISC-V: add Bitmanip/Scalar Crypto parsing from DT
Date: Thu, 24 Nov 2022 10:19:16 +0100 [thread overview]
Message-ID: <Y383FE6/w2sLd4I5@vermeer> (raw)
In-Reply-To: <YqY0aSngjI0Hc5d4@Sun>
Hi,
On Mon, Jun 13, 2022 at 02:46:01AM +0800, Hongren (Zenithal) Zheng wrote:
> This patch parses Zb/Zk related string from DT and
> output them in cpuinfo
>
> One thing worth noting is that if DT provides zk,
> all zbkb, zbkc, zbkx and zkn, zkr, zkt would be enabled.
>
> Note that zk is a valid extension name and the current
> DT binding spec allows this.
>
> This patch also changes the logical id of
> existing multi-letter extensions and adds a statement
> that instead of logical id compatibility, the order
> is needed.
>
> There currently lacks a mechanism to merge them when
> producing cpuinfo. Namely if you provide a riscv,isa
> "rv64imafdc_zk_zks", the cpuinfo output would be
> "rv64imafdc_zbkb_zbkc_zbkx_zknd_zkne_zknh_zkr_zksed
> _zksh_zkt"
>
> Tested-by: Jiatai He <jiatai2021@iscas.ac.cn>
> Signed-off-by: Hongren (Zenithal) Zheng <i@zenithal.me>
FWIW, after some rebasing:
Tested-by: Samuel Ortiz <sameo@rivosinc.com>
Cheers,
Samuel.
WARNING: multiple messages have this Message-ID (diff)
From: Samuel Ortiz <sameo@rivosinc.com>
To: "Hongren (Zenithal) Zheng" <i@zenithal.me>
Cc: Palmer Dabbelt <palmer@rivosinc.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Atish Patra <atishp@rivosinc.com>,
Anup Patel <anup@brainfault.org>,
Eric Biederman <ebiederm@xmission.com>,
Kees Cook <keescook@chromium.org>,
linux-mm@kvack.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-api@vger.kernel.org,
Michael Kerrisk <mtk.manpages@gmail.com>,
linux-man@vger.kernel.org, Jiatai He <jiatai2021@iscas.ac.cn>,
Heiko Stuebner <heiko@sntech.de>,
Conor.Dooley@microchip.com
Subject: Re: [PATCH v3 1/3] RISC-V: add Bitmanip/Scalar Crypto parsing from DT
Date: Thu, 24 Nov 2022 10:19:16 +0100 [thread overview]
Message-ID: <Y383FE6/w2sLd4I5@vermeer> (raw)
In-Reply-To: <YqY0aSngjI0Hc5d4@Sun>
Hi,
On Mon, Jun 13, 2022 at 02:46:01AM +0800, Hongren (Zenithal) Zheng wrote:
> This patch parses Zb/Zk related string from DT and
> output them in cpuinfo
>
> One thing worth noting is that if DT provides zk,
> all zbkb, zbkc, zbkx and zkn, zkr, zkt would be enabled.
>
> Note that zk is a valid extension name and the current
> DT binding spec allows this.
>
> This patch also changes the logical id of
> existing multi-letter extensions and adds a statement
> that instead of logical id compatibility, the order
> is needed.
>
> There currently lacks a mechanism to merge them when
> producing cpuinfo. Namely if you provide a riscv,isa
> "rv64imafdc_zk_zks", the cpuinfo output would be
> "rv64imafdc_zbkb_zbkc_zbkx_zknd_zkne_zknh_zkr_zksed
> _zksh_zkt"
>
> Tested-by: Jiatai He <jiatai2021@iscas.ac.cn>
> Signed-off-by: Hongren (Zenithal) Zheng <i@zenithal.me>
FWIW, after some rebasing:
Tested-by: Samuel Ortiz <sameo@rivosinc.com>
Cheers,
Samuel.
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next prev parent reply other threads:[~2022-11-24 9:19 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-12 18:44 [PATCH v3 0/3] RISC-V: Add Bitmanip/Scalar Crypto HWCAP Hongren (Zenithal) Zheng
2022-06-12 18:44 ` Hongren (Zenithal) Zheng
2022-06-12 18:46 ` [PATCH v3 1/3] RISC-V: add Bitmanip/Scalar Crypto parsing from DT Hongren (Zenithal) Zheng
2022-06-12 18:46 ` Hongren (Zenithal) Zheng
2022-11-24 9:19 ` Samuel Ortiz [this message]
2022-11-24 9:19 ` Samuel Ortiz
2022-11-24 11:53 ` Conor Dooley
2022-11-24 11:53 ` Conor Dooley
2022-06-12 18:46 ` [PATCH v3 2/3] RISC-V: uapi: add HWCAP for Bitmanip/Scalar Crypto Hongren (Zenithal) Zheng
2022-06-12 18:46 ` Hongren (Zenithal) Zheng
2022-11-24 9:30 ` Samuel Ortiz
2022-11-24 9:30 ` Samuel Ortiz
2022-11-24 9:58 ` Conor Dooley
2022-11-24 9:58 ` Conor Dooley
2022-11-24 10:47 ` Samuel Ortiz
2022-11-24 10:47 ` Samuel Ortiz
2022-11-24 11:55 ` Conor Dooley
2022-11-24 11:55 ` Conor Dooley
2022-11-24 17:12 ` Samuel Ortiz
2022-11-24 17:12 ` Samuel Ortiz
2022-11-24 17:20 ` Conor Dooley
2022-11-24 17:20 ` Conor Dooley
2022-11-24 17:34 ` Samuel Ortiz
2022-11-24 17:34 ` Samuel Ortiz
2022-11-24 17:54 ` Conor Dooley
2022-11-24 17:54 ` Conor Dooley
2022-11-24 18:09 ` Samuel Ortiz
2022-11-24 18:09 ` Samuel Ortiz
2022-06-12 18:47 ` [PATCH v3 3/3] RISC-V: HWCAP: parse Bitmanip/Scalar Crypto HWCAP from DT Hongren (Zenithal) Zheng
2022-06-12 18:47 ` Hongren (Zenithal) Zheng
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