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From: Sean Christopherson <seanjc@google.com>
To: Oliver Upton <oliver.upton@linux.dev>
Cc: Marc Zyngier <maz@kernel.org>,
	linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev,
	kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 2/2] KVM: arm64: selftests: Disable single-step without relying on ucall()
Date: Thu, 17 Nov 2022 01:20:58 +0000	[thread overview]
Message-ID: <Y3WMeovid9z1qOjD@google.com> (raw)
In-Reply-To: <Y3WF8YlvFm8NGYHd@google.com>

On Thu, Nov 17, 2022, Oliver Upton wrote:
> On Thu, Nov 17, 2022 at 12:23:50AM +0000, Sean Christopherson wrote:
> > Automatically disable single-step when the guest reaches the end of the
> > verified section instead of using an explicit ucall() to ask userspace to
> > disable single-step.  An upcoming change to implement a pool-based scheme
> > for ucall() will add an atomic operation (bit test and set) in the guest
> > ucall code, and if the compiler generate "old school" atomics, e.g.
> 
> Off topic, but I didn't ask when we were discussing this issue. What is
> the atomic used for in the pool-based ucall implementation?

To avoid having to plumb an "id" into the guest, vCPUs grab a ucall entry from
the pool on a first-come first-serve basis, and then release the entry when the
ucall is complete.  The current implementation is a bitmap, e.g. every possible
entry has a bit in the map, and vCPUs do an atomic bit-test-and-set to claim an
entry.

Ugh.  And there's a bug.  Of course I notice it after sending the pull request.
Depsite being defined in atomic.h, and despite clear_bit() being atomic in the
kernel, tools' clear_bit() isn't actually atomic.  Grr.

Doesn't cause problems because there are so few multi-vCPU selftests, but that
needs to be fixed.  Best thing would be to fix clear_bit() itself.
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

WARNING: multiple messages have this Message-ID (diff)
From: Sean Christopherson <seanjc@google.com>
To: Oliver Upton <oliver.upton@linux.dev>
Cc: Marc Zyngier <maz@kernel.org>, James Morse <james.morse@arm.com>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
	kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org,
	Reiji Watanabe <reijiw@google.com>
Subject: Re: [PATCH 2/2] KVM: arm64: selftests: Disable single-step without relying on ucall()
Date: Thu, 17 Nov 2022 01:20:58 +0000	[thread overview]
Message-ID: <Y3WMeovid9z1qOjD@google.com> (raw)
Message-ID: <20221117012058.bsMcDlITMJk1SmvdfW5hsich5deI6LJs7IP9BkBbdiE@z> (raw)
In-Reply-To: <Y3WF8YlvFm8NGYHd@google.com>

On Thu, Nov 17, 2022, Oliver Upton wrote:
> On Thu, Nov 17, 2022 at 12:23:50AM +0000, Sean Christopherson wrote:
> > Automatically disable single-step when the guest reaches the end of the
> > verified section instead of using an explicit ucall() to ask userspace to
> > disable single-step.  An upcoming change to implement a pool-based scheme
> > for ucall() will add an atomic operation (bit test and set) in the guest
> > ucall code, and if the compiler generate "old school" atomics, e.g.
> 
> Off topic, but I didn't ask when we were discussing this issue. What is
> the atomic used for in the pool-based ucall implementation?

To avoid having to plumb an "id" into the guest, vCPUs grab a ucall entry from
the pool on a first-come first-serve basis, and then release the entry when the
ucall is complete.  The current implementation is a bitmap, e.g. every possible
entry has a bit in the map, and vCPUs do an atomic bit-test-and-set to claim an
entry.

Ugh.  And there's a bug.  Of course I notice it after sending the pull request.
Depsite being defined in atomic.h, and despite clear_bit() being atomic in the
kernel, tools' clear_bit() isn't actually atomic.  Grr.

Doesn't cause problems because there are so few multi-vCPU selftests, but that
needs to be fixed.  Best thing would be to fix clear_bit() itself.

WARNING: multiple messages have this Message-ID (diff)
From: Sean Christopherson <seanjc@google.com>
To: Oliver Upton <oliver.upton@linux.dev>
Cc: Marc Zyngier <maz@kernel.org>, James Morse <james.morse@arm.com>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
	kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org,
	Reiji Watanabe <reijiw@google.com>
Subject: Re: [PATCH 2/2] KVM: arm64: selftests: Disable single-step without relying on ucall()
Date: Thu, 17 Nov 2022 01:20:58 +0000	[thread overview]
Message-ID: <Y3WMeovid9z1qOjD@google.com> (raw)
In-Reply-To: <Y3WF8YlvFm8NGYHd@google.com>

On Thu, Nov 17, 2022, Oliver Upton wrote:
> On Thu, Nov 17, 2022 at 12:23:50AM +0000, Sean Christopherson wrote:
> > Automatically disable single-step when the guest reaches the end of the
> > verified section instead of using an explicit ucall() to ask userspace to
> > disable single-step.  An upcoming change to implement a pool-based scheme
> > for ucall() will add an atomic operation (bit test and set) in the guest
> > ucall code, and if the compiler generate "old school" atomics, e.g.
> 
> Off topic, but I didn't ask when we were discussing this issue. What is
> the atomic used for in the pool-based ucall implementation?

To avoid having to plumb an "id" into the guest, vCPUs grab a ucall entry from
the pool on a first-come first-serve basis, and then release the entry when the
ucall is complete.  The current implementation is a bitmap, e.g. every possible
entry has a bit in the map, and vCPUs do an atomic bit-test-and-set to claim an
entry.

Ugh.  And there's a bug.  Of course I notice it after sending the pull request.
Depsite being defined in atomic.h, and despite clear_bit() being atomic in the
kernel, tools' clear_bit() isn't actually atomic.  Grr.

Doesn't cause problems because there are so few multi-vCPU selftests, but that
needs to be fixed.  Best thing would be to fix clear_bit() itself.

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2022-11-17  1:21 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-17  0:23 [PATCH 0/2] KVM: arm64: selftests: Fixes for single-step test Sean Christopherson
2022-11-17  0:23 ` Sean Christopherson
2022-11-17  0:23 ` Sean Christopherson
2022-11-17  0:23 ` [PATCH 1/2] KVM: arm64: selftests: Disable single-step with correct KVM define Sean Christopherson
2022-11-17  0:23   ` Sean Christopherson
2022-11-17  0:23   ` Sean Christopherson
2022-11-17  0:43   ` Oliver Upton
2022-11-17  0:43     ` Oliver Upton
2022-11-17  0:43     ` Oliver Upton
2022-11-17  3:07   ` Reiji Watanabe
2022-11-17  3:07     ` Reiji Watanabe
2022-11-17  3:07     ` Reiji Watanabe
2022-11-17  0:23 ` [PATCH 2/2] KVM: arm64: selftests: Disable single-step without relying on ucall() Sean Christopherson
2022-11-17  0:23   ` Sean Christopherson
2022-11-17  0:23   ` Sean Christopherson
2022-11-17  0:53   ` Oliver Upton
2022-11-17  0:53     ` Oliver Upton
2022-11-17  0:53     ` Oliver Upton
2022-11-17  1:20     ` Sean Christopherson [this message]
2022-11-17  1:20       ` Sean Christopherson
2022-11-17  1:20       ` Sean Christopherson
2022-11-17 15:19       ` Sean Christopherson
2022-11-17 15:19         ` Sean Christopherson
2022-11-17 15:19         ` Sean Christopherson
2022-11-17 22:32         ` Sean Christopherson
2022-11-17 22:32           ` Sean Christopherson
2022-11-17 22:32           ` Sean Christopherson
2022-11-17  7:07   ` Reiji Watanabe
2022-11-17  7:07     ` Reiji Watanabe
2022-11-17  7:07     ` Reiji Watanabe
2022-11-17 13:52 ` [PATCH 0/2] KVM: arm64: selftests: Fixes for single-step test Marc Zyngier
2022-11-17 13:52   ` Marc Zyngier
2022-11-17 13:52   ` Marc Zyngier

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