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From: Conor Dooley <conor@kernel.org>
To: Samuel Holland <samuel@sholland.org>
Cc: Chen-Yu Tsai <wens@csie.org>,
	Jernej Skrabec <jernej.skrabec@gmail.com>,
	linux-sunxi@lists.linux.dev, Palmer Dabbelt <palmer@dabbelt.com>,
	linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Jisheng Zhang <jszhang@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	Andre Przywara <andre.przywara@arm.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Anup Patel <apatel@ventanamicro.com>,
	Atish Patra <atishp@rivosinc.com>,
	Christian Hewitt <christianshewitt@gmail.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	Guo Ren <guoren@kernel.org>,
	Heinrich Schuchardt <heinrich.schuchardt@canonical.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Stanislav Jakubek <stano.jakubek@gmail.com>
Subject: Re: [PATCH v2 11/12] riscv: Add the Allwinner SoC family Kconfig option
Date: Sat, 26 Nov 2022 16:36:23 +0000	[thread overview]
Message-ID: <Y4JAh72RUJFS/RtR@spud> (raw)
In-Reply-To: <20221125234656.47306-12-samuel@sholland.org>

On Fri, Nov 25, 2022 at 05:46:55PM -0600, Samuel Holland wrote:
> Allwinner manufactures the sunxi family of application processors. This
> includes the "sun8i" series of ARMv7 SoCs, the "sun50i" series of ARMv8
> SoCs, and now the "sun20i" series of 64-bit RISC-V SoCs.
> 
> The first SoC in the sun20i series is D1, containing a single T-HEAD
> C906 core. D1s is a low-pin-count variant of D1 with co-packaged DRAM.
> 
> Most peripherals are shared across the entire chip family. In fact, the
> ARMv7 T113 SoC is pin-compatible and almost entirely register-compatible
> with the D1s.
> 
> This means many existing device drivers can be reused. To facilitate
> this reuse, name the symbol ARCH_SUNXI, since that is what the existing
> drivers have as their dependency.
> 
> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
> Tested-by: Heiko Stuebner <heiko@sntech.de>
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
> 
> Changes in v2:
>  - Sort Kconfig as if we had done s/SOC_/ARCH_/ for future-proofing
> 
>  arch/riscv/Kconfig.socs | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index 69774bb362d6..4c1dc2ca11f9 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -26,6 +26,15 @@ config SOC_STARFIVE
>  	help
>  	  This enables support for StarFive SoC platform hardware.
>  
> +config ARCH_SUNXI
> +	bool "Allwinner sun20i SoCs"
> +	select ERRATA_THEAD if MMU && !XIP_KERNEL

Does this need to have the if MMU? I thought it only needed the
!XIP_KERNEL since the PMU errata does not depend on MMU.

Or have a missed some patch elsewhere that'll change that?

> +	select SIFIVE_PLIC

This is v6.3 material right? One of the things that should be going for
v6.3 is all of these select SIFIVE_PLICs. Palmer suggested putting up an
immutable branch for any of that cleanup that intersects with new
platforms, so I'll probably send one out at some stage.

Thanks,
Conor.

> +	select SUN4I_TIMER
> +	help
> +	  This enables support for Allwinner sun20i platform hardware,
> +	  including boards based on the D1 and D1s SoCs.
> +
>  config SOC_VIRT
>  	bool "QEMU Virt Machine"
>  	select CLINT_TIMER if RISCV_M_MODE
> -- 
> 2.37.4
> 

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor@kernel.org>
To: Samuel Holland <samuel@sholland.org>
Cc: Chen-Yu Tsai <wens@csie.org>,
	Jernej Skrabec <jernej.skrabec@gmail.com>,
	linux-sunxi@lists.linux.dev, Palmer Dabbelt <palmer@dabbelt.com>,
	linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Jisheng Zhang <jszhang@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	Andre Przywara <andre.przywara@arm.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Anup Patel <apatel@ventanamicro.com>,
	Atish Patra <atishp@rivosinc.com>,
	Christian Hewitt <christianshewitt@gmail.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	Guo Ren <guoren@kernel.org>,
	Heinrich Schuchardt <heinrich.schuchardt@canonical.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Stanislav Jakubek <stano.jakubek@gmail.com>
Subject: Re: [PATCH v2 11/12] riscv: Add the Allwinner SoC family Kconfig option
Date: Sat, 26 Nov 2022 16:36:23 +0000	[thread overview]
Message-ID: <Y4JAh72RUJFS/RtR@spud> (raw)
In-Reply-To: <20221125234656.47306-12-samuel@sholland.org>

On Fri, Nov 25, 2022 at 05:46:55PM -0600, Samuel Holland wrote:
> Allwinner manufactures the sunxi family of application processors. This
> includes the "sun8i" series of ARMv7 SoCs, the "sun50i" series of ARMv8
> SoCs, and now the "sun20i" series of 64-bit RISC-V SoCs.
> 
> The first SoC in the sun20i series is D1, containing a single T-HEAD
> C906 core. D1s is a low-pin-count variant of D1 with co-packaged DRAM.
> 
> Most peripherals are shared across the entire chip family. In fact, the
> ARMv7 T113 SoC is pin-compatible and almost entirely register-compatible
> with the D1s.
> 
> This means many existing device drivers can be reused. To facilitate
> this reuse, name the symbol ARCH_SUNXI, since that is what the existing
> drivers have as their dependency.
> 
> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
> Tested-by: Heiko Stuebner <heiko@sntech.de>
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
> 
> Changes in v2:
>  - Sort Kconfig as if we had done s/SOC_/ARCH_/ for future-proofing
> 
>  arch/riscv/Kconfig.socs | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index 69774bb362d6..4c1dc2ca11f9 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -26,6 +26,15 @@ config SOC_STARFIVE
>  	help
>  	  This enables support for StarFive SoC platform hardware.
>  
> +config ARCH_SUNXI
> +	bool "Allwinner sun20i SoCs"
> +	select ERRATA_THEAD if MMU && !XIP_KERNEL

Does this need to have the if MMU? I thought it only needed the
!XIP_KERNEL since the PMU errata does not depend on MMU.

Or have a missed some patch elsewhere that'll change that?

> +	select SIFIVE_PLIC

This is v6.3 material right? One of the things that should be going for
v6.3 is all of these select SIFIVE_PLICs. Palmer suggested putting up an
immutable branch for any of that cleanup that intersects with new
platforms, so I'll probably send one out at some stage.

Thanks,
Conor.

> +	select SUN4I_TIMER
> +	help
> +	  This enables support for Allwinner sun20i platform hardware,
> +	  including boards based on the D1 and D1s SoCs.
> +
>  config SOC_VIRT
>  	bool "QEMU Virt Machine"
>  	select CLINT_TIMER if RISCV_M_MODE
> -- 
> 2.37.4
> 

WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor@kernel.org>
To: Samuel Holland <samuel@sholland.org>
Cc: Chen-Yu Tsai <wens@csie.org>,
	Jernej Skrabec <jernej.skrabec@gmail.com>,
	linux-sunxi@lists.linux.dev, Palmer Dabbelt <palmer@dabbelt.com>,
	linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Jisheng Zhang <jszhang@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	Andre Przywara <andre.przywara@arm.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Anup Patel <apatel@ventanamicro.com>,
	Atish Patra <atishp@rivosinc.com>,
	Christian Hewitt <christianshewitt@gmail.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	Guo Ren <guoren@kernel.org>,
	Heinrich Schuchardt <heinrich.schuchardt@canonical.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Stanislav Jakubek <stano.jakubek@gmail.com>
Subject: Re: [PATCH v2 11/12] riscv: Add the Allwinner SoC family Kconfig option
Date: Sat, 26 Nov 2022 16:36:23 +0000	[thread overview]
Message-ID: <Y4JAh72RUJFS/RtR@spud> (raw)
In-Reply-To: <20221125234656.47306-12-samuel@sholland.org>

On Fri, Nov 25, 2022 at 05:46:55PM -0600, Samuel Holland wrote:
> Allwinner manufactures the sunxi family of application processors. This
> includes the "sun8i" series of ARMv7 SoCs, the "sun50i" series of ARMv8
> SoCs, and now the "sun20i" series of 64-bit RISC-V SoCs.
> 
> The first SoC in the sun20i series is D1, containing a single T-HEAD
> C906 core. D1s is a low-pin-count variant of D1 with co-packaged DRAM.
> 
> Most peripherals are shared across the entire chip family. In fact, the
> ARMv7 T113 SoC is pin-compatible and almost entirely register-compatible
> with the D1s.
> 
> This means many existing device drivers can be reused. To facilitate
> this reuse, name the symbol ARCH_SUNXI, since that is what the existing
> drivers have as their dependency.
> 
> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
> Tested-by: Heiko Stuebner <heiko@sntech.de>
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
> 
> Changes in v2:
>  - Sort Kconfig as if we had done s/SOC_/ARCH_/ for future-proofing
> 
>  arch/riscv/Kconfig.socs | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index 69774bb362d6..4c1dc2ca11f9 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -26,6 +26,15 @@ config SOC_STARFIVE
>  	help
>  	  This enables support for StarFive SoC platform hardware.
>  
> +config ARCH_SUNXI
> +	bool "Allwinner sun20i SoCs"
> +	select ERRATA_THEAD if MMU && !XIP_KERNEL

Does this need to have the if MMU? I thought it only needed the
!XIP_KERNEL since the PMU errata does not depend on MMU.

Or have a missed some patch elsewhere that'll change that?

> +	select SIFIVE_PLIC

This is v6.3 material right? One of the things that should be going for
v6.3 is all of these select SIFIVE_PLICs. Palmer suggested putting up an
immutable branch for any of that cleanup that intersects with new
platforms, so I'll probably send one out at some stage.

Thanks,
Conor.

> +	select SUN4I_TIMER
> +	help
> +	  This enables support for Allwinner sun20i platform hardware,
> +	  including boards based on the D1 and D1s SoCs.
> +
>  config SOC_VIRT
>  	bool "QEMU Virt Machine"
>  	select CLINT_TIMER if RISCV_M_MODE
> -- 
> 2.37.4
> 

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2022-11-26 16:36 UTC|newest]

Thread overview: 164+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-25 23:46 [PATCH v2 00/12] riscv: Allwinner D1/D1s platform support Samuel Holland
2022-11-25 23:46 ` Samuel Holland
2022-11-25 23:46 ` Samuel Holland
2022-11-25 23:46 ` [PATCH v2 01/12] MAINTAINERS: Match the sun20i family of Allwinner SoCs Samuel Holland
2022-11-25 23:46   ` Samuel Holland
2022-11-25 23:46   ` Samuel Holland
2022-11-26  0:12   ` Guo Ren
2022-11-26  0:12     ` Guo Ren
2022-11-26  0:12     ` Guo Ren
2022-12-05 20:22   ` Jernej Škrabec
2022-12-05 20:22     ` Jernej Škrabec
2022-12-05 20:22     ` Jernej Škrabec
2022-11-25 23:46 ` [PATCH v2 02/12] dt-bindings: vendor-prefixes: Add Allwinner D1/D1s board vendors Samuel Holland
2022-11-25 23:46   ` Samuel Holland
2022-11-25 23:46   ` Samuel Holland
2022-11-26  0:14   ` Guo Ren
2022-11-26  0:14     ` Guo Ren
2022-11-26  0:14     ` Guo Ren
2022-11-25 23:46 ` [PATCH v2 03/12] dt-bindings: riscv: Add Allwinner D1/D1s board compatibles Samuel Holland
2022-11-25 23:46   ` Samuel Holland
2022-11-25 23:46   ` Samuel Holland
2022-11-26  0:15   ` Guo Ren
2022-11-26  0:15     ` Guo Ren
2022-11-26  0:15     ` Guo Ren
2022-11-26 15:54   ` Conor Dooley
2022-11-26 15:54     ` Conor Dooley
2022-11-26 15:54     ` Conor Dooley
2022-11-28 20:55   ` Heiko Stübner
2022-11-28 20:55     ` Heiko Stübner
2022-11-28 20:55     ` Heiko Stübner
2022-11-25 23:46 ` [PATCH v2 04/12] riscv: dts: allwinner: Add the D1/D1s SoC devicetree Samuel Holland
2022-11-25 23:46   ` Samuel Holland
2022-11-25 23:46   ` Samuel Holland
2022-11-26 16:03   ` Conor Dooley
2022-11-26 16:03     ` Conor Dooley
2022-11-26 16:03     ` Conor Dooley
2022-12-02  8:27     ` Icenowy Zheng
2022-12-02  8:27       ` Icenowy Zheng
2022-12-02  8:27       ` Icenowy Zheng
2022-11-27 17:41   ` Andre Przywara
2022-11-27 17:41     ` Andre Przywara
2022-11-27 17:41     ` Andre Przywara
2022-11-27 19:22     ` Samuel Holland
2022-11-27 19:22       ` Samuel Holland
2022-11-27 19:22       ` Samuel Holland
2022-12-05 20:29       ` Jernej Škrabec
2022-12-05 20:29         ` Jernej Škrabec
2022-12-05 20:29         ` Jernej Škrabec
2022-12-02  8:29     ` Icenowy Zheng
2022-12-02  8:29       ` Icenowy Zheng
2022-12-02  8:29       ` Icenowy Zheng
2022-11-28 13:34   ` Bin Meng
2022-11-28 13:34     ` Bin Meng
2022-11-28 13:34     ` Bin Meng
2022-11-28 20:59   ` Heiko Stübner
2022-11-28 20:59     ` Heiko Stübner
2022-11-28 20:59     ` Heiko Stübner
2022-11-25 23:46 ` [PATCH v2 05/12] riscv: dts: allwinner: Add MangoPi MQ devicetree Samuel Holland
2022-11-25 23:46   ` Samuel Holland
2022-11-25 23:46   ` Samuel Holland
2022-11-26  0:20   ` Guo Ren
2022-11-26  0:20     ` Guo Ren
2022-11-26  0:20     ` Guo Ren
2022-12-05 20:32   ` Jernej Škrabec
2022-12-05 20:32     ` Jernej Škrabec
2022-12-05 20:32     ` Jernej Škrabec
2022-11-25 23:46 ` [PATCH v2 06/12] riscv: dts: allwinner: Add Allwinner D1 Nezha devicetree Samuel Holland
2022-11-25 23:46   ` Samuel Holland
2022-11-25 23:46   ` Samuel Holland
2022-11-26  0:21   ` Guo Ren
2022-11-26  0:21     ` Guo Ren
2022-11-26  0:21     ` Guo Ren
2022-11-26 16:19   ` Conor Dooley
2022-11-26 16:19     ` Conor Dooley
2022-11-26 16:19     ` Conor Dooley
2022-11-28 21:01   ` Heiko Stübner
2022-11-28 21:01     ` Heiko Stübner
2022-11-28 21:01     ` Heiko Stübner
2022-12-05 20:33   ` Jernej Škrabec
2022-12-05 20:33     ` Jernej Škrabec
2022-12-05 20:33     ` Jernej Škrabec
2022-11-25 23:46 ` [PATCH v2 07/12] riscv: dts: allwinner: Add Sipeed Lichee RV devicetrees Samuel Holland
2022-11-25 23:46   ` Samuel Holland
2022-11-25 23:46   ` Samuel Holland
2022-12-05 20:42   ` Jernej Škrabec
2022-12-05 20:42     ` Jernej Škrabec
2022-12-05 20:42     ` Jernej Škrabec
2022-11-25 23:46 ` [PATCH v2 08/12] riscv: dts: allwinner: Add MangoPi MQ Pro devicetree Samuel Holland
2022-11-25 23:46   ` Samuel Holland
2022-11-25 23:46   ` Samuel Holland
2022-11-26  0:25   ` Guo Ren
2022-11-26  0:25     ` Guo Ren
2022-11-26  0:25     ` Guo Ren
2022-12-05 20:42   ` Jernej Škrabec
2022-12-05 20:42     ` Jernej Škrabec
2022-12-05 20:42     ` Jernej Škrabec
2022-11-25 23:46 ` [PATCH v2 09/12] riscv: dts: allwinner: Add Dongshan Nezha STU devicetree Samuel Holland
2022-11-25 23:46   ` Samuel Holland
2022-11-25 23:46   ` Samuel Holland
2022-11-26  0:25   ` Guo Ren
2022-11-26  0:25     ` Guo Ren
2022-11-26  0:25     ` Guo Ren
2022-12-05 20:43   ` Jernej Škrabec
2022-12-05 20:43     ` Jernej Škrabec
2022-12-05 20:43     ` Jernej Škrabec
2022-12-05 20:45   ` Jernej Škrabec
2022-12-05 20:45     ` Jernej Škrabec
2022-12-05 20:45     ` Jernej Škrabec
2022-11-25 23:46 ` [PATCH v2 10/12] riscv: dts: allwinner: Add ClockworkPi and DevTerm devicetrees Samuel Holland
2022-11-25 23:46   ` Samuel Holland
2022-11-25 23:46   ` Samuel Holland
2022-11-25 23:46 ` [PATCH v2 11/12] riscv: Add the Allwinner SoC family Kconfig option Samuel Holland
2022-11-25 23:46   ` Samuel Holland
2022-11-25 23:46   ` Samuel Holland
2022-11-26  0:23   ` Guo Ren
2022-11-26  0:23     ` Guo Ren
2022-11-26  0:23     ` Guo Ren
2022-11-26 16:36   ` Conor Dooley [this message]
2022-11-26 16:36     ` Conor Dooley
2022-11-26 16:36     ` Conor Dooley
2022-11-27 11:31     ` Guo Ren
2022-11-27 11:31       ` Guo Ren
2022-11-28 21:05       ` Heiko Stübner
2022-11-28 21:05         ` Heiko Stübner
2022-11-28 21:05         ` Heiko Stübner
2022-11-25 23:46 ` [PATCH v2 12/12] riscv: defconfig: Enable the Allwinner D1 platform and drivers Samuel Holland
2022-11-25 23:46   ` Samuel Holland
2022-11-25 23:46   ` Samuel Holland
2022-11-26  0:24   ` Guo Ren
2022-11-26  0:24     ` Guo Ren
2022-11-26  0:24     ` Guo Ren
2022-12-02  8:34     ` Icenowy Zheng
2022-12-02  8:34       ` Icenowy Zheng
2022-12-02  8:34       ` Icenowy Zheng
2022-11-26 16:40   ` Conor Dooley
2022-11-26 16:40     ` Conor Dooley
2022-11-26 16:40     ` Conor Dooley
2022-11-28 21:11     ` Heiko Stübner
2022-11-28 21:11       ` Heiko Stübner
2022-11-28 21:11       ` Heiko Stübner
2022-11-28 21:17       ` Conor Dooley
2022-11-28 21:17         ` Conor Dooley
2022-11-28 21:17         ` Conor Dooley
2022-11-29  6:49         ` Andrew Jones
2022-11-29  6:49           ` Andrew Jones
2022-11-29  6:49           ` Andrew Jones
2022-11-29  6:54           ` Conor Dooley
2022-11-29  6:54             ` Conor Dooley
2022-11-29  6:54             ` Conor Dooley
2022-11-30 20:24             ` Palmer Dabbelt
2022-11-30 20:24               ` Palmer Dabbelt
2022-11-30 20:24               ` Palmer Dabbelt
2022-11-30 21:49               ` Arnd Bergmann
2022-11-30 21:49                 ` Arnd Bergmann
2022-11-30 21:49                 ` Arnd Bergmann
2022-12-01  0:31               ` Andre Przywara
2022-12-01  0:31                 ` Andre Przywara
2022-12-01  0:31                 ` Andre Przywara
2022-11-26 10:24 ` [PATCH v2 00/12] riscv: Allwinner D1/D1s platform support Conor Dooley
2022-11-26 10:24   ` Conor Dooley
2022-11-26 10:24   ` Conor Dooley
2022-12-02 17:55 ` Palmer Dabbelt
2022-12-02 17:55   ` Palmer Dabbelt
2022-12-02 17:55   ` Palmer Dabbelt

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