From: Conor Dooley <conor@kernel.org>
To: Hal Feng <hal.feng@starfivetech.com>
Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
Palmer Dabbelt <palmer@dabbelt.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Ben Dooks <ben.dooks@sifive.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>, Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Linus Walleij <linus.walleij@linaro.org>,
Emil Renner Berthing <emil.renner.berthing@canonical.com>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 7/7] riscv: dts: starfive: Add StarFive JH7110 VisionFive 2 board device tree
Date: Tue, 10 Jan 2023 17:59:09 +0000 [thread overview]
Message-ID: <Y72nbfJxYdO2AojI@spud> (raw)
In-Reply-To: <20221220011247.35560-8-hal.feng@starfivetech.com>
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On Tue, Dec 20, 2022 at 09:12:47AM +0800, Hal Feng wrote:
> + aliases {
> + serial0 = &uart0;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
So I think this is wrong, and the stdout-path should be uart3 instead.
Per the QSG [0], GPIO5/6 are the suggested UART Tx/Rx to use.
This appears to map to uart3 rather than uart0.
FWIW, uart3 is also the stdout-path for the v1, see:
arch/riscv/boot/dts/starfive/jh7100-common.dtsi
At least, that change is what I needed to do in order to use the
JH7110_VisionFive2_upstream branch, AFAICT matches what you've got in
this series.
Thanks,
Conor.
0 - https://doc-en.rvspace.org/VisionFive2/PDF/VisionFive2_QSG.pdf
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WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor@kernel.org>
To: Hal Feng <hal.feng@starfivetech.com>
Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
Palmer Dabbelt <palmer@dabbelt.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Ben Dooks <ben.dooks@sifive.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>, Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Linus Walleij <linus.walleij@linaro.org>,
Emil Renner Berthing <emil.renner.berthing@canonical.com>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 7/7] riscv: dts: starfive: Add StarFive JH7110 VisionFive 2 board device tree
Date: Tue, 10 Jan 2023 17:59:09 +0000 [thread overview]
Message-ID: <Y72nbfJxYdO2AojI@spud> (raw)
In-Reply-To: <20221220011247.35560-8-hal.feng@starfivetech.com>
[-- Attachment #1: Type: text/plain, Size: 682 bytes --]
On Tue, Dec 20, 2022 at 09:12:47AM +0800, Hal Feng wrote:
> + aliases {
> + serial0 = &uart0;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
So I think this is wrong, and the stdout-path should be uart3 instead.
Per the QSG [0], GPIO5/6 are the suggested UART Tx/Rx to use.
This appears to map to uart3 rather than uart0.
FWIW, uart3 is also the stdout-path for the v1, see:
arch/riscv/boot/dts/starfive/jh7100-common.dtsi
At least, that change is what I needed to do in order to use the
JH7110_VisionFive2_upstream branch, AFAICT matches what you've got in
this series.
Thanks,
Conor.
0 - https://doc-en.rvspace.org/VisionFive2/PDF/VisionFive2_QSG.pdf
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next prev parent reply other threads:[~2023-01-10 17:59 UTC|newest]
Thread overview: 112+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-20 1:12 [PATCH v3 0/7] Basic device tree support for StarFive JH7110 RISC-V SoC Hal Feng
2022-12-20 1:12 ` Hal Feng
2022-12-20 1:12 ` [PATCH v3 1/7] dt-bindings: riscv: Add StarFive JH7110 SoC and VisionFive 2 board Hal Feng
2022-12-20 1:12 ` Hal Feng
2022-12-20 10:05 ` Krzysztof Kozlowski
2022-12-20 10:05 ` Krzysztof Kozlowski
2022-12-23 2:05 ` Hal Feng
2022-12-23 2:05 ` Hal Feng
2022-12-20 20:58 ` Conor Dooley
2022-12-20 20:58 ` Conor Dooley
2022-12-23 2:15 ` Hal Feng
2022-12-23 2:15 ` Hal Feng
2022-12-20 1:12 ` [PATCH v3 2/7] dt-bindings: timer: Add StarFive JH7110 clint Hal Feng
2022-12-20 1:12 ` Hal Feng
2022-12-20 1:12 ` [PATCH v3 3/7] dt-bindings: interrupt-controller: Add StarFive JH7110 plic Hal Feng
2022-12-20 1:12 ` Hal Feng
2022-12-20 1:12 ` [PATCH v3 4/7] dt-bindings: sifive,ccache0: Support StarFive JH7110 SoC Hal Feng
2022-12-20 1:12 ` Hal Feng
2022-12-20 20:21 ` Rob Herring
2022-12-20 20:21 ` Rob Herring
2022-12-20 1:12 ` [PATCH v3 5/7] soc: sifive: ccache: Add StarFive JH7110 support Hal Feng
2022-12-20 1:12 ` Hal Feng
2022-12-20 21:14 ` Conor Dooley
2022-12-20 21:14 ` Conor Dooley
2022-12-20 1:12 ` [PATCH v3 6/7] riscv: dts: starfive: Add initial StarFive JH7110 device tree Hal Feng
2022-12-20 1:12 ` Hal Feng
2022-12-20 10:10 ` Krzysztof Kozlowski
2022-12-20 10:10 ` Krzysztof Kozlowski
2022-12-25 10:31 ` Hal Feng
2022-12-25 10:31 ` Hal Feng
2022-12-25 11:56 ` Krzysztof Kozlowski
2022-12-25 11:56 ` Krzysztof Kozlowski
2022-12-20 21:31 ` Conor Dooley
2022-12-20 21:31 ` Conor Dooley
2022-12-25 14:31 ` Hal Feng
2022-12-25 14:31 ` Hal Feng
2022-12-27 20:58 ` Conor Dooley
2022-12-27 20:58 ` Conor Dooley
2022-12-28 22:48 ` Conor Dooley
2022-12-28 22:48 ` Conor Dooley
2022-12-29 5:25 ` Icenowy Zheng
2022-12-29 5:25 ` Icenowy Zheng
2022-12-29 9:02 ` Conor Dooley
2022-12-29 9:02 ` Conor Dooley
2023-02-01 7:53 ` Hal Feng
2023-02-01 7:53 ` Hal Feng
2023-02-01 7:31 ` Hal Feng
2023-02-01 7:31 ` Hal Feng
2023-02-01 7:21 ` Hal Feng
2023-02-01 7:21 ` Hal Feng
2023-02-01 8:21 ` Conor Dooley
2023-02-01 8:21 ` Conor Dooley
2023-02-02 18:56 ` Hal Feng
2023-02-02 18:56 ` Hal Feng
2023-02-02 19:41 ` Conor Dooley
2023-02-02 19:41 ` Conor Dooley
2023-02-09 11:11 ` Conor Dooley
2023-02-09 11:11 ` Conor Dooley
2023-02-13 9:41 ` Hal Feng
2023-02-13 9:41 ` Hal Feng
2023-02-13 10:07 ` Conor Dooley
2023-02-13 10:07 ` Conor Dooley
2023-02-14 2:37 ` Hal Feng
2023-02-14 2:37 ` Hal Feng
2023-02-15 3:07 ` Hal Feng
2023-02-15 3:07 ` Hal Feng
2023-02-15 7:42 ` Conor Dooley
2023-02-15 7:42 ` Conor Dooley
2023-02-15 7:59 ` Conor Dooley
2023-02-15 7:59 ` Conor Dooley
2023-01-31 2:00 ` Hal Feng
2023-01-31 2:00 ` Hal Feng
2023-01-31 6:17 ` Conor Dooley
2023-01-31 6:17 ` Conor Dooley
2023-02-02 2:42 ` Hal Feng
2023-02-02 2:42 ` Hal Feng
2023-02-02 6:19 ` Conor Dooley
2023-02-02 6:19 ` Conor Dooley
2022-12-20 1:12 ` [PATCH v3 7/7] riscv: dts: starfive: Add StarFive JH7110 VisionFive 2 board " Hal Feng
2022-12-20 1:12 ` Hal Feng
2022-12-20 21:26 ` Conor Dooley
2022-12-20 21:26 ` Conor Dooley
2022-12-23 3:12 ` Hal Feng
2022-12-23 3:12 ` Hal Feng
2022-12-28 22:49 ` Conor Dooley
2022-12-28 22:49 ` Conor Dooley
2023-01-10 17:59 ` Conor Dooley [this message]
2023-01-10 17:59 ` Conor Dooley
2023-01-18 23:43 ` Conor Dooley
2023-01-18 23:43 ` Conor Dooley
2023-02-14 9:53 ` Emil Renner Berthing
2023-02-14 9:53 ` Emil Renner Berthing
2023-02-15 14:03 ` Hal Feng
2023-02-15 14:03 ` Hal Feng
2023-02-16 9:27 ` Emil Renner Berthing
2023-02-16 9:27 ` Emil Renner Berthing
2023-02-16 9:50 ` Conor Dooley
2023-02-16 9:50 ` Conor Dooley
2023-02-16 10:09 ` Conor Dooley
2023-02-16 10:09 ` Conor Dooley
2023-02-16 10:32 ` Emil Renner Berthing
2023-02-16 10:32 ` Emil Renner Berthing
2023-02-16 12:27 ` Hal Feng
2023-02-16 12:27 ` Hal Feng
2023-02-16 13:02 ` Conor Dooley
2023-02-16 13:02 ` Conor Dooley
2022-12-26 23:01 ` [PATCH v3 0/7] Basic device tree support for StarFive JH7110 RISC-V SoC Conor Dooley
2022-12-26 23:01 ` Conor Dooley
2022-12-27 7:58 ` Krzysztof Kozlowski
2022-12-27 7:58 ` Krzysztof Kozlowski
2022-12-27 14:20 ` Conor Dooley
2022-12-27 14:20 ` Conor Dooley
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