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From: Rob Herring <robh@kernel.org>
To: Naveen Naidu <naveennaidu479@gmail.com>
Cc: bhelgaas@google.com, linux-pci@vger.kernel.org,
	linux-kernel-mentees@lists.linuxfoundation.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 03/24] PCI: Unify PCI error response checking
Date: Wed, 20 Oct 2021 08:13:05 -0500	[thread overview]
Message-ID: <YXAV4bGehjAKK8XO@robh.at.kernel.org> (raw)
In-Reply-To: <da939a6cdb2dea96d16392ae152e1232212877d1.1634306198.git.naveennaidu479@gmail.com>

On Fri, Oct 15, 2021 at 08:08:44PM +0530, Naveen Naidu wrote:
> An MMIO read from a PCI device that doesn't exist or doesn't respond
> causes a PCI error.  There's no real data to return to satisfy the
> CPU read, so most hardware fabricates ~0 data.
> 
> Use SET_PCI_ERROR_RESPONSE() to set the error response and
> RESPONSE_IS_PCI_ERROR() to check the error response during hardware
> read.
> 
> These definitions make error checks consistent and easier to find.
> 
> Signed-off-by: Naveen Naidu <naveennaidu479@gmail.com>
> ---
>  drivers/pci/access.c | 18 +++++++++---------
>  1 file changed, 9 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/pci/access.c b/drivers/pci/access.c
> index b3b2006ed1d2..03712866c818 100644
> --- a/drivers/pci/access.c
> +++ b/drivers/pci/access.c
> @@ -417,10 +417,10 @@ int pcie_capability_read_word(struct pci_dev *dev, int pos, u16 *val)
>  		ret = pci_read_config_word(dev, pci_pcie_cap(dev) + pos, val);
>  		/*
>  		 * Reset *val to 0 if pci_read_config_word() fails, it may
> -		 * have been written as 0xFFFF if hardware error happens
> -		 * during pci_read_config_word().
> +		 * have been written as 0xFFFF (PCI_ERROR_RESPONSE) if hardware error
> +		 * happens during pci_read_config_word().
>  		 */
> -		if (ret)
> +		if (RESPONSE_IS_PCI_ERROR(val))

What if there is no error (in ret) and the register value was actually 
~0? We'd be corrupting the value.

In general, I think we should rely more on the error codes and less on 
the ~0 value.

>  			*val = 0;
>  		return ret;
>  	}
> @@ -452,10 +452,10 @@ int pcie_capability_read_dword(struct pci_dev *dev, int pos, u32 *val)
>  		ret = pci_read_config_dword(dev, pci_pcie_cap(dev) + pos, val);
>  		/*
>  		 * Reset *val to 0 if pci_read_config_dword() fails, it may
> -		 * have been written as 0xFFFFFFFF if hardware error happens
> -		 * during pci_read_config_dword().
> +		 * have been written as 0xFFFFFFFF (PCI_ERROR_RESPONSE) if hardware
> +		 * error happens during pci_read_config_dword().
>  		 */
> -		if (ret)
> +		if (RESPONSE_IS_PCI_ERROR(val))
>  			*val = 0;
>  		return ret;
>  	}
> @@ -529,7 +529,7 @@ EXPORT_SYMBOL(pcie_capability_clear_and_set_dword);
>  int pci_read_config_byte(const struct pci_dev *dev, int where, u8 *val)
>  {
>  	if (pci_dev_is_disconnected(dev)) {
> -		*val = ~0;
> +		SET_PCI_ERROR_RESPONSE(val);
>  		return PCIBIOS_DEVICE_NOT_FOUND;
>  	}
>  	return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val);
> @@ -539,7 +539,7 @@ EXPORT_SYMBOL(pci_read_config_byte);
>  int pci_read_config_word(const struct pci_dev *dev, int where, u16 *val)
>  {
>  	if (pci_dev_is_disconnected(dev)) {
> -		*val = ~0;
> +		SET_PCI_ERROR_RESPONSE(val);
>  		return PCIBIOS_DEVICE_NOT_FOUND;
>  	}
>  	return pci_bus_read_config_word(dev->bus, dev->devfn, where, val);
> @@ -550,7 +550,7 @@ int pci_read_config_dword(const struct pci_dev *dev, int where,
>  					u32 *val)
>  {
>  	if (pci_dev_is_disconnected(dev)) {
> -		*val = ~0;
> +		SET_PCI_ERROR_RESPONSE(val);
>  		return PCIBIOS_DEVICE_NOT_FOUND;
>  	}
>  	return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val);
> -- 
> 2.25.1
> 
> 
_______________________________________________
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WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Naveen Naidu <naveennaidu479@gmail.com>
Cc: bhelgaas@google.com,
	linux-kernel-mentees@lists.linuxfoundation.org,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 03/24] PCI: Unify PCI error response checking
Date: Wed, 20 Oct 2021 08:13:05 -0500	[thread overview]
Message-ID: <YXAV4bGehjAKK8XO@robh.at.kernel.org> (raw)
In-Reply-To: <da939a6cdb2dea96d16392ae152e1232212877d1.1634306198.git.naveennaidu479@gmail.com>

On Fri, Oct 15, 2021 at 08:08:44PM +0530, Naveen Naidu wrote:
> An MMIO read from a PCI device that doesn't exist or doesn't respond
> causes a PCI error.  There's no real data to return to satisfy the
> CPU read, so most hardware fabricates ~0 data.
> 
> Use SET_PCI_ERROR_RESPONSE() to set the error response and
> RESPONSE_IS_PCI_ERROR() to check the error response during hardware
> read.
> 
> These definitions make error checks consistent and easier to find.
> 
> Signed-off-by: Naveen Naidu <naveennaidu479@gmail.com>
> ---
>  drivers/pci/access.c | 18 +++++++++---------
>  1 file changed, 9 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/pci/access.c b/drivers/pci/access.c
> index b3b2006ed1d2..03712866c818 100644
> --- a/drivers/pci/access.c
> +++ b/drivers/pci/access.c
> @@ -417,10 +417,10 @@ int pcie_capability_read_word(struct pci_dev *dev, int pos, u16 *val)
>  		ret = pci_read_config_word(dev, pci_pcie_cap(dev) + pos, val);
>  		/*
>  		 * Reset *val to 0 if pci_read_config_word() fails, it may
> -		 * have been written as 0xFFFF if hardware error happens
> -		 * during pci_read_config_word().
> +		 * have been written as 0xFFFF (PCI_ERROR_RESPONSE) if hardware error
> +		 * happens during pci_read_config_word().
>  		 */
> -		if (ret)
> +		if (RESPONSE_IS_PCI_ERROR(val))

What if there is no error (in ret) and the register value was actually 
~0? We'd be corrupting the value.

In general, I think we should rely more on the error codes and less on 
the ~0 value.

>  			*val = 0;
>  		return ret;
>  	}
> @@ -452,10 +452,10 @@ int pcie_capability_read_dword(struct pci_dev *dev, int pos, u32 *val)
>  		ret = pci_read_config_dword(dev, pci_pcie_cap(dev) + pos, val);
>  		/*
>  		 * Reset *val to 0 if pci_read_config_dword() fails, it may
> -		 * have been written as 0xFFFFFFFF if hardware error happens
> -		 * during pci_read_config_dword().
> +		 * have been written as 0xFFFFFFFF (PCI_ERROR_RESPONSE) if hardware
> +		 * error happens during pci_read_config_dword().
>  		 */
> -		if (ret)
> +		if (RESPONSE_IS_PCI_ERROR(val))
>  			*val = 0;
>  		return ret;
>  	}
> @@ -529,7 +529,7 @@ EXPORT_SYMBOL(pcie_capability_clear_and_set_dword);
>  int pci_read_config_byte(const struct pci_dev *dev, int where, u8 *val)
>  {
>  	if (pci_dev_is_disconnected(dev)) {
> -		*val = ~0;
> +		SET_PCI_ERROR_RESPONSE(val);
>  		return PCIBIOS_DEVICE_NOT_FOUND;
>  	}
>  	return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val);
> @@ -539,7 +539,7 @@ EXPORT_SYMBOL(pci_read_config_byte);
>  int pci_read_config_word(const struct pci_dev *dev, int where, u16 *val)
>  {
>  	if (pci_dev_is_disconnected(dev)) {
> -		*val = ~0;
> +		SET_PCI_ERROR_RESPONSE(val);
>  		return PCIBIOS_DEVICE_NOT_FOUND;
>  	}
>  	return pci_bus_read_config_word(dev->bus, dev->devfn, where, val);
> @@ -550,7 +550,7 @@ int pci_read_config_dword(const struct pci_dev *dev, int where,
>  					u32 *val)
>  {
>  	if (pci_dev_is_disconnected(dev)) {
> -		*val = ~0;
> +		SET_PCI_ERROR_RESPONSE(val);
>  		return PCIBIOS_DEVICE_NOT_FOUND;
>  	}
>  	return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val);
> -- 
> 2.25.1
> 
> 

  reply	other threads:[~2021-10-20 13:13 UTC|newest]

Thread overview: 95+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-15 14:35 [PATCH v2 00/24] Unify PCI error response checking Naveen Naidu
2021-10-15 14:35 ` Naveen Naidu
2021-10-15 14:35 ` Naveen Naidu
2021-10-15 14:35 ` Naveen Naidu
2021-10-15 14:35 ` Naveen Naidu
2021-10-15 14:35 ` Naveen Naidu
2021-10-15 14:28 ` [PATCH v2 01/24] PCI: Add PCI_ERROR_RESPONSE and it's related definitions Naveen Naidu
2021-10-15 14:28   ` Naveen Naidu
2021-10-20 13:24   ` Rob Herring
2021-10-20 13:24     ` Rob Herring
2021-10-15 14:28 ` [PATCH v2 02/24] PCI: Set error response in config access defines when ops->read() fails Naveen Naidu
2021-10-15 14:28   ` Naveen Naidu
2021-10-20 13:41   ` Rob Herring
2021-10-20 13:41     ` Rob Herring
2021-10-20 13:52   ` Pali Rohár
2021-10-20 13:52     ` Pali Rohár
2021-10-20 15:13     ` Naveen Naidu
2021-10-20 15:13       ` Naveen Naidu
2021-10-15 14:38 ` [PATCH v2 03/24] PCI: Unify PCI error response checking Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-20 13:13   ` Rob Herring [this message]
2021-10-20 13:13     ` Rob Herring
2021-10-20 15:15     ` Naveen Naidu
2021-10-20 15:15       ` Naveen Naidu
2021-10-15 14:38 ` [PATCH v2 04/24] PCI: Remove redundant error fabrication when device read fails Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-20 13:42   ` Rob Herring
2021-10-20 13:42     ` Rob Herring
2021-10-15 14:38 ` [PATCH v2 05/24] PCI: thunder: " Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38 ` [PATCH v2 06/24] PCI: iproc: " Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 16:49   ` Ray Jui via Linux-kernel-mentees
2021-10-15 16:49     ` Ray Jui
2021-10-15 16:49     ` Ray Jui
2021-10-15 17:05     ` Naveen Naidu
2021-10-15 17:05       ` Naveen Naidu
2021-10-15 17:05       ` Naveen Naidu
2021-10-15 14:38 ` [PATCH v2 07/24] PCI: mediatek: " Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38 ` [PATCH v2 08/24] PCI: exynos: " Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38 ` [PATCH v2 09/24] PCI: histb: " Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38 ` [PATCH v2 10/24] PCI: kirin: " Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38 ` [PATCH v2 11/24] PCI: aardvark: " Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38 ` [PATCH v2 12/24] PCI: mvebu: " Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38 ` [PATCH v2 13/24] PCI: altera: " Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38 ` [PATCH v2 14/24] PCI: rcar: " Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-18 11:32   ` Geert Uytterhoeven
2021-10-18 11:32     ` Geert Uytterhoeven
2021-10-18 11:51     ` Naveen Naidu
2021-10-18 11:51       ` Naveen Naidu
2021-10-18 12:00       ` Geert Uytterhoeven
2021-10-18 12:00         ` Geert Uytterhoeven
2021-10-15 14:38 ` [PATCH v2 15/24] PCI: rockchip: " Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38 ` [PATCH v2 16/24] PCI/ERR: Use RESPONSE_IS_PCI_ERROR() to check read from hardware Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38 ` [PATCH v2 17/24] PCI: vmd: " Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:52   ` Naveen Naidu
2021-10-15 14:52     ` Naveen Naidu
2021-10-15 14:38 ` [PATCH v2 18/24] PCI: pciehp: " Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 15:15   ` Naveen Naidu
2021-10-15 15:15     ` Naveen Naidu
2021-10-15 14:39 ` [PATCH v2 19/24] PCI/DPC: " Naveen Naidu
2021-10-15 14:39   ` Naveen Naidu
2021-10-15 14:39   ` Naveen Naidu
2021-10-15 14:39 ` [PATCH v2 20/24] PCI/PME: " Naveen Naidu
2021-10-15 14:39   ` Naveen Naidu
2021-10-15 14:39 ` [PATCH v2 21/24] PCI: cpqphp: " Naveen Naidu
2021-10-15 14:39   ` Naveen Naidu
2021-10-15 14:39 ` [PATCH v2 22/24] PCI: keystone: Use PCI_ERROR_RESPONSE to specify hardware error Naveen Naidu
2021-10-15 14:39   ` Naveen Naidu
2021-10-15 14:39 ` [PATCH v2 23/24] PCI: hv: Use PCI_ERROR_RESPONSE to specify hardware read error Naveen Naidu
2021-10-15 14:39   ` Naveen Naidu
2021-10-15 14:39 ` [PATCH v2 24/24] PCI: xgene: Use PCI_ERROR_RESPONSE to specify hardware error Naveen Naidu
2021-10-15 14:39   ` Naveen Naidu
2021-10-15 14:39   ` Naveen Naidu

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