All of lore.kernel.org
 help / color / mirror / Atom feed
From: Rob Herring <robh@kernel.org>
To: Naveen Naidu <naveennaidu479@gmail.com>
Cc: bhelgaas@google.com, linux-pci@vger.kernel.org,
	linux-kernel-mentees@lists.linuxfoundation.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 01/24] PCI: Add PCI_ERROR_RESPONSE and it's related definitions
Date: Wed, 20 Oct 2021 08:24:30 -0500	[thread overview]
Message-ID: <YXAYjkLyS53Bod3j@robh.at.kernel.org> (raw)
In-Reply-To: <4516b02d3c0fe3593a1a9f59bab47e99cdb65f02.1634306198.git.naveennaidu479@gmail.com>

On Fri, Oct 15, 2021 at 07:58:16PM +0530, Naveen Naidu wrote:
> An MMIO read from a PCI device that doesn't exist or doesn't respond
> causes a PCI error.  There's no real data to return to satisfy the
> CPU read, so most hardware fabricates ~0 data.
> 
> Add a PCI_ERROR_RESPONSE definition for that and use it where
> appropriate to make these checks consistent and easier to find.
> 
> Also add helper definitions SET_PCI_ERROR_RESPONSE and
> RESPONSE_IS_PCI_ERROR to make the code more readable.
> 
> Suggested-by: Bjorn Helgaas <bhelgaas@google.com>
> Signed-off-by: Naveen Naidu <naveennaidu479@gmail.com>
> ---
>  include/linux/pci.h | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/include/linux/pci.h b/include/linux/pci.h
> index cd8aa6fce204..928c589bb5c4 100644
> --- a/include/linux/pci.h
> +++ b/include/linux/pci.h
> @@ -154,6 +154,15 @@ enum pci_interrupt_pin {
>  /* The number of legacy PCI INTx interrupts */
>  #define PCI_NUM_INTX	4
>  
> +/*
> + * Reading from a device that doesn't respond typically returns ~0.  A
> + * successful read from a device may also return ~0, so you need additional
> + * information to reliably identify errors.
> + */
> +#define PCI_ERROR_RESPONSE			(~0ULL)
> +#define SET_PCI_ERROR_RESPONSE(val)	(*val = ((typeof(*val)) PCI_ERROR_RESPONSE))
> +#define RESPONSE_IS_PCI_ERROR(val)	(*val == ((typeof(*val)) PCI_ERROR_RESPONSE))

No reason for val to be a pointer.

Also, macro parameters need () around them. val could be an expression 
like 'ptr + 1' which would blow up for example.

> +
>  /*
>   * pci_power_t values must match the bits in the Capabilities PME_Support
>   * and Control/Status PowerState fields in the Power Management capability.
> -- 
> 2.25.1
> 
> 
_______________________________________________
Linux-kernel-mentees mailing list
Linux-kernel-mentees@lists.linuxfoundation.org
https://lists.linuxfoundation.org/mailman/listinfo/linux-kernel-mentees

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Naveen Naidu <naveennaidu479@gmail.com>
Cc: bhelgaas@google.com,
	linux-kernel-mentees@lists.linuxfoundation.org,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 01/24] PCI: Add PCI_ERROR_RESPONSE and it's related definitions
Date: Wed, 20 Oct 2021 08:24:30 -0500	[thread overview]
Message-ID: <YXAYjkLyS53Bod3j@robh.at.kernel.org> (raw)
In-Reply-To: <4516b02d3c0fe3593a1a9f59bab47e99cdb65f02.1634306198.git.naveennaidu479@gmail.com>

On Fri, Oct 15, 2021 at 07:58:16PM +0530, Naveen Naidu wrote:
> An MMIO read from a PCI device that doesn't exist or doesn't respond
> causes a PCI error.  There's no real data to return to satisfy the
> CPU read, so most hardware fabricates ~0 data.
> 
> Add a PCI_ERROR_RESPONSE definition for that and use it where
> appropriate to make these checks consistent and easier to find.
> 
> Also add helper definitions SET_PCI_ERROR_RESPONSE and
> RESPONSE_IS_PCI_ERROR to make the code more readable.
> 
> Suggested-by: Bjorn Helgaas <bhelgaas@google.com>
> Signed-off-by: Naveen Naidu <naveennaidu479@gmail.com>
> ---
>  include/linux/pci.h | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/include/linux/pci.h b/include/linux/pci.h
> index cd8aa6fce204..928c589bb5c4 100644
> --- a/include/linux/pci.h
> +++ b/include/linux/pci.h
> @@ -154,6 +154,15 @@ enum pci_interrupt_pin {
>  /* The number of legacy PCI INTx interrupts */
>  #define PCI_NUM_INTX	4
>  
> +/*
> + * Reading from a device that doesn't respond typically returns ~0.  A
> + * successful read from a device may also return ~0, so you need additional
> + * information to reliably identify errors.
> + */
> +#define PCI_ERROR_RESPONSE			(~0ULL)
> +#define SET_PCI_ERROR_RESPONSE(val)	(*val = ((typeof(*val)) PCI_ERROR_RESPONSE))
> +#define RESPONSE_IS_PCI_ERROR(val)	(*val == ((typeof(*val)) PCI_ERROR_RESPONSE))

No reason for val to be a pointer.

Also, macro parameters need () around them. val could be an expression 
like 'ptr + 1' which would blow up for example.

> +
>  /*
>   * pci_power_t values must match the bits in the Capabilities PME_Support
>   * and Control/Status PowerState fields in the Power Management capability.
> -- 
> 2.25.1
> 
> 

  reply	other threads:[~2021-10-20 13:24 UTC|newest]

Thread overview: 95+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-15 14:35 [PATCH v2 00/24] Unify PCI error response checking Naveen Naidu
2021-10-15 14:35 ` Naveen Naidu
2021-10-15 14:35 ` Naveen Naidu
2021-10-15 14:35 ` Naveen Naidu
2021-10-15 14:35 ` Naveen Naidu
2021-10-15 14:35 ` Naveen Naidu
2021-10-15 14:28 ` [PATCH v2 01/24] PCI: Add PCI_ERROR_RESPONSE and it's related definitions Naveen Naidu
2021-10-15 14:28   ` Naveen Naidu
2021-10-20 13:24   ` Rob Herring [this message]
2021-10-20 13:24     ` Rob Herring
2021-10-15 14:28 ` [PATCH v2 02/24] PCI: Set error response in config access defines when ops->read() fails Naveen Naidu
2021-10-15 14:28   ` Naveen Naidu
2021-10-20 13:41   ` Rob Herring
2021-10-20 13:41     ` Rob Herring
2021-10-20 13:52   ` Pali Rohár
2021-10-20 13:52     ` Pali Rohár
2021-10-20 15:13     ` Naveen Naidu
2021-10-20 15:13       ` Naveen Naidu
2021-10-15 14:38 ` [PATCH v2 03/24] PCI: Unify PCI error response checking Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-20 13:13   ` Rob Herring
2021-10-20 13:13     ` Rob Herring
2021-10-20 15:15     ` Naveen Naidu
2021-10-20 15:15       ` Naveen Naidu
2021-10-15 14:38 ` [PATCH v2 04/24] PCI: Remove redundant error fabrication when device read fails Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-20 13:42   ` Rob Herring
2021-10-20 13:42     ` Rob Herring
2021-10-15 14:38 ` [PATCH v2 05/24] PCI: thunder: " Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38 ` [PATCH v2 06/24] PCI: iproc: " Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 16:49   ` Ray Jui via Linux-kernel-mentees
2021-10-15 16:49     ` Ray Jui
2021-10-15 16:49     ` Ray Jui
2021-10-15 17:05     ` Naveen Naidu
2021-10-15 17:05       ` Naveen Naidu
2021-10-15 17:05       ` Naveen Naidu
2021-10-15 14:38 ` [PATCH v2 07/24] PCI: mediatek: " Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38 ` [PATCH v2 08/24] PCI: exynos: " Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38 ` [PATCH v2 09/24] PCI: histb: " Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38 ` [PATCH v2 10/24] PCI: kirin: " Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38 ` [PATCH v2 11/24] PCI: aardvark: " Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38 ` [PATCH v2 12/24] PCI: mvebu: " Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38 ` [PATCH v2 13/24] PCI: altera: " Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38 ` [PATCH v2 14/24] PCI: rcar: " Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-18 11:32   ` Geert Uytterhoeven
2021-10-18 11:32     ` Geert Uytterhoeven
2021-10-18 11:51     ` Naveen Naidu
2021-10-18 11:51       ` Naveen Naidu
2021-10-18 12:00       ` Geert Uytterhoeven
2021-10-18 12:00         ` Geert Uytterhoeven
2021-10-15 14:38 ` [PATCH v2 15/24] PCI: rockchip: " Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38 ` [PATCH v2 16/24] PCI/ERR: Use RESPONSE_IS_PCI_ERROR() to check read from hardware Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:38 ` [PATCH v2 17/24] PCI: vmd: " Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 14:52   ` Naveen Naidu
2021-10-15 14:52     ` Naveen Naidu
2021-10-15 14:38 ` [PATCH v2 18/24] PCI: pciehp: " Naveen Naidu
2021-10-15 14:38   ` Naveen Naidu
2021-10-15 15:15   ` Naveen Naidu
2021-10-15 15:15     ` Naveen Naidu
2021-10-15 14:39 ` [PATCH v2 19/24] PCI/DPC: " Naveen Naidu
2021-10-15 14:39   ` Naveen Naidu
2021-10-15 14:39   ` Naveen Naidu
2021-10-15 14:39 ` [PATCH v2 20/24] PCI/PME: " Naveen Naidu
2021-10-15 14:39   ` Naveen Naidu
2021-10-15 14:39 ` [PATCH v2 21/24] PCI: cpqphp: " Naveen Naidu
2021-10-15 14:39   ` Naveen Naidu
2021-10-15 14:39 ` [PATCH v2 22/24] PCI: keystone: Use PCI_ERROR_RESPONSE to specify hardware error Naveen Naidu
2021-10-15 14:39   ` Naveen Naidu
2021-10-15 14:39 ` [PATCH v2 23/24] PCI: hv: Use PCI_ERROR_RESPONSE to specify hardware read error Naveen Naidu
2021-10-15 14:39   ` Naveen Naidu
2021-10-15 14:39 ` [PATCH v2 24/24] PCI: xgene: Use PCI_ERROR_RESPONSE to specify hardware error Naveen Naidu
2021-10-15 14:39   ` Naveen Naidu
2021-10-15 14:39   ` Naveen Naidu

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=YXAYjkLyS53Bod3j@robh.at.kernel.org \
    --to=robh@kernel.org \
    --cc=bhelgaas@google.com \
    --cc=linux-kernel-mentees@lists.linuxfoundation.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=naveennaidu479@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.