From: Andi Shyti <andi.shyti@linux.intel.com>
To: Matt Roper <matthew.d.roper@intel.com>
Cc: intel-gfx@lists.freedesktop.org,
Lucas De Marchi <lucas.demarchi@intel.com>,
dri-devel@lists.freedesktop.org,
Matthew Auld <matthew.auld@intel.com>
Subject: Re: [Intel-gfx] [PATCH v3 03/10] drm/i915: Restructure probe to handle multi-tile platforms
Date: Tue, 2 Nov 2021 00:21:11 +0100 [thread overview]
Message-ID: <YYB2Z3QT7Dru1w+c@intel.intel> (raw)
In-Reply-To: <20211029032817.3747750-4-matthew.d.roper@intel.com>
Hi Matt,
> +static int
> +intel_gt_tile_setup(struct intel_gt *gt, unsigned int id, phys_addr_t phys_addr)
I have already r-b this, but, as I commented in patch 5, 'id' is
redundant. Can we remove it?
Andi
> +{
> + int ret;
> +
> + intel_uncore_init_early(gt->uncore, gt->i915);
> +
> + ret = intel_uncore_setup_mmio(gt->uncore, phys_addr);
> + if (ret)
> + return ret;
> +
> + gt->phys_addr = phys_addr;
> +
> + return 0;
> +}
[...]
> + /* We always have at least one primary GT on any device */
> + ret = intel_gt_tile_setup(&i915->gt, 0, phys_addr);
> + if (ret)
> + return ret;
> +
> + /* TODO: add more tiles */
> + return 0;
> +}
WARNING: multiple messages have this Message-ID (diff)
From: Andi Shyti <andi.shyti@linux.intel.com>
To: Matt Roper <matthew.d.roper@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>,
intel-gfx@lists.freedesktop.org,
Lucas De Marchi <lucas.demarchi@intel.com>,
dri-devel@lists.freedesktop.org,
Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>,
Matthew Auld <matthew.auld@intel.com>
Subject: Re: [PATCH v3 03/10] drm/i915: Restructure probe to handle multi-tile platforms
Date: Tue, 2 Nov 2021 00:21:11 +0100 [thread overview]
Message-ID: <YYB2Z3QT7Dru1w+c@intel.intel> (raw)
In-Reply-To: <20211029032817.3747750-4-matthew.d.roper@intel.com>
Hi Matt,
> +static int
> +intel_gt_tile_setup(struct intel_gt *gt, unsigned int id, phys_addr_t phys_addr)
I have already r-b this, but, as I commented in patch 5, 'id' is
redundant. Can we remove it?
Andi
> +{
> + int ret;
> +
> + intel_uncore_init_early(gt->uncore, gt->i915);
> +
> + ret = intel_uncore_setup_mmio(gt->uncore, phys_addr);
> + if (ret)
> + return ret;
> +
> + gt->phys_addr = phys_addr;
> +
> + return 0;
> +}
[...]
> + /* We always have at least one primary GT on any device */
> + ret = intel_gt_tile_setup(&i915->gt, 0, phys_addr);
> + if (ret)
> + return ret;
> +
> + /* TODO: add more tiles */
> + return 0;
> +}
next prev parent reply other threads:[~2021-11-01 23:21 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-29 3:28 [Intel-gfx] [PATCH v3 00/10] i915: Initial multi-tile support Matt Roper
2021-10-29 3:28 ` Matt Roper
2021-10-29 3:28 ` [Intel-gfx] [PATCH v3 01/10] drm/i915: rework some irq functions to take intel_gt as argument Matt Roper
2021-10-29 3:28 ` Matt Roper
2021-10-29 3:28 ` [Intel-gfx] [PATCH v3 02/10] drm/i915: split general MMIO setup from per-GT uncore init Matt Roper
2021-10-29 3:28 ` Matt Roper
2021-11-11 5:12 ` [Intel-gfx] " Matt Roper
2021-11-11 5:12 ` Matt Roper
2021-10-29 3:28 ` [Intel-gfx] [PATCH v3 03/10] drm/i915: Restructure probe to handle multi-tile platforms Matt Roper
2021-10-29 3:28 ` Matt Roper
2021-11-01 22:58 ` [Intel-gfx] " Andi Shyti
2021-11-01 22:58 ` Andi Shyti
2021-11-01 23:21 ` Andi Shyti [this message]
2021-11-01 23:21 ` Andi Shyti
2021-10-29 3:28 ` [Intel-gfx] [PATCH v3 04/10] drm/i915: Store backpointer to GT in uncore Matt Roper
2021-10-29 3:28 ` Matt Roper
2021-10-29 3:28 ` [Intel-gfx] [PATCH v3 05/10] drm/i915: Prepare for multiple gts Matt Roper
2021-10-29 3:28 ` Matt Roper
2021-11-01 23:11 ` [Intel-gfx] " Andi Shyti
2021-11-01 23:11 ` Andi Shyti
2021-11-02 9:36 ` [Intel-gfx] " Tvrtko Ursulin
2021-11-02 11:26 ` Andi Shyti
2021-11-02 11:26 ` Andi Shyti
2021-11-02 13:58 ` Tvrtko Ursulin
2021-11-02 21:08 ` Andi Shyti
2021-11-02 21:08 ` Andi Shyti
2021-10-29 3:28 ` [Intel-gfx] [PATCH v3 06/10] drm/i915: Initial support for per-tile uncore Matt Roper
2021-10-29 3:28 ` Matt Roper
2021-10-29 3:28 ` [Intel-gfx] [PATCH v3 07/10] drm/i915/xehp: Determine which tile raised an interrupt Matt Roper
2021-10-29 3:28 ` Matt Roper
2021-11-01 23:33 ` [Intel-gfx] " Andi Shyti
2021-11-01 23:33 ` Andi Shyti
2021-10-29 3:28 ` [Intel-gfx] [PATCH v3 08/10] drm/i915/xehp: Make IRQ reset and postinstall multi-tile aware Matt Roper
2021-10-29 3:28 ` Matt Roper
2021-10-29 3:28 ` [Intel-gfx] [PATCH v3 09/10] drm/i915/guc: Update CT debug macro for multi-tile Matt Roper
2021-10-29 3:28 ` Matt Roper
2021-11-01 23:35 ` [Intel-gfx] " Andi Shyti
2021-11-01 23:35 ` Andi Shyti
2021-10-29 3:28 ` [Intel-gfx] [PATCH v3 10/10] drm/i915/xehpsdv: Initialize multi-tiles Matt Roper
2021-10-29 3:28 ` Matt Roper
2021-10-29 3:54 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915: Initial multi-tile support (rev3) Patchwork
2021-10-29 4:26 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-10-29 10:16 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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