All of lore.kernel.org
 help / color / mirror / Atom feed
* PCI latency
@ 2003-03-28 23:08 Giuliano Pochini
  2003-03-28 23:54 ` Jan "Evil Twin" Depner
  0 siblings, 1 reply; 10+ messages in thread
From: Giuliano Pochini @ 2003-03-28 23:08 UTC (permalink / raw)
  To: alsa-devel


The documentation of my card says I should set pci latency to 0xC0. What
is that latency ?  How do I change it ?


Bye.




-------------------------------------------------------
This SF.net email is sponsored by:
The Definitive IT and Networking Event. Be There!
NetWorld+Interop Las Vegas 2003 -- Register today!
http://ads.sourceforge.net/cgi-bin/redirect.pl?keyn0001en

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: PCI latency
  2003-03-28 23:08 PCI latency Giuliano Pochini
@ 2003-03-28 23:54 ` Jan "Evil Twin" Depner
  0 siblings, 0 replies; 10+ messages in thread
From: Jan "Evil Twin" Depner @ 2003-03-28 23:54 UTC (permalink / raw)
  To: Giuliano Pochini; +Cc: alsa-devel

I've got some documentation on that on my web page -
http://myweb.cableone.net/eviltwin69/ALSA_JACK_ARDOUR.html.

0xC0 is 192 decimal.  You can go up to 248.

Jan


On Fri, 2003-03-28 at 17:08, Giuliano Pochini wrote:
> 
> The documentation of my card says I should set pci latency to 0xC0. What
> is that latency ?  How do I change it ?
> 
> 
> Bye.
> 
> 
> 
> 
> -------------------------------------------------------
> This SF.net email is sponsored by:
> The Definitive IT and Networking Event. Be There!
> NetWorld+Interop Las Vegas 2003 -- Register today!
> http://ads.sourceforge.net/cgi-bin/redirect.pl?keyn0001en
> _______________________________________________
> Alsa-devel mailing list
> Alsa-devel@lists.sourceforge.net
> https://lists.sourceforge.net/lists/listinfo/alsa-devel




-------------------------------------------------------
This SF.net email is sponsored by:
The Definitive IT and Networking Event. Be There!
NetWorld+Interop Las Vegas 2003 -- Register today!
http://ads.sourceforge.net/cgi-bin/redirect.pl?keyn0001en

^ permalink raw reply	[flat|nested] 10+ messages in thread

* PCI: latency
@ 2021-12-03 17:00 ` Subhashini Rao Beerisetty
  0 siblings, 0 replies; 10+ messages in thread
From: Subhashini Rao Beerisetty @ 2021-12-03 17:00 UTC (permalink / raw)
  To: linux-pci, LKML, kernelnewbies

 [ Please keep me in CC as I'm not subscribed to the list]

Hi all,

We are using the Linux OS on an x86_64 machine. I need to measure the
PCIe latency on my system, does kernel have any latency measurement
module for the PCIe bus?

Thanks,

_______________________________________________
Kernelnewbies mailing list
Kernelnewbies@kernelnewbies.org
https://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies

^ permalink raw reply	[flat|nested] 10+ messages in thread

* PCI: latency
@ 2021-12-03 17:00 ` Subhashini Rao Beerisetty
  0 siblings, 0 replies; 10+ messages in thread
From: Subhashini Rao Beerisetty @ 2021-12-03 17:00 UTC (permalink / raw)
  To: linux-pci, LKML, kernelnewbies

 [ Please keep me in CC as I'm not subscribed to the list]

Hi all,

We are using the Linux OS on an x86_64 machine. I need to measure the
PCIe latency on my system, does kernel have any latency measurement
module for the PCIe bus?

Thanks,

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: PCI: latency
  2021-12-03 17:00 ` Subhashini Rao Beerisetty
@ 2021-12-04  8:18   ` Greg KH
  -1 siblings, 0 replies; 10+ messages in thread
From: Greg KH @ 2021-12-04  8:18 UTC (permalink / raw)
  To: Subhashini Rao Beerisetty; +Cc: linux-pci, LKML, kernelnewbies

On Fri, Dec 03, 2021 at 10:30:58PM +0530, Subhashini Rao Beerisetty wrote:
>  [ Please keep me in CC as I'm not subscribed to the list]
> 
> Hi all,
> 
> We are using the Linux OS on an x86_64 machine. I need to measure the
> PCIe latency on my system, does kernel have any latency measurement
> module for the PCIe bus?

How exactly are you going to define PCIe latency?

And what is this going to be used for?

thanks,

greg k-h

_______________________________________________
Kernelnewbies mailing list
Kernelnewbies@kernelnewbies.org
https://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: PCI: latency
@ 2021-12-04  8:18   ` Greg KH
  0 siblings, 0 replies; 10+ messages in thread
From: Greg KH @ 2021-12-04  8:18 UTC (permalink / raw)
  To: Subhashini Rao Beerisetty; +Cc: linux-pci, LKML, kernelnewbies

On Fri, Dec 03, 2021 at 10:30:58PM +0530, Subhashini Rao Beerisetty wrote:
>  [ Please keep me in CC as I'm not subscribed to the list]
> 
> Hi all,
> 
> We are using the Linux OS on an x86_64 machine. I need to measure the
> PCIe latency on my system, does kernel have any latency measurement
> module for the PCIe bus?

How exactly are you going to define PCIe latency?

And what is this going to be used for?

thanks,

greg k-h

^ permalink raw reply	[flat|nested] 10+ messages in thread

* RE: latency
  2021-12-03 17:00 ` Subhashini Rao Beerisetty
@ 2021-12-04 14:34   ` David Laight
  -1 siblings, 0 replies; 10+ messages in thread
From: David Laight @ 2021-12-04 14:34 UTC (permalink / raw)
  To: 'Subhashini Rao Beerisetty', linux-pci@vger.kernel.org,
	LKML, kernelnewbies

From: Subhashini Rao Beerisetty <subhashbeerisetty@gmail.com>
> Sent: 03 December 2021 17:01
> 
>  [ Please keep me in CC as I'm not subscribed to the list]
> 
> Hi all,
> 
> We are using the Linux OS on an x86_64 machine. I need to measure the
> PCIe latency on my system, does kernel have any latency measurement
> module for the PCIe bus?

Slower than you expect :-)

Writes are asynchronous so really only limited by the actual speed
of the PCIe link and the rate the slave can process them.
So the actual latency of writes doesn't matter and the throughput
is reasonable.

Reads are much more problematic.
While the PCIe bus allows multiple outstanding read requests the
Intel x86 I've tested will only generate one outstanding request
for each cpu core.
So buffer reads are particularly slow.

The delays between on read completing and the next read TLP being
sent are (probably) negligible compared to the other delays.
So the latency of a read is just the time the two TLP take to
be transmitted over the wire (including delays for PCIe bridges)
plus the time the slave takes to generate the response TLP.
On the fpga slaves we are using that is (from memory) about 128
cycles of the 62.5MHz clock - ie absolutely ages.

For reads you definitely need to use the largest register size
possible - each read instruction (even misaligned ones) generates
exactly one read TLP.

If you are designing an interface for an fpga then consider using
writes from both sides for everything except bulk data.

You can (probably) measure the latency of your actual system using:
	x = rdtsc();
	v = readl();
	lfence;
	elapsed = rdtsc() - x;
However the TSC values depend on the current cpu frequency (which
will change 'randomly').
Or put the readl() into a loop and do enough that the high-res
system time delts makes sense.

	David

-
Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK
Registration No: 1397386 (Wales)
_______________________________________________
Kernelnewbies mailing list
Kernelnewbies@kernelnewbies.org
https://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies

^ permalink raw reply	[flat|nested] 10+ messages in thread

* RE: latency
@ 2021-12-04 14:34   ` David Laight
  0 siblings, 0 replies; 10+ messages in thread
From: David Laight @ 2021-12-04 14:34 UTC (permalink / raw)
  To: 'Subhashini Rao Beerisetty', linux-pci@vger.kernel.org,
	LKML, kernelnewbies

From: Subhashini Rao Beerisetty <subhashbeerisetty@gmail.com>
> Sent: 03 December 2021 17:01
> 
>  [ Please keep me in CC as I'm not subscribed to the list]
> 
> Hi all,
> 
> We are using the Linux OS on an x86_64 machine. I need to measure the
> PCIe latency on my system, does kernel have any latency measurement
> module for the PCIe bus?

Slower than you expect :-)

Writes are asynchronous so really only limited by the actual speed
of the PCIe link and the rate the slave can process them.
So the actual latency of writes doesn't matter and the throughput
is reasonable.

Reads are much more problematic.
While the PCIe bus allows multiple outstanding read requests the
Intel x86 I've tested will only generate one outstanding request
for each cpu core.
So buffer reads are particularly slow.

The delays between on read completing and the next read TLP being
sent are (probably) negligible compared to the other delays.
So the latency of a read is just the time the two TLP take to
be transmitted over the wire (including delays for PCIe bridges)
plus the time the slave takes to generate the response TLP.
On the fpga slaves we are using that is (from memory) about 128
cycles of the 62.5MHz clock - ie absolutely ages.

For reads you definitely need to use the largest register size
possible - each read instruction (even misaligned ones) generates
exactly one read TLP.

If you are designing an interface for an fpga then consider using
writes from both sides for everything except bulk data.

You can (probably) measure the latency of your actual system using:
	x = rdtsc();
	v = readl();
	lfence;
	elapsed = rdtsc() - x;
However the TSC values depend on the current cpu frequency (which
will change 'randomly').
Or put the readl() into a loop and do enough that the high-res
system time delts makes sense.

	David

-
Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK
Registration No: 1397386 (Wales)

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: PCI: latency
  2021-12-03 17:00 ` Subhashini Rao Beerisetty
@ 2021-12-06 19:39   ` Bjorn Helgaas
  -1 siblings, 0 replies; 10+ messages in thread
From: Bjorn Helgaas @ 2021-12-06 19:39 UTC (permalink / raw)
  To: Subhashini Rao Beerisetty; +Cc: linux-pci, LKML, kernelnewbies

On Fri, Dec 03, 2021 at 10:30:58PM +0530, Subhashini Rao Beerisetty wrote:
>  [ Please keep me in CC as I'm not subscribed to the list]
> 
> Hi all,
> 
> We are using the Linux OS on an x86_64 machine. I need to measure the
> PCIe latency on my system, does kernel have any latency measurement
> module for the PCIe bus?

No, unfortunately not.  Maybe perf could help, but I don't know enough
to give you any pointers.

There are a couple tune/trace things like [1], but they're specific to
hardware that you're probably not using.

[1] https://lore.kernel.org/r/20211116090625.53702-1-yangyicong@hisilicon.com

_______________________________________________
Kernelnewbies mailing list
Kernelnewbies@kernelnewbies.org
https://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: PCI: latency
@ 2021-12-06 19:39   ` Bjorn Helgaas
  0 siblings, 0 replies; 10+ messages in thread
From: Bjorn Helgaas @ 2021-12-06 19:39 UTC (permalink / raw)
  To: Subhashini Rao Beerisetty; +Cc: linux-pci, LKML, kernelnewbies

On Fri, Dec 03, 2021 at 10:30:58PM +0530, Subhashini Rao Beerisetty wrote:
>  [ Please keep me in CC as I'm not subscribed to the list]
> 
> Hi all,
> 
> We are using the Linux OS on an x86_64 machine. I need to measure the
> PCIe latency on my system, does kernel have any latency measurement
> module for the PCIe bus?

No, unfortunately not.  Maybe perf could help, but I don't know enough
to give you any pointers.

There are a couple tune/trace things like [1], but they're specific to
hardware that you're probably not using.

[1] https://lore.kernel.org/r/20211116090625.53702-1-yangyicong@hisilicon.com

^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2021-12-06 19:40 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2021-12-03 17:00 PCI: latency Subhashini Rao Beerisetty
2021-12-03 17:00 ` Subhashini Rao Beerisetty
2021-12-04  8:18 ` Greg KH
2021-12-04  8:18   ` Greg KH
2021-12-04 14:34 ` latency David Laight
2021-12-04 14:34   ` latency David Laight
2021-12-06 19:39 ` PCI: latency Bjorn Helgaas
2021-12-06 19:39   ` Bjorn Helgaas
  -- strict thread matches above, loose matches on Subject: below --
2003-03-28 23:08 PCI latency Giuliano Pochini
2003-03-28 23:54 ` Jan "Evil Twin" Depner

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.