From: Tzung-Bi Shih <tzungbi@google.com>
To: Trevor Wu <trevor.wu@mediatek.com>
Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org,
tiwai@suse.com, robh+dt@kernel.org, linux-kernel@vger.kernel.org,
shumingf@realtek.com, broonie@kernel.org,
linux-mediatek@lists.infradead.org, jiaxin.yu@mediatek.com,
matthias.bgg@gmail.com, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2] ASoC: mediatek: mt8195: update control for RT5682 series
Date: Tue, 28 Dec 2021 15:12:16 +0800 [thread overview]
Message-ID: <Ycq40KwY8SxUslXC@google.com> (raw)
In-Reply-To: <20211228064821.27865-1-trevor.wu@mediatek.com>
On Tue, Dec 28, 2021 at 02:48:21PM +0800, Trevor Wu wrote:
> Playback pop is observed and the root cause is the reference clock
> provided by MT8195 is diabled before RT5682 finishes the control flow.
>
> To ensure the reference clock supplied to RT5682 is disabled after RT5682
> finishes all register controls. We replace BCLK with MCLK for RT5682
> reference clock, and makes use of set_bias_level_post to handle MCLK
> which guarantees MCLK is off after all RT5682 register access.
>
> Signed-off-by: Trevor Wu <trevor.wu@mediatek.com>
Reviewed-by: Tzung-Bi Shih <tzungbi@google.com>
WARNING: multiple messages have this Message-ID (diff)
From: Tzung-Bi Shih <tzungbi@google.com>
To: Trevor Wu <trevor.wu@mediatek.com>
Cc: broonie@kernel.org, tiwai@suse.com, robh+dt@kernel.org,
matthias.bgg@gmail.com, alsa-devel@alsa-project.org,
linux-mediatek@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
jiaxin.yu@mediatek.com, shumingf@realtek.com
Subject: Re: [PATCH v2] ASoC: mediatek: mt8195: update control for RT5682 series
Date: Tue, 28 Dec 2021 15:12:16 +0800 [thread overview]
Message-ID: <Ycq40KwY8SxUslXC@google.com> (raw)
In-Reply-To: <20211228064821.27865-1-trevor.wu@mediatek.com>
On Tue, Dec 28, 2021 at 02:48:21PM +0800, Trevor Wu wrote:
> Playback pop is observed and the root cause is the reference clock
> provided by MT8195 is diabled before RT5682 finishes the control flow.
>
> To ensure the reference clock supplied to RT5682 is disabled after RT5682
> finishes all register controls. We replace BCLK with MCLK for RT5682
> reference clock, and makes use of set_bias_level_post to handle MCLK
> which guarantees MCLK is off after all RT5682 register access.
>
> Signed-off-by: Trevor Wu <trevor.wu@mediatek.com>
Reviewed-by: Tzung-Bi Shih <tzungbi@google.com>
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
WARNING: multiple messages have this Message-ID (diff)
From: Tzung-Bi Shih <tzungbi@google.com>
To: Trevor Wu <trevor.wu@mediatek.com>
Cc: broonie@kernel.org, tiwai@suse.com, robh+dt@kernel.org,
matthias.bgg@gmail.com, alsa-devel@alsa-project.org,
linux-mediatek@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
jiaxin.yu@mediatek.com, shumingf@realtek.com
Subject: Re: [PATCH v2] ASoC: mediatek: mt8195: update control for RT5682 series
Date: Tue, 28 Dec 2021 15:12:16 +0800 [thread overview]
Message-ID: <Ycq40KwY8SxUslXC@google.com> (raw)
In-Reply-To: <20211228064821.27865-1-trevor.wu@mediatek.com>
On Tue, Dec 28, 2021 at 02:48:21PM +0800, Trevor Wu wrote:
> Playback pop is observed and the root cause is the reference clock
> provided by MT8195 is diabled before RT5682 finishes the control flow.
>
> To ensure the reference clock supplied to RT5682 is disabled after RT5682
> finishes all register controls. We replace BCLK with MCLK for RT5682
> reference clock, and makes use of set_bias_level_post to handle MCLK
> which guarantees MCLK is off after all RT5682 register access.
>
> Signed-off-by: Trevor Wu <trevor.wu@mediatek.com>
Reviewed-by: Tzung-Bi Shih <tzungbi@google.com>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Tzung-Bi Shih <tzungbi@google.com>
To: Trevor Wu <trevor.wu@mediatek.com>
Cc: broonie@kernel.org, tiwai@suse.com, robh+dt@kernel.org,
matthias.bgg@gmail.com, alsa-devel@alsa-project.org,
linux-mediatek@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
jiaxin.yu@mediatek.com, shumingf@realtek.com
Subject: Re: [PATCH v2] ASoC: mediatek: mt8195: update control for RT5682 series
Date: Tue, 28 Dec 2021 15:12:16 +0800 [thread overview]
Message-ID: <Ycq40KwY8SxUslXC@google.com> (raw)
In-Reply-To: <20211228064821.27865-1-trevor.wu@mediatek.com>
On Tue, Dec 28, 2021 at 02:48:21PM +0800, Trevor Wu wrote:
> Playback pop is observed and the root cause is the reference clock
> provided by MT8195 is diabled before RT5682 finishes the control flow.
>
> To ensure the reference clock supplied to RT5682 is disabled after RT5682
> finishes all register controls. We replace BCLK with MCLK for RT5682
> reference clock, and makes use of set_bias_level_post to handle MCLK
> which guarantees MCLK is off after all RT5682 register access.
>
> Signed-off-by: Trevor Wu <trevor.wu@mediatek.com>
Reviewed-by: Tzung-Bi Shih <tzungbi@google.com>
next prev parent reply other threads:[~2021-12-28 7:13 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-28 6:48 [PATCH v2] ASoC: mediatek: mt8195: update control for RT5682 series Trevor Wu
2021-12-28 6:48 ` Trevor Wu
2021-12-28 6:48 ` Trevor Wu
2021-12-28 6:48 ` Trevor Wu
2021-12-28 7:12 ` Tzung-Bi Shih [this message]
2021-12-28 7:12 ` Tzung-Bi Shih
2021-12-28 7:12 ` Tzung-Bi Shih
2021-12-28 7:12 ` Tzung-Bi Shih
2021-12-29 13:29 ` Mark Brown
2021-12-29 13:29 ` Mark Brown
2021-12-29 13:29 ` Mark Brown
2021-12-29 13:29 ` Mark Brown
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