From: Andrew Lunn <andrew@lunn.ch>
To: Chris Packham <Chris.Packham@alliedtelesis.co.nz>
Cc: "linus.walleij@linaro.org" <linus.walleij@linaro.org>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"catalin.marinas@arm.com" <catalin.marinas@arm.com>,
"will@kernel.org" <will@kernel.org>,
"gregory.clement@bootlin.com" <gregory.clement@bootlin.com>,
"sebastian.hesselbarth@gmail.com"
<sebastian.hesselbarth@gmail.com>,
"kostap@marvell.com" <kostap@marvell.com>,
"robert.marko@sartura.hr" <robert.marko@sartura.hr>,
"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v3 2/4] pinctrl: mvebu: pinctrl driver for 98DX2530 SoC
Date: Thu, 7 Apr 2022 01:17:59 +0200 [thread overview]
Message-ID: <Yk4fpxGdhqsORmFs@lunn.ch> (raw)
In-Reply-To: <5033e1ed-a4bc-687a-40f5-767e89317ce3@alliedtelesis.co.nz>
> The pinctrl registers that are used are all continguous (0x80020100 --
> 0x8002011c) .
Great. So long at the DT only has that register range, what you have
should be good.
Andrew
WARNING: multiple messages have this Message-ID (diff)
From: Andrew Lunn <andrew@lunn.ch>
To: Chris Packham <Chris.Packham@alliedtelesis.co.nz>
Cc: "linus.walleij@linaro.org" <linus.walleij@linaro.org>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"catalin.marinas@arm.com" <catalin.marinas@arm.com>,
"will@kernel.org" <will@kernel.org>,
"gregory.clement@bootlin.com" <gregory.clement@bootlin.com>,
"sebastian.hesselbarth@gmail.com"
<sebastian.hesselbarth@gmail.com>,
"kostap@marvell.com" <kostap@marvell.com>,
"robert.marko@sartura.hr" <robert.marko@sartura.hr>,
"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v3 2/4] pinctrl: mvebu: pinctrl driver for 98DX2530 SoC
Date: Thu, 7 Apr 2022 01:17:59 +0200 [thread overview]
Message-ID: <Yk4fpxGdhqsORmFs@lunn.ch> (raw)
In-Reply-To: <5033e1ed-a4bc-687a-40f5-767e89317ce3@alliedtelesis.co.nz>
> The pinctrl registers that are used are all continguous (0x80020100 --
> 0x8002011c) .
Great. So long at the DT only has that register range, what you have
should be good.
Andrew
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next prev parent reply other threads:[~2022-04-06 23:18 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-06 3:21 [PATCH v3 0/4] arm64: mvebu: Support for Marvell 98DX2530 (and variants) Chris Packham
2022-04-06 3:21 ` Chris Packham
2022-04-06 3:21 ` [PATCH v3 1/4] dt-bindings: pinctrl: mvebu: Document bindings for AC5 Chris Packham
2022-04-06 3:21 ` Chris Packham
2022-04-06 23:20 ` Andrew Lunn
2022-04-06 23:20 ` Andrew Lunn
2022-04-13 18:29 ` Rob Herring
2022-04-13 18:29 ` Rob Herring
2022-04-06 3:21 ` [PATCH v3 2/4] pinctrl: mvebu: pinctrl driver for 98DX2530 SoC Chris Packham
2022-04-06 3:21 ` Chris Packham
2022-04-06 12:36 ` Andrew Lunn
2022-04-06 12:36 ` Andrew Lunn
2022-04-06 21:51 ` Chris Packham
2022-04-06 21:51 ` Chris Packham
2022-04-06 23:17 ` Andrew Lunn [this message]
2022-04-06 23:17 ` Andrew Lunn
2022-04-06 3:21 ` [PATCH v3 3/4] arm64: dts: marvell: Add Armada 98DX2530 SoC and RD-AC5X board Chris Packham
2022-04-06 3:21 ` Chris Packham
2022-04-06 23:23 ` Andrew Lunn
2022-04-06 23:23 ` Andrew Lunn
2022-04-06 23:29 ` Chris Packham
2022-04-06 23:29 ` Chris Packham
2022-04-06 3:21 ` [PATCH v3 4/4] arm64: marvell: enable the 98DX2530 pinctrl driver Chris Packham
2022-04-06 3:21 ` Chris Packham
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