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* [PATCH 0/5] thunderbolt: CL1 support for USB4 and Titan Ridge
@ 2022-05-01 20:33 Gil Fine
  2022-05-01 20:33 ` [PATCH 1/5] thunderbolt: Silently ignore CLx enabling in case CLx is not supported Gil Fine
                   ` (4 more replies)
  0 siblings, 5 replies; 18+ messages in thread
From: Gil Fine @ 2022-05-01 20:33 UTC (permalink / raw)
  To: andreas.noever, michael.jamet, mika.westerberg, YehezkelShB
  Cc: gil.fine, linux-usb, lukas

In this series of patches, first, we address several issues in the CL0s
implementation.
Then, we add support for a second low power state of the
link: CL1. Low power states (called collectively CLx) are used to reduce
transmitter and receiver power when a high-speed lane is idle.
We enable it, if both sides of the link support it, and only for the
first hop router (i.e. the first device that connected to the
host router). This is needed for better thermal management.
CL1 improves power management that was intoduced by CL0s.
Also, we add support of dynamic change of TMU mode to Hifi-Uni once DP
tunnel is created. This enables CL0s while DP tunnel exists.
Due to Intel HW limitation, once we changed the TMU mode to Hifi-Uni
(when DP tunnel exists), we don't change TMU mode back to Normal-Uni,
even if DP tunnel is teared-down later.

Gil Fine (5):
  thunderbolt: Silently ignore CLx enabling in case CLx is not supported
  thunderbolt: CLx disable before system suspend only if previously
    enabled
  thunderbolt: Change downstream router's TMU rate in both TMU uni/bidir
    mode
  thunderbolt: Add CL1 support for USB4 and Titan Ridge routers
  thunderbolt: Change TMU mode to Hifi-Uni once DP tunneled

 drivers/thunderbolt/switch.c  |  85 ++++++++-------
 drivers/thunderbolt/tb.c      |  70 +++++++++++--
 drivers/thunderbolt/tb.h      |  22 +++-
 drivers/thunderbolt/tb_regs.h |   8 ++
 drivers/thunderbolt/tmu.c     | 192 ++++++++++++++++++++++++++++------
 5 files changed, 295 insertions(+), 82 deletions(-)

-- 
2.17.1

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^ permalink raw reply	[flat|nested] 18+ messages in thread
* Re: [PATCH 4/5] thunderbolt: Add CL1 support for USB4 and Titan Ridge routers
@ 2022-05-01 23:50 kernel test robot
  0 siblings, 0 replies; 18+ messages in thread
From: kernel test robot @ 2022-05-01 23:50 UTC (permalink / raw)
  To: kbuild

[-- Attachment #1: Type: text/plain, Size: 5597 bytes --]

CC: kbuild-all(a)lists.01.org
BCC: lkp(a)intel.com
In-Reply-To: <20220501203321.19021-5-gil.fine@intel.com>
References: <20220501203321.19021-5-gil.fine@intel.com>
TO: Gil Fine <gil.fine@intel.com>
TO: andreas.noever(a)gmail.com
TO: michael.jamet(a)intel.com
TO: mika.westerberg(a)linux.intel.com
TO: YehezkelShB(a)gmail.com
CC: gil.fine(a)intel.com
CC: linux-usb(a)vger.kernel.org
CC: lukas(a)wunner.de

Hi Gil,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on linus/master]
[also build test WARNING on v5.18-rc5 next-20220429]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/intel-lab-lkp/linux/commits/Gil-Fine/thunderbolt-CL1-support-for-USB4-and-Titan-Ridge/20220502-042620
base:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git b2da7df52e16110c8d8dda0602db81c15711e7ff
:::::: branch date: 3 hours ago
:::::: commit date: 3 hours ago
compiler: sparc64-linux-gcc (GCC) 11.3.0
reproduce (cppcheck warning):
        # apt-get install cppcheck
        git checkout f775f468178fe45bda2e74cc13c066679de592a8
        cppcheck --quiet --enable=style,performance,portability --template=gcc FILE

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>


cppcheck possible warnings: (new ones prefixed by >>, may not real problems)

>> drivers/thunderbolt/tmu.c:17:6: warning: Variable 'freq_meas_wind' can be declared with const [constVariable]
    u32 freq_meas_wind[2] = { 30, 800 };
        ^
>> drivers/thunderbolt/tmu.c:18:6: warning: Variable 'avg_const' can be declared with const [constVariable]
    u32 avg_const[2] = { 4, 8 };
        ^

vim +/freq_meas_wind +17 drivers/thunderbolt/tmu.c

cf29b9afb12149 Rajmohan Mani 2019-12-17  13  
f775f468178fe4 Gil Fine      2022-05-01  14  static int tb_switch_set_tmu_mode_params(struct tb_switch *sw,
f775f468178fe4 Gil Fine      2022-05-01  15  					 enum tb_switch_tmu_rate rate)
f775f468178fe4 Gil Fine      2022-05-01  16  {
f775f468178fe4 Gil Fine      2022-05-01 @17  	u32 freq_meas_wind[2] = { 30, 800 };
f775f468178fe4 Gil Fine      2022-05-01 @18  	u32 avg_const[2] = { 4, 8 };
f775f468178fe4 Gil Fine      2022-05-01  19  	u32 freq, avg, val;
f775f468178fe4 Gil Fine      2022-05-01  20  	int ret;
f775f468178fe4 Gil Fine      2022-05-01  21  
f775f468178fe4 Gil Fine      2022-05-01  22  	if (rate == TB_SWITCH_TMU_RATE_NORMAL) {
f775f468178fe4 Gil Fine      2022-05-01  23  		freq = freq_meas_wind[0];
f775f468178fe4 Gil Fine      2022-05-01  24  		avg = avg_const[0];
f775f468178fe4 Gil Fine      2022-05-01  25  	} else if (rate == TB_SWITCH_TMU_RATE_HIFI) {
f775f468178fe4 Gil Fine      2022-05-01  26  		freq = freq_meas_wind[1];
f775f468178fe4 Gil Fine      2022-05-01  27  		avg = avg_const[1];
f775f468178fe4 Gil Fine      2022-05-01  28  	} else {
f775f468178fe4 Gil Fine      2022-05-01  29  		return 0;
f775f468178fe4 Gil Fine      2022-05-01  30  	}
f775f468178fe4 Gil Fine      2022-05-01  31  
f775f468178fe4 Gil Fine      2022-05-01  32  	ret = tb_sw_read(sw, &val, TB_CFG_SWITCH,
f775f468178fe4 Gil Fine      2022-05-01  33  			 sw->tmu.cap + TMU_RTR_CS_0, 1);
f775f468178fe4 Gil Fine      2022-05-01  34  	if (ret)
f775f468178fe4 Gil Fine      2022-05-01  35  		return ret;
f775f468178fe4 Gil Fine      2022-05-01  36  
f775f468178fe4 Gil Fine      2022-05-01  37  	val &= ~TMU_RTR_CS_0_FREQ_WIND_MASK;
f775f468178fe4 Gil Fine      2022-05-01  38  	val |= freq << TMU_RTR_CS_0_FREQ_WIND_SHIFT;
f775f468178fe4 Gil Fine      2022-05-01  39  
f775f468178fe4 Gil Fine      2022-05-01  40  	ret = tb_sw_write(sw, &val, TB_CFG_SWITCH,
f775f468178fe4 Gil Fine      2022-05-01  41  			  sw->tmu.cap + TMU_RTR_CS_0, 1);
f775f468178fe4 Gil Fine      2022-05-01  42  	if (ret)
f775f468178fe4 Gil Fine      2022-05-01  43  		return ret;
f775f468178fe4 Gil Fine      2022-05-01  44  
f775f468178fe4 Gil Fine      2022-05-01  45  	ret = tb_sw_read(sw, &val, TB_CFG_SWITCH,
f775f468178fe4 Gil Fine      2022-05-01  46  			 sw->tmu.cap + TMU_RTR_CS_15, 1);
f775f468178fe4 Gil Fine      2022-05-01  47  	if (ret)
f775f468178fe4 Gil Fine      2022-05-01  48  		return ret;
f775f468178fe4 Gil Fine      2022-05-01  49  
f775f468178fe4 Gil Fine      2022-05-01  50  	val &= ~TMU_RTR_CS_15_AVG_MASK << TMU_RTR_CS_15_FREQ_AVG_SHIFT &
f775f468178fe4 Gil Fine      2022-05-01  51  		~TMU_RTR_CS_15_AVG_MASK << TMU_RTR_CS_15_DELAY_AVG_SHIFT &
f775f468178fe4 Gil Fine      2022-05-01  52  		~TMU_RTR_CS_15_AVG_MASK << TMU_RTR_CS_15_OFFSET_AVG_SHIFT &
f775f468178fe4 Gil Fine      2022-05-01  53  		~TMU_RTR_CS_15_AVG_MASK << TMU_RTR_CS_15_ERROR_AVG_SHIFT;
f775f468178fe4 Gil Fine      2022-05-01  54  	val |= avg << TMU_RTR_CS_15_FREQ_AVG_SHIFT |
f775f468178fe4 Gil Fine      2022-05-01  55  		avg << TMU_RTR_CS_15_DELAY_AVG_SHIFT |
f775f468178fe4 Gil Fine      2022-05-01  56  		avg << TMU_RTR_CS_15_OFFSET_AVG_SHIFT |
f775f468178fe4 Gil Fine      2022-05-01  57  		avg << TMU_RTR_CS_15_ERROR_AVG_SHIFT;
f775f468178fe4 Gil Fine      2022-05-01  58  
f775f468178fe4 Gil Fine      2022-05-01  59  	return tb_sw_write(sw, &val, TB_CFG_SWITCH,
f775f468178fe4 Gil Fine      2022-05-01  60  			   sw->tmu.cap + TMU_RTR_CS_15, 1);
f775f468178fe4 Gil Fine      2022-05-01  61  }
f775f468178fe4 Gil Fine      2022-05-01  62  

-- 
0-DAY CI Kernel Test Service
https://01.org/lkp

^ permalink raw reply	[flat|nested] 18+ messages in thread

end of thread, other threads:[~2022-05-08 12:34 UTC | newest]

Thread overview: 18+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-05-01 20:33 [PATCH 0/5] thunderbolt: CL1 support for USB4 and Titan Ridge Gil Fine
2022-05-01 20:33 ` [PATCH 1/5] thunderbolt: Silently ignore CLx enabling in case CLx is not supported Gil Fine
2022-05-02  9:50   ` Mika Westerberg
2022-05-04 10:51     ` Gil Fine
2022-05-04 10:59       ` Mika Westerberg
2022-05-01 20:33 ` [PATCH 2/5] thunderbolt: CLx disable before system suspend only if previously enabled Gil Fine
2022-05-02  9:52   ` Mika Westerberg
2022-05-08  7:51     ` Gil Fine
2022-05-01 20:33 ` [PATCH 3/5] thunderbolt: Change downstream router's TMU rate in both TMU uni/bidir mode Gil Fine
2022-05-01 20:33 ` [PATCH 4/5] thunderbolt: Add CL1 support for USB4 and Titan Ridge routers Gil Fine
2022-05-02 10:04   ` Mika Westerberg
2022-05-04 10:52     ` Gil Fine
2022-05-04 11:03       ` Mika Westerberg
2022-05-01 20:33 ` [PATCH 5/5] thunderbolt: Change TMU mode to Hifi-Uni once DP tunneled Gil Fine
2022-05-01 23:20   ` kernel test robot
2022-05-02 10:09   ` Mika Westerberg
2022-05-08 12:44     ` Gil Fine
  -- strict thread matches above, loose matches on Subject: below --
2022-05-01 23:50 [PATCH 4/5] thunderbolt: Add CL1 support for USB4 and Titan Ridge routers kernel test robot

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