From: "Russell King (Oracle)" <linux@armlinux.org.uk>
To: "Marek Behún" <kabel@kernel.org>
Cc: "Andrew Lunn" <andrew@lunn.ch>,
"Heiner Kallweit" <hkallweit1@gmail.com>,
"Alexandre Belloni" <alexandre.belloni@bootlin.com>,
"Alvin Šipraga" <alsi@bang-olufsen.dk>,
"Claudiu Manoil" <claudiu.manoil@nxp.com>,
"David S. Miller" <davem@davemloft.net>,
"DENG Qingfang" <dqfext@gmail.com>,
"Eric Dumazet" <edumazet@google.com>,
"Florian Fainelli" <f.fainelli@gmail.com>,
"George McCollister" <george.mccollister@gmail.com>,
"Hauke Mehrtens" <hauke@hauke-m.de>,
"Jakub Kicinski" <kuba@kernel.org>,
"Kurt Kanzenbach" <kurt@linutronix.de>,
"Landen Chao" <Landen.Chao@mediatek.com>,
"Linus Walleij" <linus.walleij@linaro.org>,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org,
"Matthias Brugger" <matthias.bgg@gmail.com>,
netdev@vger.kernel.org, "Paolo Abeni" <pabeni@redhat.com>,
"Sean Wang" <sean.wang@mediatek.com>,
UNGLinuxDriver@microchip.com,
"Vivien Didelot" <vivien.didelot@gmail.com>,
"Vladimir Oltean" <olteanv@gmail.com>,
"Woojung Huh" <woojung.huh@microchip.com>
Subject: Re: [PATCH RFC net-next 0/4] net: dsa: always use phylink
Date: Wed, 29 Jun 2022 13:41:35 +0100 [thread overview]
Message-ID: <YrxIf1tfWQZCD1w8@shell.armlinux.org.uk> (raw)
In-Reply-To: <20220629121020.583144a5@thinkpad>
On Wed, Jun 29, 2022 at 12:10:20PM +0200, Marek Behún wrote:
> On Wed, 29 Jun 2022 10:43:23 +0100
> "Russell King (Oracle)" <linux@armlinux.org.uk> wrote:
>
> > On Wed, Jun 29, 2022 at 09:18:10AM +0200, Andrew Lunn wrote:
> > > > I should point out that if a DSA port can be programmed in software to
> > > > support both SGMII and 1000baseX, this will end up selecting SGMII
> > > > irrespective of what the hardware was wire-strapped to and how it was
> > > > initially configured. Do we believe that would be acceptable?
> > >
> > > I'm pretty sure the devel b board has 1000BaseX DSA links between its
> > > two switches. Since both should end up SGMII that should be O.K.
> >
> > Would such a port have a programmable C_Mode, and would it specify that
> > it supports both SGMII and 1000BaseX ? Without going through a lot of
> > boards and documentation for every switch, I can't say.
> >
> > I don't think we can come to any conclusion on what the right way to
> > deal with this actually is - we don't have enough information about how
> > this is used across all the platforms we have. I think we can only try
> > something, get it merged into net-next, and wait to see whether anyone
> > complains.
> >
> > When we have a CPU or DSA port without a fixed-link, phy or sfp specified,
> > I think we should:
> > (a) use the phy-mode property if present, otherwise,
> > (b,i) have the DSA driver return the interface mode that it wants to use
> > for max speed for CPU and DSA ports.
> > (b,ii) in the absence of the DSA driver returning a valid interface mode,
> > we use the supported_interfaces to find an interface which gives the
> > maximum speed (irrespective of duplex?) that falls within the
> > mac capabilities.
> >
> > If all those fail, then things will break, and we will have to wait for
> > people to report that breakage. Does this sound a sane approach, or
> > does anyone have any other suggestions how to solve this?
>
> It is a sane approach. But in the future I think we should get rid of
> (b,i): I always considered the max_speed_interface() method a temporary
> solution, until the drivers report what a specific port support and the
> subsystem can then choose whichever mode it wants that is wired and
> supported by hardware. Then we could also make it possible to change
> the CPU interface mode via ethtool, which would be cool...
I can remotely test clearfog, which seems to do the right thing:
[ 5.707839] mv88e6085 f1072004.mdio-mii:04: sif=21 if=21(1000base-x) cap=bd
[ 5.715114] mv88e6085 f1072004.mdio-mii:04: configuring for fixed/1000base-x link mode
meaning that the supported interfaces (sif) mask only contains
1000base-x, phylink_create() was called with (if) 1000base-x, and the
capabilities (cap) indicates 1000-fd, 100-(h,f)d, and 10-(h,f)d.
I don't think port 5 on the 88e6176 can support any other modes, so
this isn't a particularly good test. My ZII boards aren't powered up
so can't test those with the extra debugging print.
I'll cut a new RFC which includes the debug print so folk can try it
out.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
WARNING: multiple messages have this Message-ID (diff)
From: "Russell King (Oracle)" <linux@armlinux.org.uk>
To: "Marek Behún" <kabel@kernel.org>
Cc: "Andrew Lunn" <andrew@lunn.ch>,
"Heiner Kallweit" <hkallweit1@gmail.com>,
"Alexandre Belloni" <alexandre.belloni@bootlin.com>,
"Alvin Šipraga" <alsi@bang-olufsen.dk>,
"Claudiu Manoil" <claudiu.manoil@nxp.com>,
"David S. Miller" <davem@davemloft.net>,
"DENG Qingfang" <dqfext@gmail.com>,
"Eric Dumazet" <edumazet@google.com>,
"Florian Fainelli" <f.fainelli@gmail.com>,
"George McCollister" <george.mccollister@gmail.com>,
"Hauke Mehrtens" <hauke@hauke-m.de>,
"Jakub Kicinski" <kuba@kernel.org>,
"Kurt Kanzenbach" <kurt@linutronix.de>,
"Landen Chao" <Landen.Chao@mediatek.com>,
"Linus Walleij" <linus.walleij@linaro.org>,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org,
"Matthias Brugger" <matthias.bgg@gmail.com>,
netdev@vger.kernel.org, "Paolo Abeni" <pabeni@redhat.com>,
"Sean Wang" <sean.wang@mediatek.com>,
UNGLinuxDriver@microchip.com,
"Vivien Didelot" <vivien.didelot@gmail.com>,
"Vladimir Oltean" <olteanv@gmail.com>,
"Woojung Huh" <woojung.huh@microchip.com>
Subject: Re: [PATCH RFC net-next 0/4] net: dsa: always use phylink
Date: Wed, 29 Jun 2022 13:41:35 +0100 [thread overview]
Message-ID: <YrxIf1tfWQZCD1w8@shell.armlinux.org.uk> (raw)
In-Reply-To: <20220629121020.583144a5@thinkpad>
On Wed, Jun 29, 2022 at 12:10:20PM +0200, Marek Behún wrote:
> On Wed, 29 Jun 2022 10:43:23 +0100
> "Russell King (Oracle)" <linux@armlinux.org.uk> wrote:
>
> > On Wed, Jun 29, 2022 at 09:18:10AM +0200, Andrew Lunn wrote:
> > > > I should point out that if a DSA port can be programmed in software to
> > > > support both SGMII and 1000baseX, this will end up selecting SGMII
> > > > irrespective of what the hardware was wire-strapped to and how it was
> > > > initially configured. Do we believe that would be acceptable?
> > >
> > > I'm pretty sure the devel b board has 1000BaseX DSA links between its
> > > two switches. Since both should end up SGMII that should be O.K.
> >
> > Would such a port have a programmable C_Mode, and would it specify that
> > it supports both SGMII and 1000BaseX ? Without going through a lot of
> > boards and documentation for every switch, I can't say.
> >
> > I don't think we can come to any conclusion on what the right way to
> > deal with this actually is - we don't have enough information about how
> > this is used across all the platforms we have. I think we can only try
> > something, get it merged into net-next, and wait to see whether anyone
> > complains.
> >
> > When we have a CPU or DSA port without a fixed-link, phy or sfp specified,
> > I think we should:
> > (a) use the phy-mode property if present, otherwise,
> > (b,i) have the DSA driver return the interface mode that it wants to use
> > for max speed for CPU and DSA ports.
> > (b,ii) in the absence of the DSA driver returning a valid interface mode,
> > we use the supported_interfaces to find an interface which gives the
> > maximum speed (irrespective of duplex?) that falls within the
> > mac capabilities.
> >
> > If all those fail, then things will break, and we will have to wait for
> > people to report that breakage. Does this sound a sane approach, or
> > does anyone have any other suggestions how to solve this?
>
> It is a sane approach. But in the future I think we should get rid of
> (b,i): I always considered the max_speed_interface() method a temporary
> solution, until the drivers report what a specific port support and the
> subsystem can then choose whichever mode it wants that is wired and
> supported by hardware. Then we could also make it possible to change
> the CPU interface mode via ethtool, which would be cool...
I can remotely test clearfog, which seems to do the right thing:
[ 5.707839] mv88e6085 f1072004.mdio-mii:04: sif=21 if=21(1000base-x) cap=bd
[ 5.715114] mv88e6085 f1072004.mdio-mii:04: configuring for fixed/1000base-x link mode
meaning that the supported interfaces (sif) mask only contains
1000base-x, phylink_create() was called with (if) 1000base-x, and the
capabilities (cap) indicates 1000-fd, 100-(h,f)d, and 10-(h,f)d.
I don't think port 5 on the 88e6176 can support any other modes, so
this isn't a particularly good test. My ZII boards aren't powered up
so can't test those with the extra debugging print.
I'll cut a new RFC which includes the debug print so folk can try it
out.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-06-29 12:42 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-24 11:41 [PATCH RFC net-next 0/4] net: dsa: always use phylink Russell King (Oracle)
2022-06-24 11:41 ` Russell King (Oracle)
2022-06-24 11:41 ` [PATCH RFC net-next 1/4] net: dsa: add support for retrieving the interface mode Russell King (Oracle)
2022-06-24 11:41 ` Russell King (Oracle)
2022-06-24 11:41 ` [PATCH RFC net-next 2/4] net: dsa: mv88e6xxx: report the default interface mode for the port Russell King (Oracle)
2022-06-24 11:41 ` Russell King (Oracle)
2022-06-24 11:42 ` [PATCH RFC net-next 3/4] net: phylink: add phylink_set_max_fixed_link() Russell King (Oracle)
2022-06-24 11:42 ` Russell King (Oracle)
2022-06-25 2:58 ` kernel test robot
2022-06-24 11:42 ` [PATCH RFC net-next 4/4] net: dsa: always use phylink for CPU and DSA ports Russell King (Oracle)
2022-06-24 11:42 ` Russell King (Oracle)
2022-06-28 21:16 ` [PATCH RFC net-next 0/4] net: dsa: always use phylink Russell King (Oracle)
2022-06-28 21:16 ` Russell King (Oracle)
2022-06-29 7:18 ` Andrew Lunn
2022-06-29 7:18 ` Andrew Lunn
2022-06-29 9:27 ` Marek Behún
2022-06-29 9:27 ` Marek Behún
2022-06-29 9:34 ` Russell King (Oracle)
2022-06-29 9:34 ` Russell King (Oracle)
2022-06-29 9:42 ` Marek Behún
2022-06-29 9:42 ` Marek Behún
2022-06-29 9:43 ` Russell King (Oracle)
2022-06-29 9:43 ` Russell King (Oracle)
2022-06-29 10:10 ` Marek Behún
2022-06-29 10:10 ` Marek Behún
2022-06-29 12:41 ` Russell King (Oracle) [this message]
2022-06-29 12:41 ` Russell King (Oracle)
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