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From: Catalin Marinas <catalin.marinas@arm.com>
To: Conor Dooley <mail@conchuod.ie>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Palmer Dabbelt <palmer@rivosinc.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Sudeep Holla <sudeep.holla@arm.com>,
	Will Deacon <will@kernel.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	Daire McNamara <daire.mcnamara@microchip.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	Niklas Cassel <niklas.cassel@wdc.com>,
	Damien Le Moal <damien.lemoal@opensource.wdc.com>,
	Geert Uytterhoeven <geert@linux-m68k.org>,
	Zong Li <zong.li@sifive.com>,
	Emil Renner Berthing <kernel@esmil.dk>,
	Jonas Hahnfeld <hahnjo@hahnjo.de>, Guo Ren <guoren@kernel.org>,
	Anup Patel <anup@brainfault.org>,
	Atish Patra <atishp@atishpatra.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Philipp Tomsich <philipp.tomsich@vrull.eu>,
	Rob Herring <robh@kernel.org>, Marc Zyngier <maz@kernel.org>,
	Viresh Kumar <viresh.kumar@linaro.org>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Brice Goglin <Brice.Goglin@inria.fr>
Subject: Re: [PATCH v4 1/2] arm64: topology: move store_cpu_topology() to shared code
Date: Tue, 19 Jul 2022 12:41:02 +0100	[thread overview]
Message-ID: <YtaYTgFDpGSsG+H0@arm.com> (raw)
In-Reply-To: <20220715175155.3567243-2-mail@conchuod.ie>

On Fri, Jul 15, 2022 at 06:51:55PM +0100, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
> 
> arm64's method of defining a default cpu topology requires only minimal
> changes to apply to RISC-V also. The current arm64 implementation exits
> early in a uniprocessor configuration by reading MPIDR & claiming that
> uniprocessor can rely on the default values.
> 
> This is appears to be a hangover from prior to '3102bc0e6ac7 ("arm64:
> topology: Stop using MPIDR for topology information")', because the
> current code just assigns default values for multiprocessor systems.
> 
> With the MPIDR references removed, store_cpu_topolgy() can be moved to
> the common arch_topology code.
> 
> CC: stable@vger.kernel.org

I'd quantify how far back you want this to go. IIUC based on the Fixes
tag in the other patch, it should stop at 5.4. If you send a pull
request instead and have a fixed commit id, you could add it as a
prerequisite on the following patch without a cc stable here.

Either way:

Acked-by: Catalin Marinas <catalin.marinas@arm.com>

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Catalin Marinas <catalin.marinas@arm.com>
To: Conor Dooley <mail@conchuod.ie>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Palmer Dabbelt <palmer@rivosinc.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Sudeep Holla <sudeep.holla@arm.com>,
	Will Deacon <will@kernel.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	Daire McNamara <daire.mcnamara@microchip.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	Niklas Cassel <niklas.cassel@wdc.com>,
	Damien Le Moal <damien.lemoal@opensource.wdc.com>,
	Geert Uytterhoeven <geert@linux-m68k.org>,
	Zong Li <zong.li@sifive.com>,
	Emil Renner Berthing <kernel@esmil.dk>,
	Jonas Hahnfeld <hahnjo@hahnjo.de>, Guo Ren <guoren@kernel.org>,
	Anup Patel <anup@brainfault.org>,
	Atish Patra <atishp@atishpatra.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Philipp Tomsich <philipp.tomsich@vrull.eu>,
	Rob Herring <robh@kernel.org>, Marc Zyngier <maz@kernel.org>,
	Viresh Kumar <viresh.kumar@linaro.org>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Brice Goglin <Brice.Goglin@inria.fr>
Subject: Re: [PATCH v4 1/2] arm64: topology: move store_cpu_topology() to shared code
Date: Tue, 19 Jul 2022 12:41:02 +0100	[thread overview]
Message-ID: <YtaYTgFDpGSsG+H0@arm.com> (raw)
In-Reply-To: <20220715175155.3567243-2-mail@conchuod.ie>

On Fri, Jul 15, 2022 at 06:51:55PM +0100, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
> 
> arm64's method of defining a default cpu topology requires only minimal
> changes to apply to RISC-V also. The current arm64 implementation exits
> early in a uniprocessor configuration by reading MPIDR & claiming that
> uniprocessor can rely on the default values.
> 
> This is appears to be a hangover from prior to '3102bc0e6ac7 ("arm64:
> topology: Stop using MPIDR for topology information")', because the
> current code just assigns default values for multiprocessor systems.
> 
> With the MPIDR references removed, store_cpu_topolgy() can be moved to
> the common arch_topology code.
> 
> CC: stable@vger.kernel.org

I'd quantify how far back you want this to go. IIUC based on the Fixes
tag in the other patch, it should stop at 5.4. If you send a pull
request instead and have a fixed commit id, you could add it as a
prerequisite on the following patch without a cc stable here.

Either way:

Acked-by: Catalin Marinas <catalin.marinas@arm.com>

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Catalin Marinas <catalin.marinas@arm.com>
To: Conor Dooley <mail@conchuod.ie>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Palmer Dabbelt <palmer@rivosinc.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Sudeep Holla <sudeep.holla@arm.com>,
	Will Deacon <will@kernel.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	Daire McNamara <daire.mcnamara@microchip.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	Niklas Cassel <niklas.cassel@wdc.com>,
	Damien Le Moal <damien.lemoal@opensource.wdc.com>,
	Geert Uytterhoeven <geert@linux-m68k.org>,
	Zong Li <zong.li@sifive.com>,
	Emil Renner Berthing <kernel@esmil.dk>,
	Jonas Hahnfeld <hahnjo@hahnjo.de>, Guo Ren <guoren@kernel.org>,
	Anup Patel <anup@brainfault.org>,
	Atish Patra <atishp@atishpatra.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Philipp Tomsich <philipp.tomsich@vrull.eu>,
	Rob Herring <robh@kernel.org>, Marc Zyngier <maz@kernel.org>,
	Viresh Kumar <viresh.kumar@linaro.org>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Brice Goglin <Brice.Goglin@inria.fr>
Subject: Re: [PATCH v4 1/2] arm64: topology: move store_cpu_topology() to shared code
Date: Tue, 19 Jul 2022 12:41:02 +0100	[thread overview]
Message-ID: <YtaYTgFDpGSsG+H0@arm.com> (raw)
In-Reply-To: <20220715175155.3567243-2-mail@conchuod.ie>

On Fri, Jul 15, 2022 at 06:51:55PM +0100, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
> 
> arm64's method of defining a default cpu topology requires only minimal
> changes to apply to RISC-V also. The current arm64 implementation exits
> early in a uniprocessor configuration by reading MPIDR & claiming that
> uniprocessor can rely on the default values.
> 
> This is appears to be a hangover from prior to '3102bc0e6ac7 ("arm64:
> topology: Stop using MPIDR for topology information")', because the
> current code just assigns default values for multiprocessor systems.
> 
> With the MPIDR references removed, store_cpu_topolgy() can be moved to
> the common arch_topology code.
> 
> CC: stable@vger.kernel.org

I'd quantify how far back you want this to go. IIUC based on the Fixes
tag in the other patch, it should stop at 5.4. If you send a pull
request instead and have a fixed commit id, you could add it as a
prerequisite on the following patch without a cc stable here.

Either way:

Acked-by: Catalin Marinas <catalin.marinas@arm.com>

  reply	other threads:[~2022-07-19 11:41 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-15 17:51 [PATCH v4 0/2] Fix RISC-V's arch-topology reporting Conor Dooley
2022-07-15 17:51 ` Conor Dooley
2022-07-15 17:51 ` Conor Dooley
2022-07-15 17:51 ` [PATCH v4 1/2] arm64: topology: move store_cpu_topology() to shared code Conor Dooley
2022-07-15 17:51   ` Conor Dooley
2022-07-15 17:51   ` Conor Dooley
2022-07-19 11:41   ` Catalin Marinas [this message]
2022-07-19 11:41     ` Catalin Marinas
2022-07-19 11:41     ` Catalin Marinas
2022-07-19 11:51     ` Conor.Dooley
2022-07-19 11:51       ` Conor.Dooley
2022-07-19 11:51       ` Conor.Dooley
2022-07-19 12:00       ` Catalin Marinas
2022-07-19 12:00         ` Catalin Marinas
2022-07-19 12:00         ` Catalin Marinas
2022-07-26  8:10   ` Atish Patra
2022-07-26  8:10     ` Atish Patra
2022-07-26  8:10     ` Atish Patra
2022-07-15 17:51 ` [PATCH v4 2/2] riscv: topology: fix default topology reporting Conor Dooley
2022-07-15 17:51   ` Conor Dooley
2022-07-15 17:51   ` Conor Dooley
2022-07-26  8:24   ` Atish Patra
2022-07-26  8:24     ` Atish Patra
2022-07-26  8:24     ` Atish Patra
2022-07-16 13:35 ` [PATCH v4 0/2] Fix RISC-V's arch-topology reporting Conor.Dooley
2022-07-16 13:35   ` Conor.Dooley
2022-07-16 13:35   ` Conor.Dooley
2022-07-23 11:22 ` Conor.Dooley
2022-07-23 11:22   ` Conor.Dooley
2022-07-23 11:22   ` Conor.Dooley
2022-07-25  9:13   ` Will Deacon
2022-07-25  9:13     ` Will Deacon
2022-07-25  9:13     ` Will Deacon
2022-07-25  9:20     ` Conor.Dooley
2022-07-25  9:20       ` Conor.Dooley
2022-07-25  9:20       ` Conor.Dooley
2022-07-26  8:12       ` Atish Patra
2022-07-26  8:12         ` Atish Patra
2022-07-26  8:12         ` Atish Patra
2022-07-26  9:14         ` Conor.Dooley
2022-07-26  9:14           ` Conor.Dooley
2022-07-26  9:14           ` Conor.Dooley

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