From: Conor Dooley <conor.dooley@microchip.com>
To: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>
Cc: Thierry Reding <thierry.reding@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Daire McNamara <daire.mcnamara@microchip.com>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-pwm@vger.kernel.org>, <linux-riscv@lists.infradead.org>
Subject: Re: [PATCH v10 3/4] pwm: add microchip soft ip corePWM driver
Date: Fri, 30 Sep 2022 08:11:58 +0100 [thread overview]
Message-ID: <YzaWvrkWEvZdlwK6@wendy> (raw)
In-Reply-To: <Yyh8v+MtHuc0LLf0@wendy>
On Mon, Sep 19, 2022 at 03:29:19PM +0100, Conor Dooley wrote:
> Hey Uwe,
>
> On Mon, Sep 19, 2022 at 03:50:08PM +0200, Uwe Kleine-König wrote:
> > On Mon, Sep 19, 2022 at 01:53:56PM +0100, Conor Dooley wrote:
> > > Hey Uwe,
> > > Thanks (as always). I've switched up my email setup a bit so I hope
> > > that I've not mangled anything here.
> > >
> > > On Thu, Sep 15, 2022 at 09:21:52AM +0200, Uwe Kleine-König wrote:
> > > > Hello,
> > > >
> > > > On Wed, Aug 24, 2022 at 10:12:14AM +0100, Conor Dooley wrote:
> > > > > Add a driver that supports the Microchip FPGA "soft" PWM IP core.
> > > > >
> > > > > Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> > > > > ---
> > > > $ ./test 255 65535
> > > > period_steps = 255
> > > > prescale = 65535
> > > > period = 18446744073018591744
> > > >
> > > > The problem is that the result of 16711425 * 1000000000L isn't affected
> > > > by the type of period and so it's promoted to L which isn't big enough
> > > > to hold 16711425000000000 where longs are only 32 bit wide.
> > >
> > > I don't think this is ever going to be hit in the wild, since prescale
> > > comes from the hardware where it is limited to 255 - but preventing the
> > > issue seems trivially done by splitting the multiplication so no reason
> > > not to. Thanks for providing the test program btw :)
> >
> > Even 255 * 255 * 1000000000 overflows. With a maintainer's hat on, it is
> > very valuable to prevent such issues because your driver might be used
> > as a template for the next driver.
> >
> > > > > + state->period = DIV64_U64_ROUND_UP(state->period, clk_get_rate(mchp_core_pwm->clk));
> > > > > +
> > > > > + posedge = readb_relaxed(mchp_core_pwm->base + MCHPCOREPWM_POSEDGE(pwm->hwpwm));
> > > > > + negedge = readb_relaxed(mchp_core_pwm->base + MCHPCOREPWM_NEGEDGE(pwm->hwpwm));
> > > > > +
> > > > > + if ((negedge == posedge) && state->enabled) {
> > > >
> > > > Why do you need that state->enabled?
> > >
> > > Because I was running into conflicts between the reporting here and some
> > > of the checks that I have added to prevent the PWM being put into an
> > > invalid state. On boot both negedge and posedge will be zero & this was
> > > preventing me from setting the period at all.
> >
> > I don't understood that.
>
> On startup, (negedge == posedge) is true as both are zero, but the reset
> values for prescale and period are actually 0x8. If on reset I try to
> set a small period, say "echo 1000 > period" apply() returns -EINVAL
> because of a check in the pwm core in pwm_apply_state() as I am
> attempting to set the period to lower than the out-of-reset duty cycle.
>
> I considered zeroing the registers, but if something below Linux had
> been using the PWM I felt that may not be the right thing to do. Can I
> continue to check for the enablement here or would you rather I did
> something different?
Hey Uwe,
Just bumping here ICYMI. Should I leave the behaviour as-was and just
document what the default values out of reset may be? That would leave
the check here making more sense & head off confusion about why apply()
fails?
Thanks,
Conor.
WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor.dooley@microchip.com>
To: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>
Cc: Thierry Reding <thierry.reding@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Daire McNamara <daire.mcnamara@microchip.com>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-pwm@vger.kernel.org>, <linux-riscv@lists.infradead.org>
Subject: Re: [PATCH v10 3/4] pwm: add microchip soft ip corePWM driver
Date: Fri, 30 Sep 2022 08:11:58 +0100 [thread overview]
Message-ID: <YzaWvrkWEvZdlwK6@wendy> (raw)
In-Reply-To: <Yyh8v+MtHuc0LLf0@wendy>
On Mon, Sep 19, 2022 at 03:29:19PM +0100, Conor Dooley wrote:
> Hey Uwe,
>
> On Mon, Sep 19, 2022 at 03:50:08PM +0200, Uwe Kleine-König wrote:
> > On Mon, Sep 19, 2022 at 01:53:56PM +0100, Conor Dooley wrote:
> > > Hey Uwe,
> > > Thanks (as always). I've switched up my email setup a bit so I hope
> > > that I've not mangled anything here.
> > >
> > > On Thu, Sep 15, 2022 at 09:21:52AM +0200, Uwe Kleine-König wrote:
> > > > Hello,
> > > >
> > > > On Wed, Aug 24, 2022 at 10:12:14AM +0100, Conor Dooley wrote:
> > > > > Add a driver that supports the Microchip FPGA "soft" PWM IP core.
> > > > >
> > > > > Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> > > > > ---
> > > > $ ./test 255 65535
> > > > period_steps = 255
> > > > prescale = 65535
> > > > period = 18446744073018591744
> > > >
> > > > The problem is that the result of 16711425 * 1000000000L isn't affected
> > > > by the type of period and so it's promoted to L which isn't big enough
> > > > to hold 16711425000000000 where longs are only 32 bit wide.
> > >
> > > I don't think this is ever going to be hit in the wild, since prescale
> > > comes from the hardware where it is limited to 255 - but preventing the
> > > issue seems trivially done by splitting the multiplication so no reason
> > > not to. Thanks for providing the test program btw :)
> >
> > Even 255 * 255 * 1000000000 overflows. With a maintainer's hat on, it is
> > very valuable to prevent such issues because your driver might be used
> > as a template for the next driver.
> >
> > > > > + state->period = DIV64_U64_ROUND_UP(state->period, clk_get_rate(mchp_core_pwm->clk));
> > > > > +
> > > > > + posedge = readb_relaxed(mchp_core_pwm->base + MCHPCOREPWM_POSEDGE(pwm->hwpwm));
> > > > > + negedge = readb_relaxed(mchp_core_pwm->base + MCHPCOREPWM_NEGEDGE(pwm->hwpwm));
> > > > > +
> > > > > + if ((negedge == posedge) && state->enabled) {
> > > >
> > > > Why do you need that state->enabled?
> > >
> > > Because I was running into conflicts between the reporting here and some
> > > of the checks that I have added to prevent the PWM being put into an
> > > invalid state. On boot both negedge and posedge will be zero & this was
> > > preventing me from setting the period at all.
> >
> > I don't understood that.
>
> On startup, (negedge == posedge) is true as both are zero, but the reset
> values for prescale and period are actually 0x8. If on reset I try to
> set a small period, say "echo 1000 > period" apply() returns -EINVAL
> because of a check in the pwm core in pwm_apply_state() as I am
> attempting to set the period to lower than the out-of-reset duty cycle.
>
> I considered zeroing the registers, but if something below Linux had
> been using the PWM I felt that may not be the right thing to do. Can I
> continue to check for the enablement here or would you rather I did
> something different?
Hey Uwe,
Just bumping here ICYMI. Should I leave the behaviour as-was and just
document what the default values out of reset may be? That would leave
the check here making more sense & head off confusion about why apply()
fails?
Thanks,
Conor.
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next prev parent reply other threads:[~2022-09-30 7:12 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-24 9:12 [PATCH v10 0/4] Microchip soft ip corePWM driver Conor Dooley
2022-08-24 9:12 ` Conor Dooley
2022-08-24 9:12 ` [PATCH v10 1/4] dt-bindings: pwm: fix microchip corePWM's pwm-cells Conor Dooley
2022-08-24 9:12 ` Conor Dooley
2022-08-24 9:12 ` [PATCH v10 2/4] riscv: dts: fix the icicle's #pwm-cells Conor Dooley
2022-08-24 9:12 ` Conor Dooley
2022-09-14 19:59 ` Uwe Kleine-König
2022-09-14 19:59 ` Uwe Kleine-König
2022-09-15 7:03 ` Conor.Dooley
2022-09-15 7:03 ` Conor.Dooley
2022-08-24 9:12 ` [PATCH v10 3/4] pwm: add microchip soft ip corePWM driver Conor Dooley
2022-08-24 9:12 ` Conor Dooley
2022-09-15 7:21 ` Uwe Kleine-König
2022-09-15 7:21 ` Uwe Kleine-König
2022-09-19 12:53 ` Conor Dooley
2022-09-19 12:53 ` Conor Dooley
2022-09-19 13:50 ` Uwe Kleine-König
2022-09-19 13:50 ` Uwe Kleine-König
2022-09-19 14:29 ` Conor Dooley
2022-09-19 14:29 ` Conor Dooley
2022-09-30 7:11 ` Conor Dooley [this message]
2022-09-30 7:11 ` Conor Dooley
2022-09-30 9:13 ` Uwe Kleine-König
2022-09-30 9:13 ` Uwe Kleine-König
2022-09-30 9:45 ` Conor Dooley
2022-09-30 9:45 ` Conor Dooley
2022-09-30 13:39 ` Uwe Kleine-König
2022-09-30 13:39 ` Uwe Kleine-König
2022-09-30 13:49 ` Conor Dooley
2022-09-30 13:49 ` Conor Dooley
2022-09-30 14:06 ` Uwe Kleine-König
2022-09-30 14:06 ` Uwe Kleine-König
2022-08-24 9:12 ` [PATCH v10 4/4] MAINTAINERS: add pwm to PolarFire SoC entry Conor Dooley
2022-08-24 9:12 ` Conor Dooley
2022-09-14 20:01 ` Uwe Kleine-König
2022-09-14 20:01 ` Uwe Kleine-König
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