* [PATCH 0/2] Disable RPG during live selftest
@ 2025-01-10 14:09 Badal Nilawar
2025-01-10 14:09 ` [PATCH 1/2] drm/i915/mtl: Disable render power-gating during selftest only Badal Nilawar
` (4 more replies)
0 siblings, 5 replies; 9+ messages in thread
From: Badal Nilawar @ 2025-01-10 14:09 UTC (permalink / raw)
To: intel-gfx; +Cc: anshuman.gupta, rodrigo.vivi, andrzej.hajda, andi.shyti
Disable RPG during live selftest
Badal Nilawar (2):
drm/i915/mtl: Disable render power-gating during selftest only
drm/i915: Disable rpg for Gen 12 and above
drivers/gpu/drm/i915/gt/intel_rc6.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--
2.34.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 1/2] drm/i915/mtl: Disable render power-gating during selftest only
2025-01-10 14:09 [PATCH 0/2] Disable RPG during live selftest Badal Nilawar
@ 2025-01-10 14:09 ` Badal Nilawar
2025-01-10 17:27 ` kernel test robot
` (2 more replies)
2025-01-10 14:09 ` [PATCH 2/2] drm/i915: Disable rpg for Gen 12 and above Badal Nilawar
` (3 subsequent siblings)
4 siblings, 3 replies; 9+ messages in thread
From: Badal Nilawar @ 2025-01-10 14:09 UTC (permalink / raw)
To: intel-gfx; +Cc: anshuman.gupta, rodrigo.vivi, andrzej.hajda, andi.shyti
The temporary wa ‘drm/i915/mtl: do not enable render power-gating on MTL’ disables RPG
globally. Since the issue seen during live self-tests disabling it during these tests.
Fixes: 25e7976db86b ("drm/i915/mtl: do not enable render power-gating on MTL")
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Andi Shyti <andi.shyti@intel.com>
Cc: Andrzej Hajda <andrzej.hajda@intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
---
drivers/gpu/drm/i915/gt/intel_rc6.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c b/drivers/gpu/drm/i915/gt/intel_rc6.c
index 9378d5901c49..2dd68ca7ec0e 100644
--- a/drivers/gpu/drm/i915/gt/intel_rc6.c
+++ b/drivers/gpu/drm/i915/gt/intel_rc6.c
@@ -123,7 +123,7 @@ static void gen11_rc6_enable(struct intel_rc6 *rc6)
* temporary wa and should be removed after fixing real cause
* of forcewake timeouts.
*/
- if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74)))
+ if (i915_selftest.live && IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74)))
pg_enable =
GEN9_MEDIA_PG_ENABLE |
GEN11_MEDIA_SAMPLER_PG_ENABLE;
--
2.34.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 2/2] drm/i915: Disable rpg for Gen 12 and above
2025-01-10 14:09 [PATCH 0/2] Disable RPG during live selftest Badal Nilawar
2025-01-10 14:09 ` [PATCH 1/2] drm/i915/mtl: Disable render power-gating during selftest only Badal Nilawar
@ 2025-01-10 14:09 ` Badal Nilawar
2025-01-10 14:19 ` ✗ Fi.CI.CHECKPATCH: warning for Disable RPG during live selftest Patchwork
` (2 subsequent siblings)
4 siblings, 0 replies; 9+ messages in thread
From: Badal Nilawar @ 2025-01-10 14:09 UTC (permalink / raw)
To: intel-gfx; +Cc: anshuman.gupta, rodrigo.vivi, andrzej.hajda, andi.shyti
As the Forcewake timeout issue observed on gen 12.0 as well, therefore disable RPG
during live self-tests for Gen 12 and above.
Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9413
Fixes: 25e7976db86b ("drm/i915/mtl: do not enable render power-gating on MTL")
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Andi Shyti <andi.shyti@intel.com>
Cc: Andrzej Hajda <andrzej.hajda@intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
---
drivers/gpu/drm/i915/gt/intel_rc6.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c b/drivers/gpu/drm/i915/gt/intel_rc6.c
index 2dd68ca7ec0e..82de77eb4de8 100644
--- a/drivers/gpu/drm/i915/gt/intel_rc6.c
+++ b/drivers/gpu/drm/i915/gt/intel_rc6.c
@@ -123,7 +123,7 @@ static void gen11_rc6_enable(struct intel_rc6 *rc6)
* temporary wa and should be removed after fixing real cause
* of forcewake timeouts.
*/
- if (i915_selftest.live && IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74)))
+ if (i915_selftest.live && IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 0), IP_VER(12, 74)))
pg_enable =
GEN9_MEDIA_PG_ENABLE |
GEN11_MEDIA_SAMPLER_PG_ENABLE;
--
2.34.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for Disable RPG during live selftest
2025-01-10 14:09 [PATCH 0/2] Disable RPG during live selftest Badal Nilawar
2025-01-10 14:09 ` [PATCH 1/2] drm/i915/mtl: Disable render power-gating during selftest only Badal Nilawar
2025-01-10 14:09 ` [PATCH 2/2] drm/i915: Disable rpg for Gen 12 and above Badal Nilawar
@ 2025-01-10 14:19 ` Patchwork
2025-01-10 14:19 ` ✗ Fi.CI.SPARSE: " Patchwork
2025-01-10 14:49 ` ✗ i915.CI.BAT: failure " Patchwork
4 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2025-01-10 14:19 UTC (permalink / raw)
To: Badal Nilawar; +Cc: intel-gfx
== Series Details ==
Series: Disable RPG during live selftest
URL : https://patchwork.freedesktop.org/series/143391/
State : warning
== Summary ==
Error: dim checkpatch failed
05195c72724d drm/i915/mtl: Disable render power-gating during selftest only
-:10: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#10:
The temporary wa ‘drm/i915/mtl: do not enable render power-gating on MTL’ disables RPG
total: 0 errors, 1 warnings, 0 checks, 8 lines checked
9b980d5a4c06 drm/i915: Disable rpg for Gen 12 and above
-:6: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#6:
As the Forcewake timeout issue observed on gen 12.0 as well, therefore disable RPG
total: 0 errors, 1 warnings, 0 checks, 8 lines checked
^ permalink raw reply [flat|nested] 9+ messages in thread
* ✗ Fi.CI.SPARSE: warning for Disable RPG during live selftest
2025-01-10 14:09 [PATCH 0/2] Disable RPG during live selftest Badal Nilawar
` (2 preceding siblings ...)
2025-01-10 14:19 ` ✗ Fi.CI.CHECKPATCH: warning for Disable RPG during live selftest Patchwork
@ 2025-01-10 14:19 ` Patchwork
2025-01-10 14:49 ` ✗ i915.CI.BAT: failure " Patchwork
4 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2025-01-10 14:19 UTC (permalink / raw)
To: Badal Nilawar; +Cc: intel-gfx
== Series Details ==
Series: Disable RPG during live selftest
URL : https://patchwork.freedesktop.org/series/143391/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 9+ messages in thread
* ✗ i915.CI.BAT: failure for Disable RPG during live selftest
2025-01-10 14:09 [PATCH 0/2] Disable RPG during live selftest Badal Nilawar
` (3 preceding siblings ...)
2025-01-10 14:19 ` ✗ Fi.CI.SPARSE: " Patchwork
@ 2025-01-10 14:49 ` Patchwork
4 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2025-01-10 14:49 UTC (permalink / raw)
To: Badal Nilawar; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 6267 bytes --]
== Series Details ==
Series: Disable RPG during live selftest
URL : https://patchwork.freedesktop.org/series/143391/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15942 -> Patchwork_143391v1
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_143391v1 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_143391v1, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143391v1/index.html
Participating hosts (38 -> 37)
------------------------------
Missing (1): fi-snb-2520m
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_143391v1:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live@workarounds:
- bat-dg2-11: [PASS][1] -> [DMESG-FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15942/bat-dg2-11/igt@i915_selftest@live@workarounds.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143391v1/bat-dg2-11/igt@i915_selftest@live@workarounds.html
* igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-a-dp-1:
- fi-cfl-8109u: [PASS][3] -> [DMESG-WARN][4] +3 other tests dmesg-warn
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15942/fi-cfl-8109u/igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-a-dp-1.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143391v1/fi-cfl-8109u/igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-a-dp-1.html
Known issues
------------
Here are the changes found in Patchwork_143391v1 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_module_load@load:
- fi-pnv-d510: [PASS][5] -> [ABORT][6] ([i915#13203])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15942/fi-pnv-d510/igt@i915_module_load@load.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143391v1/fi-pnv-d510/igt@i915_module_load@load.html
* igt@i915_selftest@live:
- bat-adlp-11: [PASS][7] -> [ABORT][8] ([i915#13399]) +1 other test abort
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15942/bat-adlp-11/igt@i915_selftest@live.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143391v1/bat-adlp-11/igt@i915_selftest@live.html
- bat-dg2-11: [PASS][9] -> [DMESG-FAIL][10] ([i915#12435])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15942/bat-dg2-11/igt@i915_selftest@live.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143391v1/bat-dg2-11/igt@i915_selftest@live.html
* igt@i915_selftest@live@gt_mocs:
- bat-twl-2: [PASS][11] -> [ABORT][12] ([i915#12919]) +1 other test abort
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15942/bat-twl-2/igt@i915_selftest@live@gt_mocs.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143391v1/bat-twl-2/igt@i915_selftest@live@gt_mocs.html
* igt@i915_selftest@live@workarounds:
- bat-arls-5: [PASS][13] -> [DMESG-FAIL][14] ([i915#13393]) +1 other test dmesg-fail
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15942/bat-arls-5/igt@i915_selftest@live@workarounds.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143391v1/bat-arls-5/igt@i915_selftest@live@workarounds.html
- bat-arlh-2: [PASS][15] -> [DMESG-FAIL][16] ([i915#13393])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15942/bat-arlh-2/igt@i915_selftest@live@workarounds.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143391v1/bat-arlh-2/igt@i915_selftest@live@workarounds.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-dg2-11: [PASS][17] -> [SKIP][18] ([i915#9197]) +3 other tests skip
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15942/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143391v1/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html
#### Possible fixes ####
* igt@i915_selftest@live@execlists:
- bat-arlh-2: [INCOMPLETE][19] ([i915#13050]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15942/bat-arlh-2/igt@i915_selftest@live@execlists.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143391v1/bat-arlh-2/igt@i915_selftest@live@execlists.html
#### Warnings ####
* igt@i915_selftest@live:
- bat-arlh-2: [INCOMPLETE][21] ([i915#13050]) -> [DMESG-FAIL][22] ([i915#12435] / [i915#13393])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15942/bat-arlh-2/igt@i915_selftest@live.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143391v1/bat-arlh-2/igt@i915_selftest@live.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#12435]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12435
[i915#12919]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12919
[i915#13050]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13050
[i915#13203]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13203
[i915#13393]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13393
[i915#13399]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13399
[i915#9197]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9197
Build changes
-------------
* Linux: CI_DRM_15942 -> Patchwork_143391v1
CI-20190529: 20190529
CI_DRM_15942: 00f4619246294b1de4bac42742cfef95c1f37fde @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8186: 2c6b2f0ed4075aa1ac3d341d612e41343cff4e4d @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_143391v1: 00f4619246294b1de4bac42742cfef95c1f37fde @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143391v1/index.html
[-- Attachment #2: Type: text/html, Size: 7402 bytes --]
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] drm/i915/mtl: Disable render power-gating during selftest only
2025-01-10 14:09 ` [PATCH 1/2] drm/i915/mtl: Disable render power-gating during selftest only Badal Nilawar
@ 2025-01-10 17:27 ` kernel test robot
2025-01-10 21:07 ` Rodrigo Vivi
2025-01-11 10:55 ` kernel test robot
2 siblings, 0 replies; 9+ messages in thread
From: kernel test robot @ 2025-01-10 17:27 UTC (permalink / raw)
To: Badal Nilawar, intel-gfx
Cc: oe-kbuild-all, anshuman.gupta, rodrigo.vivi, andrzej.hajda,
andi.shyti
Hi Badal,
kernel test robot noticed the following build errors:
[auto build test ERROR on linus/master]
[also build test ERROR on drm-intel/for-linux-next drm-intel/for-linux-next-fixes drm-tip/drm-tip v6.13-rc6 next-20250110]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Badal-Nilawar/drm-i915-mtl-Disable-render-power-gating-during-selftest-only/20250110-214933
base: linus/master
patch link: https://lore.kernel.org/r/20250110140947.3471824-2-badal.nilawar%40intel.com
patch subject: [PATCH 1/2] drm/i915/mtl: Disable render power-gating during selftest only
config: x86_64-buildonly-randconfig-004-20250110 (https://download.01.org/0day-ci/archive/20250111/202501110110.QpyfeXt4-lkp@intel.com/config)
compiler: gcc-12 (Debian 12.2.0-14) 12.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250111/202501110110.QpyfeXt4-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202501110110.QpyfeXt4-lkp@intel.com/
All errors (new ones prefixed by >>):
drivers/gpu/drm/i915/gt/intel_rc6.c: In function 'gen11_rc6_enable':
>> drivers/gpu/drm/i915/gt/intel_rc6.c:126:13: error: 'i915_selftest' undeclared (first use in this function)
126 | if (i915_selftest.live && IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74)))
| ^~~~~~~~~~~~~
drivers/gpu/drm/i915/gt/intel_rc6.c:126:13: note: each undeclared identifier is reported only once for each function it appears in
vim +/i915_selftest +126 drivers/gpu/drm/i915/gt/intel_rc6.c
55
56 static void gen11_rc6_enable(struct intel_rc6 *rc6)
57 {
58 struct intel_gt *gt = rc6_to_gt(rc6);
59 struct intel_uncore *uncore = gt->uncore;
60 struct intel_engine_cs *engine;
61 enum intel_engine_id id;
62 u32 pg_enable;
63 int i;
64
65 /*
66 * With GuCRC, these parameters are set by GuC
67 */
68 if (!intel_uc_uses_guc_rc(>->uc)) {
69 /* 2b: Program RC6 thresholds.*/
70 intel_uncore_write_fw(uncore, GEN6_RC6_WAKE_RATE_LIMIT, 54 << 16 | 85);
71 intel_uncore_write_fw(uncore, GEN10_MEDIA_WAKE_RATE_LIMIT, 150);
72
73 intel_uncore_write_fw(uncore, GEN6_RC_EVALUATION_INTERVAL, 125000); /* 12500 * 1280ns */
74 intel_uncore_write_fw(uncore, GEN6_RC_IDLE_HYSTERSIS, 25); /* 25 * 1280ns */
75 for_each_engine(engine, rc6_to_gt(rc6), id)
76 intel_uncore_write_fw(uncore, RING_MAX_IDLE(engine->mmio_base), 10);
77
78 intel_uncore_write_fw(uncore, GUC_MAX_IDLE_COUNT, 0xA);
79
80 intel_uncore_write_fw(uncore, GEN6_RC_SLEEP, 0);
81
82 intel_uncore_write_fw(uncore, GEN6_RC6_THRESHOLD, 50000); /* 50/125ms per EI */
83 }
84
85 /*
86 * 2c: Program Coarse Power Gating Policies.
87 *
88 * Bspec's guidance is to use 25us (really 25 * 1280ns) here. What we
89 * use instead is a more conservative estimate for the maximum time
90 * it takes us to service a CS interrupt and submit a new ELSP - that
91 * is the time which the GPU is idle waiting for the CPU to select the
92 * next request to execute. If the idle hysteresis is less than that
93 * interrupt service latency, the hardware will automatically gate
94 * the power well and we will then incur the wake up cost on top of
95 * the service latency. A similar guide from plane_state is that we
96 * do not want the enable hysteresis to less than the wakeup latency.
97 *
98 * igt/gem_exec_nop/sequential provides a rough estimate for the
99 * service latency, and puts it under 10us for Icelake, similar to
100 * Broadwell+, To be conservative, we want to factor in a context
101 * switch on top (due to ksoftirqd).
102 */
103 intel_uncore_write_fw(uncore, GEN9_MEDIA_PG_IDLE_HYSTERESIS, 60);
104 intel_uncore_write_fw(uncore, GEN9_RENDER_PG_IDLE_HYSTERESIS, 60);
105
106 /* 3a: Enable RC6
107 *
108 * With GuCRC, we do not enable bit 31 of RC_CTL,
109 * thus allowing GuC to control RC6 entry/exit fully instead.
110 * We will not set the HW ENABLE and EI bits
111 */
112 if (!intel_guc_rc_enable(gt_to_guc(gt)))
113 rc6->ctl_enable = GEN6_RC_CTL_RC6_ENABLE;
114 else
115 rc6->ctl_enable =
116 GEN6_RC_CTL_HW_ENABLE |
117 GEN6_RC_CTL_RC6_ENABLE |
118 GEN6_RC_CTL_EI_MODE(1);
119
120 /*
121 * BSpec 52698 - Render powergating must be off.
122 * FIXME BSpec is outdated, disabling powergating for MTL is just
123 * temporary wa and should be removed after fixing real cause
124 * of forcewake timeouts.
125 */
> 126 if (i915_selftest.live && IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74)))
127 pg_enable =
128 GEN9_MEDIA_PG_ENABLE |
129 GEN11_MEDIA_SAMPLER_PG_ENABLE;
130 else
131 pg_enable =
132 GEN9_RENDER_PG_ENABLE |
133 GEN9_MEDIA_PG_ENABLE |
134 GEN11_MEDIA_SAMPLER_PG_ENABLE;
135
136 if (GRAPHICS_VER(gt->i915) >= 12 && !IS_DG1(gt->i915)) {
137 for (i = 0; i < I915_MAX_VCS; i++)
138 if (HAS_ENGINE(gt, _VCS(i)))
139 pg_enable |= (VDN_HCP_POWERGATE_ENABLE(i) |
140 VDN_MFX_POWERGATE_ENABLE(i));
141 }
142
143 intel_uncore_write_fw(uncore, GEN9_PG_ENABLE, pg_enable);
144 }
145
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] drm/i915/mtl: Disable render power-gating during selftest only
2025-01-10 14:09 ` [PATCH 1/2] drm/i915/mtl: Disable render power-gating during selftest only Badal Nilawar
2025-01-10 17:27 ` kernel test robot
@ 2025-01-10 21:07 ` Rodrigo Vivi
2025-01-11 10:55 ` kernel test robot
2 siblings, 0 replies; 9+ messages in thread
From: Rodrigo Vivi @ 2025-01-10 21:07 UTC (permalink / raw)
To: Badal Nilawar; +Cc: intel-gfx, anshuman.gupta, andrzej.hajda, andi.shyti
On Fri, Jan 10, 2025 at 07:39:46PM +0530, Badal Nilawar wrote:
> The temporary wa ‘drm/i915/mtl: do not enable render power-gating on MTL’ disables RPG
> globally. Since the issue seen during live self-tests disabling it during these tests.
>
> Fixes: 25e7976db86b ("drm/i915/mtl: do not enable render power-gating on MTL")
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Andi Shyti <andi.shyti@intel.com>
> Cc: Andrzej Hajda <andrzej.hajda@intel.com>
> Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_rc6.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c b/drivers/gpu/drm/i915/gt/intel_rc6.c
> index 9378d5901c49..2dd68ca7ec0e 100644
> --- a/drivers/gpu/drm/i915/gt/intel_rc6.c
> +++ b/drivers/gpu/drm/i915/gt/intel_rc6.c
> @@ -123,7 +123,7 @@ static void gen11_rc6_enable(struct intel_rc6 *rc6)
> * temporary wa and should be removed after fixing real cause
> * of forcewake timeouts.
> */
> - if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74)))
> + if (i915_selftest.live && IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74)))
hmmm... is there something we could do inside the selftest to mitigate that?
here it is crossing (abusing?!) a lot of layers to workaround a case...
also this starts to depend on some config flags, what the compilation bot test hit...
> pg_enable =
> GEN9_MEDIA_PG_ENABLE |
> GEN11_MEDIA_SAMPLER_PG_ENABLE;
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] drm/i915/mtl: Disable render power-gating during selftest only
2025-01-10 14:09 ` [PATCH 1/2] drm/i915/mtl: Disable render power-gating during selftest only Badal Nilawar
2025-01-10 17:27 ` kernel test robot
2025-01-10 21:07 ` Rodrigo Vivi
@ 2025-01-11 10:55 ` kernel test robot
2 siblings, 0 replies; 9+ messages in thread
From: kernel test robot @ 2025-01-11 10:55 UTC (permalink / raw)
To: Badal Nilawar, intel-gfx
Cc: llvm, oe-kbuild-all, anshuman.gupta, rodrigo.vivi, andrzej.hajda,
andi.shyti
Hi Badal,
kernel test robot noticed the following build errors:
[auto build test ERROR on linus/master]
[also build test ERROR on drm-intel/for-linux-next drm-intel/for-linux-next-fixes drm-tip/drm-tip v6.13-rc6 next-20250110]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Badal-Nilawar/drm-i915-mtl-Disable-render-power-gating-during-selftest-only/20250110-214933
base: linus/master
patch link: https://lore.kernel.org/r/20250110140947.3471824-2-badal.nilawar%40intel.com
patch subject: [PATCH 1/2] drm/i915/mtl: Disable render power-gating during selftest only
config: i386-randconfig-014-20250111 (https://download.01.org/0day-ci/archive/20250111/202501111817.Kz3T41my-lkp@intel.com/config)
compiler: clang version 19.1.3 (https://github.com/llvm/llvm-project ab51eccf88f5321e7c60591c5546b254b6afab99)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250111/202501111817.Kz3T41my-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202501111817.Kz3T41my-lkp@intel.com/
All errors (new ones prefixed by >>):
>> drivers/gpu/drm/i915/gt/intel_rc6.c:126:6: error: use of undeclared identifier 'i915_selftest'
126 | if (i915_selftest.live && IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74)))
| ^
1 error generated.
vim +/i915_selftest +126 drivers/gpu/drm/i915/gt/intel_rc6.c
55
56 static void gen11_rc6_enable(struct intel_rc6 *rc6)
57 {
58 struct intel_gt *gt = rc6_to_gt(rc6);
59 struct intel_uncore *uncore = gt->uncore;
60 struct intel_engine_cs *engine;
61 enum intel_engine_id id;
62 u32 pg_enable;
63 int i;
64
65 /*
66 * With GuCRC, these parameters are set by GuC
67 */
68 if (!intel_uc_uses_guc_rc(>->uc)) {
69 /* 2b: Program RC6 thresholds.*/
70 intel_uncore_write_fw(uncore, GEN6_RC6_WAKE_RATE_LIMIT, 54 << 16 | 85);
71 intel_uncore_write_fw(uncore, GEN10_MEDIA_WAKE_RATE_LIMIT, 150);
72
73 intel_uncore_write_fw(uncore, GEN6_RC_EVALUATION_INTERVAL, 125000); /* 12500 * 1280ns */
74 intel_uncore_write_fw(uncore, GEN6_RC_IDLE_HYSTERSIS, 25); /* 25 * 1280ns */
75 for_each_engine(engine, rc6_to_gt(rc6), id)
76 intel_uncore_write_fw(uncore, RING_MAX_IDLE(engine->mmio_base), 10);
77
78 intel_uncore_write_fw(uncore, GUC_MAX_IDLE_COUNT, 0xA);
79
80 intel_uncore_write_fw(uncore, GEN6_RC_SLEEP, 0);
81
82 intel_uncore_write_fw(uncore, GEN6_RC6_THRESHOLD, 50000); /* 50/125ms per EI */
83 }
84
85 /*
86 * 2c: Program Coarse Power Gating Policies.
87 *
88 * Bspec's guidance is to use 25us (really 25 * 1280ns) here. What we
89 * use instead is a more conservative estimate for the maximum time
90 * it takes us to service a CS interrupt and submit a new ELSP - that
91 * is the time which the GPU is idle waiting for the CPU to select the
92 * next request to execute. If the idle hysteresis is less than that
93 * interrupt service latency, the hardware will automatically gate
94 * the power well and we will then incur the wake up cost on top of
95 * the service latency. A similar guide from plane_state is that we
96 * do not want the enable hysteresis to less than the wakeup latency.
97 *
98 * igt/gem_exec_nop/sequential provides a rough estimate for the
99 * service latency, and puts it under 10us for Icelake, similar to
100 * Broadwell+, To be conservative, we want to factor in a context
101 * switch on top (due to ksoftirqd).
102 */
103 intel_uncore_write_fw(uncore, GEN9_MEDIA_PG_IDLE_HYSTERESIS, 60);
104 intel_uncore_write_fw(uncore, GEN9_RENDER_PG_IDLE_HYSTERESIS, 60);
105
106 /* 3a: Enable RC6
107 *
108 * With GuCRC, we do not enable bit 31 of RC_CTL,
109 * thus allowing GuC to control RC6 entry/exit fully instead.
110 * We will not set the HW ENABLE and EI bits
111 */
112 if (!intel_guc_rc_enable(gt_to_guc(gt)))
113 rc6->ctl_enable = GEN6_RC_CTL_RC6_ENABLE;
114 else
115 rc6->ctl_enable =
116 GEN6_RC_CTL_HW_ENABLE |
117 GEN6_RC_CTL_RC6_ENABLE |
118 GEN6_RC_CTL_EI_MODE(1);
119
120 /*
121 * BSpec 52698 - Render powergating must be off.
122 * FIXME BSpec is outdated, disabling powergating for MTL is just
123 * temporary wa and should be removed after fixing real cause
124 * of forcewake timeouts.
125 */
> 126 if (i915_selftest.live && IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74)))
127 pg_enable =
128 GEN9_MEDIA_PG_ENABLE |
129 GEN11_MEDIA_SAMPLER_PG_ENABLE;
130 else
131 pg_enable =
132 GEN9_RENDER_PG_ENABLE |
133 GEN9_MEDIA_PG_ENABLE |
134 GEN11_MEDIA_SAMPLER_PG_ENABLE;
135
136 if (GRAPHICS_VER(gt->i915) >= 12 && !IS_DG1(gt->i915)) {
137 for (i = 0; i < I915_MAX_VCS; i++)
138 if (HAS_ENGINE(gt, _VCS(i)))
139 pg_enable |= (VDN_HCP_POWERGATE_ENABLE(i) |
140 VDN_MFX_POWERGATE_ENABLE(i));
141 }
142
143 intel_uncore_write_fw(uncore, GEN9_PG_ENABLE, pg_enable);
144 }
145
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2025-01-11 10:56 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-01-10 14:09 [PATCH 0/2] Disable RPG during live selftest Badal Nilawar
2025-01-10 14:09 ` [PATCH 1/2] drm/i915/mtl: Disable render power-gating during selftest only Badal Nilawar
2025-01-10 17:27 ` kernel test robot
2025-01-10 21:07 ` Rodrigo Vivi
2025-01-11 10:55 ` kernel test robot
2025-01-10 14:09 ` [PATCH 2/2] drm/i915: Disable rpg for Gen 12 and above Badal Nilawar
2025-01-10 14:19 ` ✗ Fi.CI.CHECKPATCH: warning for Disable RPG during live selftest Patchwork
2025-01-10 14:19 ` ✗ Fi.CI.SPARSE: " Patchwork
2025-01-10 14:49 ` ✗ i915.CI.BAT: failure " Patchwork
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