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From: Sergey Matyukevich <geomatsi@gmail.com>
To: Christoph Hellwig <hch@lst.de>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Alexandre Ghiti <alexghiti@rivosinc.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	Robin Murphy <robin.murphy@arm.com>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	Geert Uytterhoeven <geert+renesas@glider.be>
Subject: Re: [PATCH] riscv: select DMA_DIRECT_REMAP by RISCV_ISA_SVPBMT and ERRATA_THEAD_MAE
Date: Fri, 17 Jan 2025 11:38:47 +0300	[thread overview]
Message-ID: <Z4oXF2ewizIIk1cL@curiosity> (raw)
In-Reply-To: <20250117075238.GA25422@lst.de>

On Fri, Jan 17, 2025 at 08:52:38AM +0100, Christoph Hellwig wrote:
> On Thu, Jan 16, 2025 at 08:29:35PM +0300, Sergey Matyukevich wrote:
> > Select DMA_DIRECT_REMAP for the RISC-V extensions that allow to set
> > page-based memory types in PTEs according to the requested DMA
> > attributes. This is the purpose of Svpbmt or XTheadMae extensions.
> > Zicbom or XTheadCmo serve a different purpose, providing instructions
> > to flush/invalidate cache blocks.
> 
> Please explain what this is supposed to solve, because the above
> explanation dosn't make any sense.  DMA_DIRECT_REMAP is one
> of the implementations supporting dma coherent allocatiosn for
> non-coherent devices.  So selecting it from something that
> just keyes off support for an extension, but not the dma
> implementation is wrong.

Now DMA_DIRECT_REMAP is selected either by Zicbom (standard) or XTheadCmo
(vendor) RISC-V extensions. However neither of them can help to implement
DMA_DIRECT_REMAP on RISC-V. So selection of DMA_DIRECT_REMAP has been
moved in Kconfigs to Svpbmt and XTheadMae extensions.


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WARNING: multiple messages have this Message-ID (diff)
From: Sergey Matyukevich <geomatsi@gmail.com>
To: Christoph Hellwig <hch@lst.de>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Alexandre Ghiti <alexghiti@rivosinc.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	Robin Murphy <robin.murphy@arm.com>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	Geert Uytterhoeven <geert+renesas@glider.be>
Subject: Re: [PATCH] riscv: select DMA_DIRECT_REMAP by RISCV_ISA_SVPBMT and ERRATA_THEAD_MAE
Date: Fri, 17 Jan 2025 11:38:47 +0300	[thread overview]
Message-ID: <Z4oXF2ewizIIk1cL@curiosity> (raw)
In-Reply-To: <20250117075238.GA25422@lst.de>

On Fri, Jan 17, 2025 at 08:52:38AM +0100, Christoph Hellwig wrote:
> On Thu, Jan 16, 2025 at 08:29:35PM +0300, Sergey Matyukevich wrote:
> > Select DMA_DIRECT_REMAP for the RISC-V extensions that allow to set
> > page-based memory types in PTEs according to the requested DMA
> > attributes. This is the purpose of Svpbmt or XTheadMae extensions.
> > Zicbom or XTheadCmo serve a different purpose, providing instructions
> > to flush/invalidate cache blocks.
> 
> Please explain what this is supposed to solve, because the above
> explanation dosn't make any sense.  DMA_DIRECT_REMAP is one
> of the implementations supporting dma coherent allocatiosn for
> non-coherent devices.  So selecting it from something that
> just keyes off support for an extension, but not the dma
> implementation is wrong.

Now DMA_DIRECT_REMAP is selected either by Zicbom (standard) or XTheadCmo
(vendor) RISC-V extensions. However neither of them can help to implement
DMA_DIRECT_REMAP on RISC-V. So selection of DMA_DIRECT_REMAP has been
moved in Kconfigs to Svpbmt and XTheadMae extensions.


  reply	other threads:[~2025-01-17  8:39 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-16 17:29 [PATCH] riscv: select DMA_DIRECT_REMAP by RISCV_ISA_SVPBMT and ERRATA_THEAD_MAE Sergey Matyukevich
2025-01-16 17:29 ` Sergey Matyukevich
2025-01-17  7:52 ` Christoph Hellwig
2025-01-17  7:52   ` Christoph Hellwig
2025-01-17  8:38   ` Sergey Matyukevich [this message]
2025-01-17  8:38     ` Sergey Matyukevich
2025-01-17  9:58     ` Christoph Hellwig
2025-01-17  9:58       ` Christoph Hellwig
2025-01-17 11:01       ` Sergey Matyukevich
2025-01-17 11:01         ` Sergey Matyukevich
2025-02-17 12:23 ` Alexandre Ghiti
2025-02-17 12:23   ` Alexandre Ghiti
2025-02-20  9:48   ` Sergey Matyukevich
2025-02-20  9:48     ` Sergey Matyukevich
2025-02-26 13:58     ` Alexandre Ghiti
2025-02-26 13:58       ` Alexandre Ghiti

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