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From: "J. Neuschäfer" <j.ne@posteo.net>
To: Damien Le Moal <dlemoal@kernel.org>
Cc: j.ne@posteo.net, devicetree@vger.kernel.org,
	linuxppc-dev@lists.ozlabs.org, "Scott Wood" <oss@buserror.net>,
	"Madhavan Srinivasan" <maddy@linux.ibm.com>,
	"Michael Ellerman" <mpe@ellerman.id.au>,
	"Nicholas Piggin" <npiggin@gmail.com>,
	"Christophe Leroy" <christophe.leroy@csgroup.eu>,
	"Naveen N Rao" <naveen@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Niklas Cassel" <cassel@kernel.org>,
	"Herbert Xu" <herbert@gondor.apana.org.au>,
	"David S. Miller" <davem@davemloft.net>,
	"Lee Jones" <lee@kernel.org>, "Vinod Koul" <vkoul@kernel.org>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"J. Neuschäfer" <j.neuschaefer@gmx.net>,
	"Wim Van Sebroeck" <wim@linux-watchdog.org>,
	"Guenter Roeck" <linux@roeck-us.net>,
	"Mark Brown" <broonie@kernel.org>,
	"Miquel Raynal" <miquel.raynal@bootlin.com>,
	"Richard Weinberger" <richard@nod.at>,
	"Vignesh Raghavendra" <vigneshr@ti.com>,
	linux-kernel@vger.kernel.org, linux-ide@vger.kernel.org,
	linux-crypto@vger.kernel.org, dmaengine@vger.kernel.org,
	linux-pci@vger.kernel.org, linux-watchdog@vger.kernel.org,
	linux-spi@vger.kernel.org, linux-mtd@lists.infradead.org
Subject: Re: [PATCH 2/9] dt-bindings: ata: Convert fsl,pq-sata binding to YAML
Date: Fri, 31 Jan 2025 12:23:03 +0000	[thread overview]
Message-ID: <Z5zAp3X7U0oftneH@probook> (raw)
In-Reply-To: <a9df1ae6-8779-4dc0-8f03-eda939c0e533@kernel.org>

On Mon, Jan 27, 2025 at 08:22:55AM +0900, Damien Le Moal wrote:
> On 1/27/25 03:58, J. Neuschäfer via B4 Relay wrote:
> > From: "J. Neuschäfer" <j.ne@posteo.net>
> > 
> > Convert the Freescale PowerQUICC SATA controller binding from text form
> > to YAML. The list of compatible strings reflects current usage.
> > 
> > Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> > ---
> >  .../devicetree/bindings/ata/fsl,pq-sata.yaml       | 59 ++++++++++++++++++++++
[...]
> > +description: |
> > +  SATA nodes are defined to describe on-chip Serial ATA controllers.
> > +  Each SATA port should have its own node.
> 
> Very unclear. The SATA nodes define ports or controllers ? Normally, a single
> controller can have multiple ports, so the distinction is important.

I'll change it to "Each SATA controller ...", see below.


> > +  cell-index:
> > +    $ref: /schemas/types.yaml#/definitions/uint32
> > +    enum: [1, 2, 3, 4]
> > +    description: |
> > +      1 for controller @ 0x18000
> > +      2 for controller @ 0x19000
> > +      3 for controller @ 0x1a000
> > +      4 for controller @ 0x1b000
> 
> Are you sure these are different controllers ? Are they not different ports of
> the same controller ? Given that the previous text description define this as
> "controller index", I suspect these are the port offsets and you SATA nodes
> define ports, and not controllers.

They have no shared registers, and each instance has the same register
set (at a different base address).

The MPC8315E reference manual (for example) documents them as:

	SATA 1 Controller—Block Base Address 0x1_8000
	SATA 2 Controller—Block Base Address 0x1_9000

(table A.24 Serial ATA (SATA) Controller)

Section 15.2 Command Operation implies that each SATA controller
supports a single port:

	The SATA controller maintains a queue consisting of up to 16
	commands. These commands can be distributed to a single attached
	device or, if the system contains a port multiplier, over each
	of the attached devices.

So, in conclusion, I'm fairly sure "controller" is the right description.


Best regards,
J. Neuschäfer

WARNING: multiple messages have this Message-ID (diff)
From: "J. Neuschäfer" <j.ne@posteo.net>
To: Damien Le Moal <dlemoal@kernel.org>
Cc: j.ne@posteo.net, devicetree@vger.kernel.org,
	linuxppc-dev@lists.ozlabs.org, "Scott Wood" <oss@buserror.net>,
	"Madhavan Srinivasan" <maddy@linux.ibm.com>,
	"Michael Ellerman" <mpe@ellerman.id.au>,
	"Nicholas Piggin" <npiggin@gmail.com>,
	"Christophe Leroy" <christophe.leroy@csgroup.eu>,
	"Naveen N Rao" <naveen@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Niklas Cassel" <cassel@kernel.org>,
	"Herbert Xu" <herbert@gondor.apana.org.au>,
	"David S. Miller" <davem@davemloft.net>,
	"Lee Jones" <lee@kernel.org>, "Vinod Koul" <vkoul@kernel.org>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"J. Neuschäfer" <j.neuschaefer@gmx.net>,
	"Wim Van Sebroeck" <wim@linux-watchdog.org>,
	"Guenter Roeck" <linux@roeck-us.net>,
	"Mark Brown" <broonie@kernel.org>,
	"Miquel Raynal" <miquel.raynal@bootlin.com>,
	"Richard Weinberger" <richard@nod.at>,
	"Vignesh Raghavendra" <vigneshr@ti.com>,
	linux-kernel@vger.kernel.org, linux-ide@vger.kernel.org,
	linux-crypto@vger.kernel.org, dmaengine@vger.kernel.org,
	linux-pci@vger.kernel.org, linux-watchdog@vger.kernel.org,
	linux-spi@vger.kernel.org, linux-mtd@lists.infradead.org
Subject: Re: [PATCH 2/9] dt-bindings: ata: Convert fsl,pq-sata binding to YAML
Date: Fri, 31 Jan 2025 12:23:03 +0000	[thread overview]
Message-ID: <Z5zAp3X7U0oftneH@probook> (raw)
In-Reply-To: <a9df1ae6-8779-4dc0-8f03-eda939c0e533@kernel.org>

On Mon, Jan 27, 2025 at 08:22:55AM +0900, Damien Le Moal wrote:
> On 1/27/25 03:58, J. Neuschäfer via B4 Relay wrote:
> > From: "J. Neuschäfer" <j.ne@posteo.net>
> > 
> > Convert the Freescale PowerQUICC SATA controller binding from text form
> > to YAML. The list of compatible strings reflects current usage.
> > 
> > Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> > ---
> >  .../devicetree/bindings/ata/fsl,pq-sata.yaml       | 59 ++++++++++++++++++++++
[...]
> > +description: |
> > +  SATA nodes are defined to describe on-chip Serial ATA controllers.
> > +  Each SATA port should have its own node.
> 
> Very unclear. The SATA nodes define ports or controllers ? Normally, a single
> controller can have multiple ports, so the distinction is important.

I'll change it to "Each SATA controller ...", see below.


> > +  cell-index:
> > +    $ref: /schemas/types.yaml#/definitions/uint32
> > +    enum: [1, 2, 3, 4]
> > +    description: |
> > +      1 for controller @ 0x18000
> > +      2 for controller @ 0x19000
> > +      3 for controller @ 0x1a000
> > +      4 for controller @ 0x1b000
> 
> Are you sure these are different controllers ? Are they not different ports of
> the same controller ? Given that the previous text description define this as
> "controller index", I suspect these are the port offsets and you SATA nodes
> define ports, and not controllers.

They have no shared registers, and each instance has the same register
set (at a different base address).

The MPC8315E reference manual (for example) documents them as:

	SATA 1 Controller—Block Base Address 0x1_8000
	SATA 2 Controller—Block Base Address 0x1_9000

(table A.24 Serial ATA (SATA) Controller)

Section 15.2 Command Operation implies that each SATA controller
supports a single port:

	The SATA controller maintains a queue consisting of up to 16
	commands. These commands can be distributed to a single attached
	device or, if the system contains a port multiplier, over each
	of the attached devices.

So, in conclusion, I'm fairly sure "controller" is the right description.


Best regards,
J. Neuschäfer

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

  reply	other threads:[~2025-01-31 12:23 UTC|newest]

Thread overview: 93+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-26 18:58 [PATCH 0/9] YAML conversion of several Freescale/PowerPC DT bindings J. Neuschäfer
2025-01-26 18:58 ` J. Neuschäfer via B4 Relay
2025-01-26 18:58 ` J. Neuschäfer via B4 Relay
2025-01-26 18:58 ` [PATCH 1/9] dt-bindings: powerpc: Add binding for Freescale/NXP MPC83xx SoCs J. Neuschäfer
2025-01-26 18:58   ` J. Neuschäfer via B4 Relay
2025-01-26 18:58   ` J. Neuschäfer via B4 Relay
2025-01-27  4:23   ` Rob Herring (Arm)
2025-01-27  4:23     ` Rob Herring (Arm)
2025-01-26 18:58 ` [PATCH 2/9] dt-bindings: ata: Convert fsl,pq-sata binding to YAML J. Neuschäfer
2025-01-26 18:58   ` J. Neuschäfer via B4 Relay
2025-01-26 18:58   ` J. Neuschäfer via B4 Relay
2025-01-26 23:22   ` Damien Le Moal
2025-01-26 23:22     ` Damien Le Moal
2025-01-31 12:23     ` J. Neuschäfer [this message]
2025-01-31 12:23       ` J. Neuschäfer
2025-01-27  4:37   ` Rob Herring
2025-01-27  4:37     ` Rob Herring
2025-01-26 18:58 ` [PATCH 3/9] dt-bindings: crypto: Convert fsl,sec-2.0 " J. Neuschäfer
2025-01-26 18:58   ` J. Neuschäfer via B4 Relay
2025-01-26 18:58   ` J. Neuschäfer via B4 Relay
2025-01-27  4:41   ` Rob Herring
2025-01-27  4:41     ` Rob Herring
2025-01-29 15:41     ` J. Neuschäfer
2025-01-29 15:41       ` J. Neuschäfer
2025-01-26 18:58 ` [PATCH 4/9] dt-bindings: mfd: Convert fsl,mcu-mpc8349emitx " J. Neuschäfer
2025-01-26 18:58   ` J. Neuschäfer via B4 Relay
2025-01-26 18:58   ` J. Neuschäfer via B4 Relay
2025-01-27  4:42   ` Rob Herring
2025-01-27  4:42     ` Rob Herring
2025-02-11 14:13   ` (subset) " Lee Jones
2025-02-11 14:13     ` Lee Jones
2025-01-26 18:59 ` [PATCH 5/9] dt-bindings: dma: Convert fsl,elo*-dma bindings " J. Neuschäfer
2025-01-26 18:59   ` J. Neuschäfer via B4 Relay
2025-01-26 18:59   ` J. Neuschäfer via B4 Relay
2025-01-27  4:47   ` Rob Herring
2025-01-27  4:47     ` Rob Herring
2025-01-31 14:03     ` J. Neuschäfer
2025-01-31 14:03       ` J. Neuschäfer
2025-01-31 22:16       ` Rob Herring
2025-01-31 22:16         ` Rob Herring
2025-02-04 18:19         ` J. Neuschäfer
2025-02-04 18:19           ` J. Neuschäfer
2025-01-29 22:52   ` Frank Li
2025-01-29 22:52     ` Frank Li
2025-02-04 21:47     ` J. Neuschäfer
2025-02-04 21:47       ` J. Neuschäfer
2025-01-26 18:59 ` [PATCH 6/9] dt-bindings: pci: Add fsl,mpc83xx-pcie bindings J. Neuschäfer
2025-01-26 18:59   ` J. Neuschäfer via B4 Relay
2025-01-26 18:59   ` J. Neuschäfer via B4 Relay
2025-01-27  4:50   ` Rob Herring
2025-01-27  4:50     ` Rob Herring
2025-02-04 23:31     ` J. Neuschäfer
2025-02-04 23:31       ` J. Neuschäfer
2025-01-29 22:55   ` Frank Li
2025-01-29 22:55     ` Frank Li
2025-02-04 23:34     ` J. Neuschäfer
2025-02-04 23:34       ` J. Neuschäfer
2025-02-06 12:42       ` Mukesh Kumar Savaliya
2025-02-06 12:42         ` Mukesh Kumar Savaliya
2025-02-07 13:37         ` J. Neuschäfer
2025-02-07 13:37           ` J. Neuschäfer
2025-01-26 18:59 ` [PATCH 7/9] dt-bindings: watchdog: Convert mpc8xxx-wdt binding to YAML J. Neuschäfer
2025-01-26 18:59   ` J. Neuschäfer via B4 Relay
2025-01-26 18:59   ` J. Neuschäfer via B4 Relay
2025-01-27  4:51   ` Rob Herring
2025-01-27  4:51     ` Rob Herring
2025-01-26 18:59 ` [PATCH 8/9] dt-bindings: spi: Convert Freescale SPI bindings " J. Neuschäfer
2025-01-26 18:59   ` J. Neuschäfer via B4 Relay
2025-01-26 18:59   ` J. Neuschäfer via B4 Relay
2025-01-27  5:09   ` Rob Herring
2025-01-27  5:09     ` Rob Herring
2025-02-05 14:29     ` J. Neuschäfer
2025-02-05 14:29       ` J. Neuschäfer
2025-01-26 18:59 ` [PATCH RFC 9/9] dt-bindings: nand: Convert fsl,elbc " J. Neuschäfer
2025-01-26 18:59   ` J. Neuschäfer via B4 Relay
2025-01-26 18:59   ` J. Neuschäfer via B4 Relay
2025-01-26 20:38   ` kernel test robot
2025-01-27  4:23   ` Rob Herring
2025-01-27  4:23     ` Rob Herring
2025-02-06 22:59     ` J. Neuschäfer
2025-02-06 22:59       ` J. Neuschäfer
2025-01-27  8:37   ` Krzysztof Kozlowski
2025-01-27  8:37     ` Krzysztof Kozlowski
2025-02-06 22:30     ` J. Neuschäfer
2025-02-06 22:30       ` J. Neuschäfer
2025-01-29 23:01   ` Frank Li
2025-01-29 23:01     ` Frank Li
2025-02-06 22:59     ` J. Neuschäfer
2025-02-06 22:59       ` J. Neuschäfer
2025-01-29 22:29 ` [PATCH 0/9] YAML conversion of several Freescale/PowerPC DT bindings Frank Li
2025-01-29 22:29   ` Frank Li
2025-01-31 11:33   ` J. Neuschäfer
2025-01-31 11:33     ` J. Neuschäfer

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