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From: Andrew Lunn <andrew@lunn.ch>
To: Samin Guo <samin.guo@starfivetech.com>
Cc: linux-riscv@lists.infradead.org, netdev@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	"David S . Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Emil Renner Berthing <kernel@esmil.dk>,
	Richard Cochran <richardcochran@gmail.com>,
	Heiner Kallweit <hkallweit1@gmail.com>,
	Peter Geis <pgwipeout@gmail.com>,
	Yanhong Wang <yanhong.wang@starfivetech.com>
Subject: Re: [PATCH v5 05/12] riscv: dts: starfive: jh7110: Add ethernet device nodes
Date: Fri, 3 Mar 2023 14:45:44 +0100	[thread overview]
Message-ID: <ZAH6CGoXBKz0FmW3@lunn.ch> (raw)
In-Reply-To: <20230303085928.4535-6-samin.guo@starfivetech.com>

> +		gmac0: ethernet@16030000 {
> +			compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
> +			reg = <0x0 0x16030000 0x0 0x10000>;
> +			clocks = <&aoncrg JH7110_AONCLK_GMAC0_AXI>,
> +				 <&aoncrg JH7110_AONCLK_GMAC0_AHB>,
> +				 <&syscrg JH7110_SYSCLK_GMAC0_PTP>,
> +				 <&aoncrg JH7110_AONCLK_GMAC0_TX_INV>,
> +				 <&syscrg JH7110_SYSCLK_GMAC0_GTXC>;
> +			clock-names = "stmmaceth", "pclk", "ptp_ref",
> +				      "tx", "gtx";
> +			resets = <&aoncrg JH7110_AONRST_GMAC0_AXI>,
> +				 <&aoncrg JH7110_AONRST_GMAC0_AHB>;
> +			reset-names = "stmmaceth", "ahb";
> +			interrupts = <7>, <6>, <5>;
> +			interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
> +			phy-mode = "rgmii-id";

phy-mode is a board property, not a SoC property. It should be in the
board .dts file, not the SoC .dtsi file.

> +			snps,multicast-filter-bins = <64>;
> +			snps,perfect-filter-entries = <8>;
> +			rx-fifo-depth = <2048>;
> +			tx-fifo-depth = <2048>;
> +			snps,fixed-burst;
> +			snps,no-pbl-x8;
> +			snps,force_thresh_dma_mode;
> +			snps,axi-config = <&stmmac_axi_setup>;
> +			snps,tso;
> +			snps,en-tx-lpi-clockgating;
> +			snps,txpbl = <16>;
> +			snps,rxpbl = <16>;
> +			status = "disabled";
> +			phy-handle = <&phy0>;

The PHY is external, so this is also a board property, not a SoC
property. 

> +
> +			mdio {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				compatible = "snps,dwmac-mdio";
> +
> +				phy0: ethernet-phy@0 {
> +					reg = <0>;
> +				};

The PHY is also a board property. You could for example design a board
where both PHYs are on one MDIO bus, in order to save two SoC pins.

      Andrew

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linux-riscv@lists.infradead.org
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WARNING: multiple messages have this Message-ID (diff)
From: Andrew Lunn <andrew@lunn.ch>
To: Samin Guo <samin.guo@starfivetech.com>
Cc: linux-riscv@lists.infradead.org, netdev@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	"David S . Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Emil Renner Berthing <kernel@esmil.dk>,
	Richard Cochran <richardcochran@gmail.com>,
	Heiner Kallweit <hkallweit1@gmail.com>,
	Peter Geis <pgwipeout@gmail.com>,
	Yanhong Wang <yanhong.wang@starfivetech.com>
Subject: Re: [PATCH v5 05/12] riscv: dts: starfive: jh7110: Add ethernet device nodes
Date: Fri, 3 Mar 2023 14:45:44 +0100	[thread overview]
Message-ID: <ZAH6CGoXBKz0FmW3@lunn.ch> (raw)
In-Reply-To: <20230303085928.4535-6-samin.guo@starfivetech.com>

> +		gmac0: ethernet@16030000 {
> +			compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
> +			reg = <0x0 0x16030000 0x0 0x10000>;
> +			clocks = <&aoncrg JH7110_AONCLK_GMAC0_AXI>,
> +				 <&aoncrg JH7110_AONCLK_GMAC0_AHB>,
> +				 <&syscrg JH7110_SYSCLK_GMAC0_PTP>,
> +				 <&aoncrg JH7110_AONCLK_GMAC0_TX_INV>,
> +				 <&syscrg JH7110_SYSCLK_GMAC0_GTXC>;
> +			clock-names = "stmmaceth", "pclk", "ptp_ref",
> +				      "tx", "gtx";
> +			resets = <&aoncrg JH7110_AONRST_GMAC0_AXI>,
> +				 <&aoncrg JH7110_AONRST_GMAC0_AHB>;
> +			reset-names = "stmmaceth", "ahb";
> +			interrupts = <7>, <6>, <5>;
> +			interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
> +			phy-mode = "rgmii-id";

phy-mode is a board property, not a SoC property. It should be in the
board .dts file, not the SoC .dtsi file.

> +			snps,multicast-filter-bins = <64>;
> +			snps,perfect-filter-entries = <8>;
> +			rx-fifo-depth = <2048>;
> +			tx-fifo-depth = <2048>;
> +			snps,fixed-burst;
> +			snps,no-pbl-x8;
> +			snps,force_thresh_dma_mode;
> +			snps,axi-config = <&stmmac_axi_setup>;
> +			snps,tso;
> +			snps,en-tx-lpi-clockgating;
> +			snps,txpbl = <16>;
> +			snps,rxpbl = <16>;
> +			status = "disabled";
> +			phy-handle = <&phy0>;

The PHY is external, so this is also a board property, not a SoC
property. 

> +
> +			mdio {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				compatible = "snps,dwmac-mdio";
> +
> +				phy0: ethernet-phy@0 {
> +					reg = <0>;
> +				};

The PHY is also a board property. You could for example design a board
where both PHYs are on one MDIO bus, in order to save two SoC pins.

      Andrew

  reply	other threads:[~2023-03-03 13:45 UTC|newest]

Thread overview: 94+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-03  8:59 [PATCH v5 00/12] Add Ethernet driver for StarFive JH7110 SoC Samin Guo
2023-03-03  8:59 ` Samin Guo
2023-03-03  8:59 ` [PATCH v5 01/12] dt-bindings: net: snps,dwmac: Add dwmac-5.20 version Samin Guo
2023-03-03  8:59   ` Samin Guo
2023-03-03  8:59 ` [PATCH v5 02/12] net: stmmac: platform: Add snps,dwmac-5.20 IP compatible string Samin Guo
2023-03-03  8:59   ` Samin Guo
2023-03-03  8:59 ` [PATCH v5 03/12] dt-bindings: net: snps,dwmac: Add an optional resets single 'ahb' Samin Guo
2023-03-03  8:59   ` Samin Guo
2023-03-08 21:57   ` Rob Herring
2023-03-08 21:57     ` Rob Herring
2023-03-09  3:10     ` Guo Samin
2023-03-09  3:10       ` Guo Samin
2023-03-03  8:59 ` [PATCH v5 04/12] dt-bindings: net: Add support StarFive dwmac Samin Guo
2023-03-03  8:59   ` Samin Guo
2023-03-08 21:59   ` Rob Herring
2023-03-08 21:59     ` Rob Herring
2023-03-09  1:26     ` Guo Samin
2023-03-09  1:26       ` Guo Samin
2023-03-03  8:59 ` [PATCH v5 05/12] riscv: dts: starfive: jh7110: Add ethernet device nodes Samin Guo
2023-03-03  8:59   ` Samin Guo
2023-03-03 13:45   ` Andrew Lunn [this message]
2023-03-03 13:45     ` Andrew Lunn
2023-03-06  2:19     ` Guo Samin
2023-03-06  2:19       ` Guo Samin
2023-03-04 22:57   ` Emil Renner Berthing
2023-03-04 22:57     ` Emil Renner Berthing
2023-03-07  7:50     ` Guo Samin
2023-03-07  7:50       ` Guo Samin
2023-03-03  8:59 ` [PATCH v5 06/12] net: stmmac: Add glue layer for StarFive JH7110 SoC Samin Guo
2023-03-03  8:59   ` Samin Guo
2023-03-03 16:18   ` Emil Renner Berthing
2023-03-03 16:18     ` Emil Renner Berthing
2023-03-06  7:15     ` Guo Samin
2023-03-06  7:15       ` Guo Samin
2023-03-06 12:21       ` Emil Renner Berthing
2023-03-06 12:21         ` Emil Renner Berthing
2023-03-07  7:57         ` Guo Samin
2023-03-07  7:57           ` Guo Samin
2023-03-10  0:02   ` Emil Renner Berthing
2023-03-10  0:02     ` Emil Renner Berthing
2023-03-10  0:39     ` Emil Renner Berthing
2023-03-10  0:39       ` Emil Renner Berthing
2023-03-10  1:55       ` Guo Samin
2023-03-10  1:55         ` Guo Samin
2023-03-10  9:03         ` Emil Renner Berthing
2023-03-10  9:03           ` Emil Renner Berthing
2023-03-10 11:13           ` Guo Samin
2023-03-10 11:13             ` Guo Samin
2023-03-03  8:59 ` [PATCH v5 07/12] dt-bindings: net: starfive,jh7110-dwmac: Add starfive,syscon Samin Guo
2023-03-03  8:59   ` Samin Guo
2023-03-08 22:03   ` Rob Herring
2023-03-08 22:03     ` Rob Herring
2023-03-09  1:16     ` Guo Samin
2023-03-09  1:16       ` Guo Samin
2023-03-03  8:59 ` [PATCH v5 08/12] net: stmmac: starfive_dmac: Add phy interface settings Samin Guo
2023-03-03  8:59   ` Samin Guo
2023-03-03 13:36   ` Andrew Lunn
2023-03-03 13:36     ` Andrew Lunn
2023-03-03 16:50   ` Emil Renner Berthing
2023-03-03 16:50     ` Emil Renner Berthing
2023-03-06  3:06     ` Guo Samin
2023-03-06  3:06       ` Guo Samin
2023-03-06 12:49       ` Emil Renner Berthing
2023-03-06 12:49         ` Emil Renner Berthing
2023-03-06 13:06         ` Andrew Lunn
2023-03-06 13:06           ` Andrew Lunn
2023-03-07  1:50           ` Guo Samin
2023-03-07  1:50             ` Guo Samin
2023-03-07  2:16         ` Guo Samin
2023-03-07  2:16           ` Guo Samin
2023-03-03  8:59 ` [PATCH v5 09/12] riscv: dts: starfive: jh7110: Add syscon to support " Samin Guo
2023-03-03  8:59   ` Samin Guo
2023-03-03  8:59 ` [PATCH v5 10/12] riscv: dts: starfive: visionfive-2-v1.3b: Add gmac+phy's delay configuration Samin Guo
2023-03-03  8:59   ` Samin Guo
2023-03-03  8:59 ` [PATCH v5 11/12] riscv: dts: starfive: visionfive-2-v1.2a: " Samin Guo
2023-03-03  8:59   ` Samin Guo
2023-03-06 13:00   ` Emil Renner Berthing
2023-03-06 13:00     ` Emil Renner Berthing
2023-03-07  1:43     ` Guo Samin
2023-03-07  1:43       ` Guo Samin
2023-03-07 12:40       ` Emil Renner Berthing
2023-03-07 12:40         ` Emil Renner Berthing
2023-03-08  3:01         ` Guo Samin
2023-03-08  3:01           ` Guo Samin
2023-03-03  8:59 ` [PATCH v5 12/12] riscv: dts: starfive: visionfive 2: Enable gmac device tree node Samin Guo
2023-03-03  8:59   ` Samin Guo
2023-03-06 13:04   ` Emil Renner Berthing
2023-03-06 13:04     ` Emil Renner Berthing
2023-03-07  1:21     ` Guo Samin
2023-03-07  1:21       ` Guo Samin
2023-03-07 12:23       ` Emil Renner Berthing
2023-03-07 12:23         ` Emil Renner Berthing
2023-03-10  8:09 ` [PATCH v5 00/12] Add Ethernet driver for StarFive JH7110 SoC Tommaso Merciai
2023-03-10  8:09   ` Tommaso Merciai

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