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From: "Roger Pau Monné" <roger.pau@citrix.com>
To: Huang Rui <ray.huang@amd.com>
Cc: "Juergen Gross" <jgross@suse.com>,
	"Honglei Huang" <honglei1.huang@amd.com>,
	"Stefano Stabellini" <sstabellini@kernel.org>,
	"Stewart Hildebrand" <Stewart.Hildebrand@amd.com>,
	"Chen Jiqian" <Jiqian.Chen@amd.com>,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	"Oleksandr Tyshchenko" <oleksandr_tyshchenko@epam.com>,
	amd-gfx@lists.freedesktop.org,
	"Xenia Ragiadakou" <burzalodowa@gmail.com>,
	"Alex Deucher" <alexander.deucher@amd.com>,
	xen-devel@lists.xenproject.org,
	"Boris Ostrovsky" <boris.ostrovsky@oracle.com>,
	"Julia Zhang" <julia.zhang@amd.com>,
	"Christian König" <christian.koenig@amd.com>
Subject: Re: [RFC PATCH 5/5] xen/privcmd: add IOCTL_PRIVCMD_GSI_FROM_IRQ
Date: Wed, 15 Mar 2023 15:26:17 +0100	[thread overview]
Message-ID: <ZBHViestgDwWYqjl@Air-de-Roger> (raw)
In-Reply-To: <20230312120157.452859-6-ray.huang@amd.com>

On Sun, Mar 12, 2023 at 08:01:57PM +0800, Huang Rui wrote:
> From: Chen Jiqian <Jiqian.Chen@amd.com>
> 
> When hypervisor get an interrupt, it needs interrupt's
> gsi number instead of irq number. Gsi number is unique
> in xen, but irq number is only unique in one domain.
> So, we need to record the relationship between irq and
> gsi when dom0 initialized pci devices, and provide syscall
> IOCTL_PRIVCMD_GSI_FROM_IRQ to translate irq to gsi. So
> that, we can map pirq successfully in hypervisor side.

GSI is not only unique in Xen, it's an ACPI provided value that's
unique in the platform.  The text above make it look like GSI is some
kind of internal Xen reference to an interrupt, but it's not.

How does a PV domain deal with this? I would assume there Linux will
also end up with IRQ != GSI, and hence will need some kind of
translation?

Thanks, Roger.

WARNING: multiple messages have this Message-ID (diff)
From: "Roger Pau Monné" <roger.pau@citrix.com>
To: Huang Rui <ray.huang@amd.com>
Cc: "Juergen Gross" <jgross@suse.com>,
	"Stefano Stabellini" <sstabellini@kernel.org>,
	"Oleksandr Tyshchenko" <oleksandr_tyshchenko@epam.com>,
	"Boris Ostrovsky" <boris.ostrovsky@oracle.com>,
	xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org,
	dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org,
	"Alex Deucher" <alexander.deucher@amd.com>,
	"Christian König" <christian.koenig@amd.com>,
	"Stewart Hildebrand" <Stewart.Hildebrand@amd.com>,
	"Xenia Ragiadakou" <burzalodowa@gmail.com>,
	"Honglei Huang" <honglei1.huang@amd.com>,
	"Julia Zhang" <julia.zhang@amd.com>,
	"Chen Jiqian" <Jiqian.Chen@amd.com>
Subject: Re: [RFC PATCH 5/5] xen/privcmd: add IOCTL_PRIVCMD_GSI_FROM_IRQ
Date: Wed, 15 Mar 2023 15:26:17 +0100	[thread overview]
Message-ID: <ZBHViestgDwWYqjl@Air-de-Roger> (raw)
In-Reply-To: <20230312120157.452859-6-ray.huang@amd.com>

On Sun, Mar 12, 2023 at 08:01:57PM +0800, Huang Rui wrote:
> From: Chen Jiqian <Jiqian.Chen@amd.com>
> 
> When hypervisor get an interrupt, it needs interrupt's
> gsi number instead of irq number. Gsi number is unique
> in xen, but irq number is only unique in one domain.
> So, we need to record the relationship between irq and
> gsi when dom0 initialized pci devices, and provide syscall
> IOCTL_PRIVCMD_GSI_FROM_IRQ to translate irq to gsi. So
> that, we can map pirq successfully in hypervisor side.

GSI is not only unique in Xen, it's an ACPI provided value that's
unique in the platform.  The text above make it look like GSI is some
kind of internal Xen reference to an interrupt, but it's not.

How does a PV domain deal with this? I would assume there Linux will
also end up with IRQ != GSI, and hence will need some kind of
translation?

Thanks, Roger.


  reply	other threads:[~2023-03-15 14:36 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-12 12:01 [RFC PATCH 0/5] Add Xen PVH dom0 support for GPU Huang Rui
2023-03-12 12:01 ` Huang Rui
2023-03-12 12:01 ` [RFC PATCH 1/5] x86/xen: disable swiotlb for xen pvh Huang Rui
2023-03-12 12:01   ` Huang Rui
2023-03-13  8:56   ` Jan Beulich
2023-03-13  8:56     ` Jan Beulich
2023-03-15  0:52     ` Stefano Stabellini
2023-03-15  0:52       ` Stefano Stabellini
2023-03-15  4:14       ` Huang Rui
2023-03-15  4:14         ` Huang Rui
2023-03-15  6:52         ` Jan Beulich
2023-03-15  6:52           ` Jan Beulich
2023-03-15  6:49       ` Jan Beulich
2023-03-15  6:49         ` Jan Beulich
2023-03-15 23:25         ` Stefano Stabellini
2023-03-15 23:25           ` Stefano Stabellini
2023-03-16  7:50           ` Jan Beulich
2023-03-16  7:50             ` Jan Beulich
2023-03-16 13:45             ` Alex Deucher
2023-03-16 13:45               ` Alex Deucher
2023-03-16 13:48               ` Juergen Gross
2023-03-16 13:48                 ` Juergen Gross
2023-03-16 13:53                 ` Alex Deucher
2023-03-16 13:53                   ` Alex Deucher
2023-03-16 13:58                   ` Jan Beulich
2023-03-16 13:58                     ` Jan Beulich
2023-03-16 14:20                   ` Juergen Gross
2023-03-16 14:20                     ` Juergen Gross
2023-03-16 23:09                     ` Stefano Stabellini
2023-03-16 23:09                       ` Stefano Stabellini
2023-03-16 23:09                       ` Stefano Stabellini
2023-03-17 10:19                       ` Roger Pau Monné
2023-03-17 10:19                         ` Roger Pau Monné
2023-03-17 10:19                         ` Roger Pau Monné
2023-03-17 14:45                       ` Alex Deucher
2023-03-17 14:45                         ` Alex Deucher
2023-03-21 18:55                         ` Christian König
2023-03-21 18:55                           ` Christian König
2023-03-16 16:28   ` Roger Pau Monné
2023-03-16 16:28     ` Roger Pau Monné
2023-03-12 12:01 ` [RFC PATCH 2/5] xen/grants: update initialization order of xen grant table Huang Rui
2023-03-12 12:01   ` Huang Rui
2023-03-15 12:31   ` Roger Pau Monné
2023-03-15 12:31     ` Roger Pau Monné
2023-03-12 12:01 ` [RFC PATCH 3/5] drm/amdgpu: set passthrough mode for xen pvh/hvm Huang Rui
2023-03-12 12:01   ` Huang Rui
2023-03-15 12:42   ` Roger Pau Monné
2023-03-15 12:42     ` Roger Pau Monné
2023-03-12 12:01 ` [RFC PATCH 4/5] x86/xen: acpi registers gsi for xen pvh Huang Rui
2023-03-12 12:01   ` Huang Rui
2023-03-15 14:00   ` Roger Pau Monné
2023-03-15 14:00     ` Roger Pau Monné
2023-03-12 12:01 ` [RFC PATCH 5/5] xen/privcmd: add IOCTL_PRIVCMD_GSI_FROM_IRQ Huang Rui
2023-03-12 12:01   ` Huang Rui
2023-03-15 14:26   ` Roger Pau Monné [this message]
2023-03-15 14:26     ` Roger Pau Monné

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