From: Juergen Gross <jgross@suse.com>
To: Alex Deucher <alexdeucher@gmail.com>, Jan Beulich <jbeulich@suse.com>
Cc: "Honglei Huang" <honglei1.huang@amd.com>,
"Stefano Stabellini" <sstabellini@kernel.org>,
"Chen Jiqian" <Jiqian.Chen@amd.com>,
amd-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org,
"Stewart Hildebrand" <Stewart.Hildebrand@amd.com>,
"Oleksandr Tyshchenko" <oleksandr_tyshchenko@epam.com>,
"Huang Rui" <ray.huang@amd.com>,
dri-devel@lists.freedesktop.org,
"Xenia Ragiadakou" <burzalodowa@gmail.com>,
"Alex Deucher" <alexander.deucher@amd.com>,
xen-devel@lists.xenproject.org,
"Boris Ostrovsky" <boris.ostrovsky@oracle.com>,
"Julia Zhang" <julia.zhang@amd.com>,
"Christian König" <christian.koenig@amd.com>,
"Roger Pau Monné" <roger.pau@citrix.com>
Subject: Re: [RFC PATCH 1/5] x86/xen: disable swiotlb for xen pvh
Date: Thu, 16 Mar 2023 14:48:42 +0100 [thread overview]
Message-ID: <dcb54275-b21f-a837-76bb-e19e331a0666@suse.com> (raw)
In-Reply-To: <CADnq5_PH9ZqDqpPES74V3fB3NVpaexDoGTyu_+-zoux5vgagyg@mail.gmail.com>
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On 16.03.23 14:45, Alex Deucher wrote:
> On Thu, Mar 16, 2023 at 3:50 AM Jan Beulich <jbeulich@suse.com> wrote:
>>
>> On 16.03.2023 00:25, Stefano Stabellini wrote:
>>> On Wed, 15 Mar 2023, Jan Beulich wrote:
>>>> On 15.03.2023 01:52, Stefano Stabellini wrote:
>>>>> On Mon, 13 Mar 2023, Jan Beulich wrote:
>>>>>> On 12.03.2023 13:01, Huang Rui wrote:
>>>>>>> Xen PVH is the paravirtualized mode and takes advantage of hardware
>>>>>>> virtualization support when possible. It will using the hardware IOMMU
>>>>>>> support instead of xen-swiotlb, so disable swiotlb if current domain is
>>>>>>> Xen PVH.
>>>>>>
>>>>>> But the kernel has no way (yet) to drive the IOMMU, so how can it get
>>>>>> away without resorting to swiotlb in certain cases (like I/O to an
>>>>>> address-restricted device)?
>>>>>
>>>>> I think Ray meant that, thanks to the IOMMU setup by Xen, there is no
>>>>> need for swiotlb-xen in Dom0. Address translations are done by the IOMMU
>>>>> so we can use guest physical addresses instead of machine addresses for
>>>>> DMA. This is a similar case to Dom0 on ARM when the IOMMU is available
>>>>> (see include/xen/arm/swiotlb-xen.h:xen_swiotlb_detect, the corresponding
>>>>> case is XENFEAT_not_direct_mapped).
>>>>
>>>> But how does Xen using an IOMMU help with, as said, address-restricted
>>>> devices? They may still need e.g. a 32-bit address to be programmed in,
>>>> and if the kernel has memory beyond the 4G boundary not all I/O buffers
>>>> may fulfill this requirement.
>>>
>>> In short, it is going to work as long as Linux has guest physical
>>> addresses (not machine addresses, those could be anything) lower than
>>> 4GB.
>>>
>>> If the address-restricted device does DMA via an IOMMU, then the device
>>> gets programmed by Linux using its guest physical addresses (not machine
>>> addresses).
>>>
>>> The 32-bit restriction would be applied by Linux to its choice of guest
>>> physical address to use to program the device, the same way it does on
>>> native. The device would be fine as it always uses Linux-provided <4GB
>>> addresses. After the IOMMU translation (pagetable setup by Xen), we
>>> could get any address, including >4GB addresses, and that is expected to
>>> work.
>>
>> I understand that's the "normal" way of working. But whatever the swiotlb
>> is used for in baremetal Linux, that would similarly require its use in
>> PVH (or HVM) aiui. So unconditionally disabling it in PVH would look to
>> me like an incomplete attempt to disable its use altogether on x86. What
>> difference of PVH vs baremetal am I missing here?
>
> swiotlb is not usable for GPUs even on bare metal. They often have
> hundreds or megs or even gigs of memory mapped on the device at any
> given time. Also, AMD GPUs support 44-48 bit DMA masks (depending on
> the chip family).
But the swiotlb isn't per device, but system global.
Juergen
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WARNING: multiple messages have this Message-ID (diff)
From: Juergen Gross <jgross@suse.com>
To: Alex Deucher <alexdeucher@gmail.com>, Jan Beulich <jbeulich@suse.com>
Cc: "Stefano Stabellini" <sstabellini@kernel.org>,
"Honglei Huang" <honglei1.huang@amd.com>,
amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
linux-kernel@vger.kernel.org,
"Stewart Hildebrand" <Stewart.Hildebrand@amd.com>,
"Oleksandr Tyshchenko" <oleksandr_tyshchenko@epam.com>,
"Huang Rui" <ray.huang@amd.com>,
"Chen Jiqian" <Jiqian.Chen@amd.com>,
"Xenia Ragiadakou" <burzalodowa@gmail.com>,
"Alex Deucher" <alexander.deucher@amd.com>,
xen-devel@lists.xenproject.org,
"Boris Ostrovsky" <boris.ostrovsky@oracle.com>,
"Julia Zhang" <julia.zhang@amd.com>,
"Christian König" <christian.koenig@amd.com>,
"Roger Pau Monné" <roger.pau@citrix.com>
Subject: Re: [RFC PATCH 1/5] x86/xen: disable swiotlb for xen pvh
Date: Thu, 16 Mar 2023 14:48:42 +0100 [thread overview]
Message-ID: <dcb54275-b21f-a837-76bb-e19e331a0666@suse.com> (raw)
In-Reply-To: <CADnq5_PH9ZqDqpPES74V3fB3NVpaexDoGTyu_+-zoux5vgagyg@mail.gmail.com>
[-- Attachment #1.1.1: Type: text/plain, Size: 2944 bytes --]
On 16.03.23 14:45, Alex Deucher wrote:
> On Thu, Mar 16, 2023 at 3:50 AM Jan Beulich <jbeulich@suse.com> wrote:
>>
>> On 16.03.2023 00:25, Stefano Stabellini wrote:
>>> On Wed, 15 Mar 2023, Jan Beulich wrote:
>>>> On 15.03.2023 01:52, Stefano Stabellini wrote:
>>>>> On Mon, 13 Mar 2023, Jan Beulich wrote:
>>>>>> On 12.03.2023 13:01, Huang Rui wrote:
>>>>>>> Xen PVH is the paravirtualized mode and takes advantage of hardware
>>>>>>> virtualization support when possible. It will using the hardware IOMMU
>>>>>>> support instead of xen-swiotlb, so disable swiotlb if current domain is
>>>>>>> Xen PVH.
>>>>>>
>>>>>> But the kernel has no way (yet) to drive the IOMMU, so how can it get
>>>>>> away without resorting to swiotlb in certain cases (like I/O to an
>>>>>> address-restricted device)?
>>>>>
>>>>> I think Ray meant that, thanks to the IOMMU setup by Xen, there is no
>>>>> need for swiotlb-xen in Dom0. Address translations are done by the IOMMU
>>>>> so we can use guest physical addresses instead of machine addresses for
>>>>> DMA. This is a similar case to Dom0 on ARM when the IOMMU is available
>>>>> (see include/xen/arm/swiotlb-xen.h:xen_swiotlb_detect, the corresponding
>>>>> case is XENFEAT_not_direct_mapped).
>>>>
>>>> But how does Xen using an IOMMU help with, as said, address-restricted
>>>> devices? They may still need e.g. a 32-bit address to be programmed in,
>>>> and if the kernel has memory beyond the 4G boundary not all I/O buffers
>>>> may fulfill this requirement.
>>>
>>> In short, it is going to work as long as Linux has guest physical
>>> addresses (not machine addresses, those could be anything) lower than
>>> 4GB.
>>>
>>> If the address-restricted device does DMA via an IOMMU, then the device
>>> gets programmed by Linux using its guest physical addresses (not machine
>>> addresses).
>>>
>>> The 32-bit restriction would be applied by Linux to its choice of guest
>>> physical address to use to program the device, the same way it does on
>>> native. The device would be fine as it always uses Linux-provided <4GB
>>> addresses. After the IOMMU translation (pagetable setup by Xen), we
>>> could get any address, including >4GB addresses, and that is expected to
>>> work.
>>
>> I understand that's the "normal" way of working. But whatever the swiotlb
>> is used for in baremetal Linux, that would similarly require its use in
>> PVH (or HVM) aiui. So unconditionally disabling it in PVH would look to
>> me like an incomplete attempt to disable its use altogether on x86. What
>> difference of PVH vs baremetal am I missing here?
>
> swiotlb is not usable for GPUs even on bare metal. They often have
> hundreds or megs or even gigs of memory mapped on the device at any
> given time. Also, AMD GPUs support 44-48 bit DMA masks (depending on
> the chip family).
But the swiotlb isn't per device, but system global.
Juergen
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next prev parent reply other threads:[~2023-03-16 13:51 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-12 12:01 [RFC PATCH 0/5] Add Xen PVH dom0 support for GPU Huang Rui
2023-03-12 12:01 ` Huang Rui
2023-03-12 12:01 ` [RFC PATCH 1/5] x86/xen: disable swiotlb for xen pvh Huang Rui
2023-03-12 12:01 ` Huang Rui
2023-03-13 8:56 ` Jan Beulich
2023-03-13 8:56 ` Jan Beulich
2023-03-15 0:52 ` Stefano Stabellini
2023-03-15 0:52 ` Stefano Stabellini
2023-03-15 4:14 ` Huang Rui
2023-03-15 4:14 ` Huang Rui
2023-03-15 6:52 ` Jan Beulich
2023-03-15 6:52 ` Jan Beulich
2023-03-15 6:49 ` Jan Beulich
2023-03-15 6:49 ` Jan Beulich
2023-03-15 23:25 ` Stefano Stabellini
2023-03-15 23:25 ` Stefano Stabellini
2023-03-16 7:50 ` Jan Beulich
2023-03-16 7:50 ` Jan Beulich
2023-03-16 13:45 ` Alex Deucher
2023-03-16 13:45 ` Alex Deucher
2023-03-16 13:48 ` Juergen Gross [this message]
2023-03-16 13:48 ` Juergen Gross
2023-03-16 13:53 ` Alex Deucher
2023-03-16 13:53 ` Alex Deucher
2023-03-16 13:58 ` Jan Beulich
2023-03-16 13:58 ` Jan Beulich
2023-03-16 14:20 ` Juergen Gross
2023-03-16 14:20 ` Juergen Gross
2023-03-16 23:09 ` Stefano Stabellini
2023-03-16 23:09 ` Stefano Stabellini
2023-03-16 23:09 ` Stefano Stabellini
2023-03-17 10:19 ` Roger Pau Monné
2023-03-17 10:19 ` Roger Pau Monné
2023-03-17 10:19 ` Roger Pau Monné
2023-03-17 14:45 ` Alex Deucher
2023-03-17 14:45 ` Alex Deucher
2023-03-21 18:55 ` Christian König
2023-03-21 18:55 ` Christian König
2023-03-16 16:28 ` Roger Pau Monné
2023-03-16 16:28 ` Roger Pau Monné
2023-03-12 12:01 ` [RFC PATCH 2/5] xen/grants: update initialization order of xen grant table Huang Rui
2023-03-12 12:01 ` Huang Rui
2023-03-15 12:31 ` Roger Pau Monné
2023-03-15 12:31 ` Roger Pau Monné
2023-03-12 12:01 ` [RFC PATCH 3/5] drm/amdgpu: set passthrough mode for xen pvh/hvm Huang Rui
2023-03-12 12:01 ` Huang Rui
2023-03-15 12:42 ` Roger Pau Monné
2023-03-15 12:42 ` Roger Pau Monné
2023-03-12 12:01 ` [RFC PATCH 4/5] x86/xen: acpi registers gsi for xen pvh Huang Rui
2023-03-12 12:01 ` Huang Rui
2023-03-15 14:00 ` Roger Pau Monné
2023-03-15 14:00 ` Roger Pau Monné
2023-03-12 12:01 ` [RFC PATCH 5/5] xen/privcmd: add IOCTL_PRIVCMD_GSI_FROM_IRQ Huang Rui
2023-03-12 12:01 ` Huang Rui
2023-03-15 14:26 ` Roger Pau Monné
2023-03-15 14:26 ` Roger Pau Monné
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