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From: Christoph Hellwig <hch@infradead.org>
To: Arnd Bergmann <arnd@arndb.de>
Cc: Prabhakar <prabhakar.csengg@gmail.com>,
	"Conor.Dooley" <conor.dooley@microchip.com>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	guoren <guoren@kernel.org>,
	Andrew Jones <ajones@ventanamicro.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Samuel Holland <samuel@sholland.org>,
	linux-riscv@lists.infradead.org,
	Christoph Hellwig <hch@infradead.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
	Biju Das <biju.das.jz@bp.renesas.com>,
	"Lad, Prabhakar" <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH v9 3/6] riscv: mm: dma-noncoherent: nonstandard cache operations support
Date: Wed, 14 Jun 2023 23:00:01 -0700	[thread overview]
Message-ID: <ZIqo4TsHJr9vdQaU@infradead.org> (raw)
In-Reply-To: <4f69fcfe-debb-4979-9070-1d58ba35032c@app.fastmail.com>

On Wed, Jun 14, 2023 at 02:35:44PM +0200, Arnd Bergmann wrote:
> I understand that Christoph will still not like this, but I think this
> is as good as it gets, making the standard variant the fast path,
> and using the function pointers only for the nonstandard cases.

Yes.  And I really do not want to make the non-standard cases easy.
The extension to do cache maintenance have been ratified for a while
and under discussion for much longer.  Adding random crap because
vendors suck is a bad idea, and we should not be adding this crap.

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WARNING: multiple messages have this Message-ID (diff)
From: Christoph Hellwig <hch@infradead.org>
To: Arnd Bergmann <arnd@arndb.de>
Cc: Prabhakar <prabhakar.csengg@gmail.com>,
	"Conor.Dooley" <conor.dooley@microchip.com>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	guoren <guoren@kernel.org>,
	Andrew Jones <ajones@ventanamicro.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Samuel Holland <samuel@sholland.org>,
	linux-riscv@lists.infradead.org,
	Christoph Hellwig <hch@infradead.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
	Biju Das <biju.das.jz@bp.renesas.com>,
	"Lad, Prabhakar" <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH v9 3/6] riscv: mm: dma-noncoherent: nonstandard cache operations support
Date: Wed, 14 Jun 2023 23:00:01 -0700	[thread overview]
Message-ID: <ZIqo4TsHJr9vdQaU@infradead.org> (raw)
In-Reply-To: <4f69fcfe-debb-4979-9070-1d58ba35032c@app.fastmail.com>

On Wed, Jun 14, 2023 at 02:35:44PM +0200, Arnd Bergmann wrote:
> I understand that Christoph will still not like this, but I think this
> is as good as it gets, making the standard variant the fast path,
> and using the function pointers only for the nonstandard cases.

Yes.  And I really do not want to make the non-standard cases easy.
The extension to do cache maintenance have been ratified for a while
and under discussion for much longer.  Adding random crap because
vendors suck is a bad idea, and we should not be adding this crap.

  reply	other threads:[~2023-06-15  6:00 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-14 10:47 [PATCH v9 0/6] Add non-coherent DMA support for AX45MP Prabhakar
2023-06-14 10:47 ` Prabhakar
2023-06-14 10:47 ` [PATCH v9 1/6] riscv: asm: vendorid_list: Add Andes Technology to the vendors list Prabhakar
2023-06-14 10:47   ` Prabhakar
2023-06-14 10:47 ` [PATCH v9 2/6] riscv: errata: Add Andes alternative ports Prabhakar
2023-06-14 10:47   ` Prabhakar
2023-06-14 10:47 ` [PATCH v9 3/6] riscv: mm: dma-noncoherent: nonstandard cache operations support Prabhakar
2023-06-14 10:47   ` Prabhakar
2023-06-14 12:35   ` Arnd Bergmann
2023-06-14 12:35     ` Arnd Bergmann
2023-06-15  6:00     ` Christoph Hellwig [this message]
2023-06-15  6:00       ` Christoph Hellwig
2023-06-16 12:13     ` Lad, Prabhakar
2023-06-16 12:13       ` Lad, Prabhakar
2023-06-14 12:53   ` Geert Uytterhoeven
2023-06-14 12:53     ` Geert Uytterhoeven
2023-06-14 16:43     ` Conor Dooley
2023-06-14 16:43       ` Conor Dooley
2023-06-16 12:23     ` Lad, Prabhakar
2023-06-16 12:23       ` Lad, Prabhakar
2023-06-14 10:47 ` [PATCH v9 4/6] dt-bindings: cache: andestech,ax45mp-cache: Add DT binding documentation for L2 cache controller Prabhakar
2023-06-14 10:47   ` Prabhakar
2023-06-14 10:47 ` [PATCH v9 5/6] cache: Add L2 cache management for Andes AX45MP RISC-V core Prabhakar
2023-06-14 10:47   ` Prabhakar
2023-06-14 13:10   ` Arnd Bergmann
2023-06-14 13:10     ` Arnd Bergmann
2023-06-28 12:57     ` Lad, Prabhakar
2023-06-28 12:57       ` Lad, Prabhakar
2023-06-14 10:47 ` [PATCH v9 6/6] soc: renesas: Kconfig: Select the required configs for RZ/Five SoC Prabhakar
2023-06-14 10:47   ` Prabhakar
2023-06-14 16:58 ` [PATCH v9 0/6] Add non-coherent DMA support for AX45MP Conor Dooley
2023-06-14 16:58   ` Conor Dooley

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