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From: Nicolin Chen <nicolinc@nvidia.com>
To: Michael Shavit <mshavit@google.com>
Cc: Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	"Joerg Roedel" <joro@8bytes.org>, <jean-philippe@linaro.org>,
	<jgg@nvidia.com>, <baolu.lu@linux.intel.com>,
	<linux-arm-kernel@lists.infradead.org>, <iommu@lists.linux.dev>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v4 02/13] iommu/arm-smmu-v3: Add smmu_s1_cfg to smmu_master
Date: Wed, 12 Jul 2023 18:22:17 -0700	[thread overview]
Message-ID: <ZK9RycgNAVrxe343@Asurada-Nvidia> (raw)
In-Reply-To: <20230621063825.268890-3-mshavit@google.com>

Hi Michael,

On Wed, Jun 21, 2023 at 02:37:14PM +0800, Michael Shavit wrote:
 
> Except for Nested domains, arm_smmu_master will own the STEs that are
> inserted into the arm_smmu_device's STE table.

I think that the master still owns an STE when attached to a
nested domain. Though an IOMMU_DOMAIN_NESTED iommu_domain is
an opaque object to the STE in the guest, the host still has
a real STE for the nested configuration somewhere -- and it's
likely still to be owned by the master that's attached to the
opaque NESTED iommu_domain in the host kernel.

> -static int arm_smmu_alloc_cd_tables(struct arm_smmu_domain *smmu_domain)
> +static int arm_smmu_init_s1_cfg(struct arm_smmu_master *master,
> +                               struct arm_smmu_s1_cfg *cfg)

We here pass in an s1_cfg ptr because we expect someone else
rather than the master could own the s1_cfg?

But the final codeline by the end of this series seems that
only master owns an s1_cfg. So perhaps we could re-organize
the patches to clean this away, as the cfg always comes from
a master?

> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> index 68d519f21dbd8..053cc14c23969 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> @@ -688,6 +688,7 @@ struct arm_smmu_master {
>         struct arm_smmu_domain          *domain;
>         struct list_head                domain_head;
>         struct arm_smmu_stream          *streams;
> +       struct arm_smmu_s1_cfg          owned_s1_cfg;

I am a bit confused by this naming. If only master would own
an s1_cfg, perhaps we can just make it "s1_cfg" and drop the
s1_cfg pointer in the next patch.

Thanks
Nicolin

WARNING: multiple messages have this Message-ID (diff)
From: Nicolin Chen <nicolinc@nvidia.com>
To: Michael Shavit <mshavit@google.com>
Cc: Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	"Joerg Roedel" <joro@8bytes.org>, <jean-philippe@linaro.org>,
	<jgg@nvidia.com>, <baolu.lu@linux.intel.com>,
	<linux-arm-kernel@lists.infradead.org>, <iommu@lists.linux.dev>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v4 02/13] iommu/arm-smmu-v3: Add smmu_s1_cfg to smmu_master
Date: Wed, 12 Jul 2023 18:22:17 -0700	[thread overview]
Message-ID: <ZK9RycgNAVrxe343@Asurada-Nvidia> (raw)
In-Reply-To: <20230621063825.268890-3-mshavit@google.com>

Hi Michael,

On Wed, Jun 21, 2023 at 02:37:14PM +0800, Michael Shavit wrote:
 
> Except for Nested domains, arm_smmu_master will own the STEs that are
> inserted into the arm_smmu_device's STE table.

I think that the master still owns an STE when attached to a
nested domain. Though an IOMMU_DOMAIN_NESTED iommu_domain is
an opaque object to the STE in the guest, the host still has
a real STE for the nested configuration somewhere -- and it's
likely still to be owned by the master that's attached to the
opaque NESTED iommu_domain in the host kernel.

> -static int arm_smmu_alloc_cd_tables(struct arm_smmu_domain *smmu_domain)
> +static int arm_smmu_init_s1_cfg(struct arm_smmu_master *master,
> +                               struct arm_smmu_s1_cfg *cfg)

We here pass in an s1_cfg ptr because we expect someone else
rather than the master could own the s1_cfg?

But the final codeline by the end of this series seems that
only master owns an s1_cfg. So perhaps we could re-organize
the patches to clean this away, as the cfg always comes from
a master?

> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> index 68d519f21dbd8..053cc14c23969 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> @@ -688,6 +688,7 @@ struct arm_smmu_master {
>         struct arm_smmu_domain          *domain;
>         struct list_head                domain_head;
>         struct arm_smmu_stream          *streams;
> +       struct arm_smmu_s1_cfg          owned_s1_cfg;

I am a bit confused by this naming. If only master would own
an s1_cfg, perhaps we can just make it "s1_cfg" and drop the
s1_cfg pointer in the next patch.

Thanks
Nicolin

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  reply	other threads:[~2023-07-13  1:22 UTC|newest]

Thread overview: 104+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-21  6:37 [PATCH v4 00/13] Add PASID support to SMMUv3 unmanaged domains Michael Shavit
2023-06-21  6:37 ` Michael Shavit
2023-06-21  6:37 ` [PATCH v4 01/13] iommu/arm-smmu-v3: Move ctx_desc out of s1_cfg Michael Shavit
2023-06-21  6:37   ` Michael Shavit
2023-06-21  6:37 ` [PATCH v4 02/13] iommu/arm-smmu-v3: Add smmu_s1_cfg to smmu_master Michael Shavit
2023-06-21  6:37   ` Michael Shavit
2023-07-13  1:22   ` Nicolin Chen [this message]
2023-07-13  1:22     ` Nicolin Chen
2023-07-13  8:34     ` Michael Shavit
2023-07-13  8:34       ` Michael Shavit
2023-07-13 14:29       ` Jason Gunthorpe
2023-07-13 14:29         ` Jason Gunthorpe
2023-07-13 16:16         ` Michael Shavit
2023-07-13 16:16           ` Michael Shavit
2023-07-13 16:34           ` Michael Shavit
2023-07-13 16:34             ` Michael Shavit
2023-07-13 16:41           ` Jason Gunthorpe
2023-07-13 16:41             ` Jason Gunthorpe
2023-07-13 19:54             ` Nicolin Chen
2023-07-13 19:54               ` Nicolin Chen
2023-07-13 23:48               ` Jason Gunthorpe
2023-07-13 23:48                 ` Jason Gunthorpe
2023-07-14  1:14                 ` Nicolin Chen
2023-07-14  1:14                   ` Nicolin Chen
2023-07-14  1:14                   ` Nicolin Chen
2023-07-14  9:12                   ` Michael Shavit
2023-07-14  9:12                     ` Michael Shavit
2023-07-14 11:58                     ` Will Deacon
2023-07-14 11:58                       ` Will Deacon
2023-07-14 12:50                     ` Jason Gunthorpe
2023-07-14 12:50                       ` Jason Gunthorpe
2023-07-14  8:02             ` Michael Shavit
2023-07-14  8:02               ` Michael Shavit
2023-07-14 13:21               ` Jason Gunthorpe
2023-07-14 13:21                 ` Jason Gunthorpe
2023-07-17 10:06                 ` Michael Shavit
2023-07-17 10:06                   ` Michael Shavit
2023-07-17 12:29                   ` Jason Gunthorpe
2023-07-17 12:29                     ` Jason Gunthorpe
2023-07-18  8:56                     ` Michael Shavit
2023-07-18  8:56                       ` Michael Shavit
2023-07-27 11:22                       ` Michael Shavit
2023-07-27 11:22                         ` Michael Shavit
2023-07-27 11:54                         ` Jason Gunthorpe
2023-07-27 11:54                           ` Jason Gunthorpe
2023-07-27 14:04                           ` Michael Shavit
2023-07-27 14:04                             ` Michael Shavit
2023-07-27 14:21                             ` Jason Gunthorpe
2023-07-27 14:21                               ` Jason Gunthorpe
2023-06-21  6:37 ` [PATCH v4 03/13] iommu/arm-smmu-v3: Refactor write_strtab_ent Michael Shavit
2023-06-21  6:37   ` Michael Shavit
2023-07-13  1:41   ` Nicolin Chen
2023-07-13  1:41     ` Nicolin Chen
2023-06-21  6:37 ` [PATCH v4 04/13] iommu/arm-smmu-v3: Refactor write_ctx_desc Michael Shavit
2023-06-21  6:37   ` Michael Shavit
2023-06-21  6:37 ` [PATCH v4 05/13] iommu/arm-smmu-v3: Use the master-owned s1_cfg Michael Shavit
2023-06-21  6:37   ` Michael Shavit
2023-07-13  1:57   ` Nicolin Chen
2023-07-13  1:57     ` Nicolin Chen
2023-07-13  4:25     ` Nicolin Chen
2023-07-13  4:25       ` Nicolin Chen
2023-06-21  6:37 ` [PATCH v4 06/13] iommu/arm-smmu-v3: Simplify arm_smmu_enable_ats Michael Shavit
2023-06-21  6:37   ` Michael Shavit
2023-06-21  6:37 ` [PATCH v4 07/13] iommu/arm-smmu-v3: Keep track of attached ssids Michael Shavit
2023-06-21  6:37   ` Michael Shavit
2023-07-13  2:09   ` Nicolin Chen
2023-07-13  2:09     ` Nicolin Chen
2023-07-21  6:48     ` Michael Shavit
2023-07-21  6:48       ` Michael Shavit
2023-07-27  4:44       ` Nicolin Chen
2023-07-27  4:44         ` Nicolin Chen
2023-07-13  4:45   ` Nicolin Chen
2023-07-13  4:45     ` Nicolin Chen
2023-07-14  9:30     ` Michael Shavit
2023-07-14  9:30       ` Michael Shavit
2023-07-15  0:35       ` Nicolin Chen
2023-07-15  0:35         ` Nicolin Chen
2023-07-15  0:35         ` Nicolin Chen
2023-07-18  8:51         ` Michael Shavit
2023-07-18  8:51           ` Michael Shavit
2023-06-21  6:37 ` [PATCH v4 08/13] iommu/arm-smmu-v3: Add helper for atc invalidation Michael Shavit
2023-06-21  6:37   ` Michael Shavit
2023-06-21  6:37 ` [PATCH v4 09/13] iommu/arm-smmu-v3: Implement set_dev_pasid Michael Shavit
2023-06-21  6:37   ` Michael Shavit
2023-06-23  0:32   ` Nicolin Chen
2023-06-23  0:32     ` Nicolin Chen
2023-06-26  2:33     ` Michael Shavit
2023-06-26  2:33       ` Michael Shavit
2023-06-26 18:14       ` Nicolin Chen
2023-06-26 18:14         ` Nicolin Chen
2023-06-28 13:36         ` Michael Shavit
2023-06-28 13:36           ` Michael Shavit
2023-07-13  8:44   ` Michael Shavit
2023-07-13  8:44     ` Michael Shavit
2023-06-21  6:37 ` [PATCH v4 10/13] iommu/arm-smmu-v3-sva: Remove bond refcount Michael Shavit
2023-06-21  6:37   ` Michael Shavit
2023-06-21  6:37 ` [PATCH v4 11/13] iommu/arm-smmu-v3-sva: Clean unused iommu_sva Michael Shavit
2023-06-21  6:37   ` Michael Shavit
2023-06-21  6:37 ` [PATCH v4 12/13] iommu/arm-smmu-v3-sva: Remove arm_smmu_bond Michael Shavit
2023-06-21  6:37   ` Michael Shavit
2023-07-13  8:41   ` Michael Shavit
2023-07-13  8:41     ` Michael Shavit
2023-06-21  6:37 ` [PATCH v4 13/13] iommu/arm-smmu-v3-sva: Add check when enabling sva Michael Shavit
2023-06-21  6:37   ` Michael Shavit

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