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From: Jason Gunthorpe <jgg@nvidia.com>
To: Michael Shavit <mshavit@google.com>
Cc: Nicolin Chen <nicolinc@nvidia.com>, Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Joerg Roedel <joro@8bytes.org>,
	jean-philippe@linaro.org, baolu.lu@linux.intel.com,
	linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 02/13] iommu/arm-smmu-v3: Add smmu_s1_cfg to smmu_master
Date: Thu, 27 Jul 2023 08:54:06 -0300	[thread overview]
Message-ID: <ZMJa3kGHD2iE0/za@nvidia.com> (raw)
In-Reply-To: <CAKHBV26sRpFJv8-_f4n2jsTKiOgnHF0_FZ07KBbVaueX+T2kWA@mail.gmail.com>

On Thu, Jul 27, 2023 at 07:22:05PM +0800, Michael Shavit wrote:
> Sorry for the delay; I'm trying to refactor these patches now.
> 
> > I think the master should have a pointer to the iommu_domain that owns
> > the STE or if NULL the master should assign its internal CD table to
> > the STE.
> Just to clarify, does the nested domain patch series require writing
> CDs into the user-space's CD table using arm_smmu_write_ctx_desc()?

No, CD entries in nested CD tables are written by userspace only.

> Or is there any other requirement for writing a CD into a
> domain-owned CD table from arm_smmu_write_ctx_desc?

Not that I know of.

The only time the kernel writes a CD entry is to the shared CD table
stored in the master.

> 1. The CD entries STALL bit value in arm_smmu_write_ctx_desc depends
> on the master (e.g. if STALL_FORCE is set on the smmu device). This
> could potentially be encoded in arm_smmu_ctx_desc_cfg, at which point
> that CD table is only attachable to masters with the same
> stall_enabled value.

For cleanness I would orgnize it like this.

> 2. arm_smmu_write_ctx_desc must sync the CD for the attached master(s)
> in the middle of writing CD entry.
>
> This is all easier to handle in arm_smmu_write_ctx_desc if the table
> is always owned by the master.

I think it is fine if you start with a shared CD table being 1:1 with
a single master.

Making the CD table shared between masters (eg for multi-device-group)
is a micro-optimization, and I'm not sure we have workloads where it
is worthwhile. We already block PASID support for multi-device-group.

Though resizable CD table is probably a better place to put efforts.

Jason

WARNING: multiple messages have this Message-ID (diff)
From: Jason Gunthorpe <jgg@nvidia.com>
To: Michael Shavit <mshavit@google.com>
Cc: Nicolin Chen <nicolinc@nvidia.com>, Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Joerg Roedel <joro@8bytes.org>,
	jean-philippe@linaro.org, baolu.lu@linux.intel.com,
	linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 02/13] iommu/arm-smmu-v3: Add smmu_s1_cfg to smmu_master
Date: Thu, 27 Jul 2023 08:54:06 -0300	[thread overview]
Message-ID: <ZMJa3kGHD2iE0/za@nvidia.com> (raw)
In-Reply-To: <CAKHBV26sRpFJv8-_f4n2jsTKiOgnHF0_FZ07KBbVaueX+T2kWA@mail.gmail.com>

On Thu, Jul 27, 2023 at 07:22:05PM +0800, Michael Shavit wrote:
> Sorry for the delay; I'm trying to refactor these patches now.
> 
> > I think the master should have a pointer to the iommu_domain that owns
> > the STE or if NULL the master should assign its internal CD table to
> > the STE.
> Just to clarify, does the nested domain patch series require writing
> CDs into the user-space's CD table using arm_smmu_write_ctx_desc()?

No, CD entries in nested CD tables are written by userspace only.

> Or is there any other requirement for writing a CD into a
> domain-owned CD table from arm_smmu_write_ctx_desc?

Not that I know of.

The only time the kernel writes a CD entry is to the shared CD table
stored in the master.

> 1. The CD entries STALL bit value in arm_smmu_write_ctx_desc depends
> on the master (e.g. if STALL_FORCE is set on the smmu device). This
> could potentially be encoded in arm_smmu_ctx_desc_cfg, at which point
> that CD table is only attachable to masters with the same
> stall_enabled value.

For cleanness I would orgnize it like this.

> 2. arm_smmu_write_ctx_desc must sync the CD for the attached master(s)
> in the middle of writing CD entry.
>
> This is all easier to handle in arm_smmu_write_ctx_desc if the table
> is always owned by the master.

I think it is fine if you start with a shared CD table being 1:1 with
a single master.

Making the CD table shared between masters (eg for multi-device-group)
is a micro-optimization, and I'm not sure we have workloads where it
is worthwhile. We already block PASID support for multi-device-group.

Though resizable CD table is probably a better place to put efforts.

Jason

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  reply	other threads:[~2023-07-27 11:54 UTC|newest]

Thread overview: 104+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-21  6:37 [PATCH v4 00/13] Add PASID support to SMMUv3 unmanaged domains Michael Shavit
2023-06-21  6:37 ` Michael Shavit
2023-06-21  6:37 ` [PATCH v4 01/13] iommu/arm-smmu-v3: Move ctx_desc out of s1_cfg Michael Shavit
2023-06-21  6:37   ` Michael Shavit
2023-06-21  6:37 ` [PATCH v4 02/13] iommu/arm-smmu-v3: Add smmu_s1_cfg to smmu_master Michael Shavit
2023-06-21  6:37   ` Michael Shavit
2023-07-13  1:22   ` Nicolin Chen
2023-07-13  1:22     ` Nicolin Chen
2023-07-13  8:34     ` Michael Shavit
2023-07-13  8:34       ` Michael Shavit
2023-07-13 14:29       ` Jason Gunthorpe
2023-07-13 14:29         ` Jason Gunthorpe
2023-07-13 16:16         ` Michael Shavit
2023-07-13 16:16           ` Michael Shavit
2023-07-13 16:34           ` Michael Shavit
2023-07-13 16:34             ` Michael Shavit
2023-07-13 16:41           ` Jason Gunthorpe
2023-07-13 16:41             ` Jason Gunthorpe
2023-07-13 19:54             ` Nicolin Chen
2023-07-13 19:54               ` Nicolin Chen
2023-07-13 23:48               ` Jason Gunthorpe
2023-07-13 23:48                 ` Jason Gunthorpe
2023-07-14  1:14                 ` Nicolin Chen
2023-07-14  1:14                   ` Nicolin Chen
2023-07-14  1:14                   ` Nicolin Chen
2023-07-14  9:12                   ` Michael Shavit
2023-07-14  9:12                     ` Michael Shavit
2023-07-14 11:58                     ` Will Deacon
2023-07-14 11:58                       ` Will Deacon
2023-07-14 12:50                     ` Jason Gunthorpe
2023-07-14 12:50                       ` Jason Gunthorpe
2023-07-14  8:02             ` Michael Shavit
2023-07-14  8:02               ` Michael Shavit
2023-07-14 13:21               ` Jason Gunthorpe
2023-07-14 13:21                 ` Jason Gunthorpe
2023-07-17 10:06                 ` Michael Shavit
2023-07-17 10:06                   ` Michael Shavit
2023-07-17 12:29                   ` Jason Gunthorpe
2023-07-17 12:29                     ` Jason Gunthorpe
2023-07-18  8:56                     ` Michael Shavit
2023-07-18  8:56                       ` Michael Shavit
2023-07-27 11:22                       ` Michael Shavit
2023-07-27 11:22                         ` Michael Shavit
2023-07-27 11:54                         ` Jason Gunthorpe [this message]
2023-07-27 11:54                           ` Jason Gunthorpe
2023-07-27 14:04                           ` Michael Shavit
2023-07-27 14:04                             ` Michael Shavit
2023-07-27 14:21                             ` Jason Gunthorpe
2023-07-27 14:21                               ` Jason Gunthorpe
2023-06-21  6:37 ` [PATCH v4 03/13] iommu/arm-smmu-v3: Refactor write_strtab_ent Michael Shavit
2023-06-21  6:37   ` Michael Shavit
2023-07-13  1:41   ` Nicolin Chen
2023-07-13  1:41     ` Nicolin Chen
2023-06-21  6:37 ` [PATCH v4 04/13] iommu/arm-smmu-v3: Refactor write_ctx_desc Michael Shavit
2023-06-21  6:37   ` Michael Shavit
2023-06-21  6:37 ` [PATCH v4 05/13] iommu/arm-smmu-v3: Use the master-owned s1_cfg Michael Shavit
2023-06-21  6:37   ` Michael Shavit
2023-07-13  1:57   ` Nicolin Chen
2023-07-13  1:57     ` Nicolin Chen
2023-07-13  4:25     ` Nicolin Chen
2023-07-13  4:25       ` Nicolin Chen
2023-06-21  6:37 ` [PATCH v4 06/13] iommu/arm-smmu-v3: Simplify arm_smmu_enable_ats Michael Shavit
2023-06-21  6:37   ` Michael Shavit
2023-06-21  6:37 ` [PATCH v4 07/13] iommu/arm-smmu-v3: Keep track of attached ssids Michael Shavit
2023-06-21  6:37   ` Michael Shavit
2023-07-13  2:09   ` Nicolin Chen
2023-07-13  2:09     ` Nicolin Chen
2023-07-21  6:48     ` Michael Shavit
2023-07-21  6:48       ` Michael Shavit
2023-07-27  4:44       ` Nicolin Chen
2023-07-27  4:44         ` Nicolin Chen
2023-07-13  4:45   ` Nicolin Chen
2023-07-13  4:45     ` Nicolin Chen
2023-07-14  9:30     ` Michael Shavit
2023-07-14  9:30       ` Michael Shavit
2023-07-15  0:35       ` Nicolin Chen
2023-07-15  0:35         ` Nicolin Chen
2023-07-15  0:35         ` Nicolin Chen
2023-07-18  8:51         ` Michael Shavit
2023-07-18  8:51           ` Michael Shavit
2023-06-21  6:37 ` [PATCH v4 08/13] iommu/arm-smmu-v3: Add helper for atc invalidation Michael Shavit
2023-06-21  6:37   ` Michael Shavit
2023-06-21  6:37 ` [PATCH v4 09/13] iommu/arm-smmu-v3: Implement set_dev_pasid Michael Shavit
2023-06-21  6:37   ` Michael Shavit
2023-06-23  0:32   ` Nicolin Chen
2023-06-23  0:32     ` Nicolin Chen
2023-06-26  2:33     ` Michael Shavit
2023-06-26  2:33       ` Michael Shavit
2023-06-26 18:14       ` Nicolin Chen
2023-06-26 18:14         ` Nicolin Chen
2023-06-28 13:36         ` Michael Shavit
2023-06-28 13:36           ` Michael Shavit
2023-07-13  8:44   ` Michael Shavit
2023-07-13  8:44     ` Michael Shavit
2023-06-21  6:37 ` [PATCH v4 10/13] iommu/arm-smmu-v3-sva: Remove bond refcount Michael Shavit
2023-06-21  6:37   ` Michael Shavit
2023-06-21  6:37 ` [PATCH v4 11/13] iommu/arm-smmu-v3-sva: Clean unused iommu_sva Michael Shavit
2023-06-21  6:37   ` Michael Shavit
2023-06-21  6:37 ` [PATCH v4 12/13] iommu/arm-smmu-v3-sva: Remove arm_smmu_bond Michael Shavit
2023-06-21  6:37   ` Michael Shavit
2023-07-13  8:41   ` Michael Shavit
2023-07-13  8:41     ` Michael Shavit
2023-06-21  6:37 ` [PATCH v4 13/13] iommu/arm-smmu-v3-sva: Add check when enabling sva Michael Shavit
2023-06-21  6:37   ` Michael Shavit

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