From: "Lisovskiy, Stanislav" <stanislav.lisovskiy@intel.com>
To: "Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>
Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 05/19] drm/i915/dp: Update Bigjoiner interface bits for computing compressed bpp
Date: Tue, 25 Jul 2023 13:13:31 +0300 [thread overview]
Message-ID: <ZL+gS640uxlrzhSP@intel.com> (raw)
In-Reply-To: <65cb4383-ff7d-f7b4-29b8-4d81fbe076c7@intel.com>
On Mon, Jul 24, 2023 at 05:49:11PM +0530, Nautiyal, Ankit K wrote:
> Hi Stan,
>
> Thanks for the reviews ans suggestions. Please my response inline:
>
>
> On 7/20/2023 2:59 PM, Lisovskiy, Stanislav wrote:
> > On Thu, Jul 13, 2023 at 04:03:32PM +0530, Ankit Nautiyal wrote:
> > > In Bigjoiner check for DSC, bigjoiner interface bits for DP for
> > > DISPLAY > 13 is 36 (Bspec: 49259).
> > >
> > > v2: Corrected Display ver to 13.
> > >
> > > v3: Follow convention for conditional statement. (Ville)
> > >
> > > v4: Fix check for display ver. (Ville)
> > >
> > > Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> > > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > ---
> > > drivers/gpu/drm/i915/display/intel_dp.c | 3 ++-
> > > 1 file changed, 2 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > > index 19768ac658ba..c1fd448d80e1 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > > @@ -802,8 +802,9 @@ u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915,
> > > bits_per_pixel = min(bits_per_pixel, max_bpp_small_joiner_ram);
> > > if (bigjoiner) {
> > > + int bigjoiner_interface_bits = DISPLAY_VER(i915) >= 14 ? 36 : 24;
> > > u32 max_bpp_bigjoiner =
> > > - i915->display.cdclk.max_cdclk_freq * 48 /
> > > + i915->display.cdclk.max_cdclk_freq * 2 * bigjoiner_interface_bits /
> > Probably "num_vdsc_instances = intel_dsc_get_num_vdsc_instances(crtc_state);" again,
> > instead of "2"?
>
> Currently intel_dsc_get_num_vdsc_instances will give total number of
> vdsc_engines including joined pipes.
>
> So with bigjoiner the function will return 4.
>
> This was good to calculate Pipe BW check: (Pixel clock < PPC * CDCLK
> frequency * Number of pipes joined
>
> as we get PPC * number of pipes joined from
> intel_dsc_get_num_vdsc_instances)
>
> Or to calculate DSC_PIC_WIDTH PPS parameter.
>
> But here we perhaps need intel_dsc_get_vdsc_engines_per_pipe that will just
> return 2 if dsc_split 1 otherwise.
>
> Thanks & Regards,
>
> Ankit
Yes, I agree, unfortunately not applicable here.
May be yeah we need some function like that and then refactor
also the intel_dsc_get_num_vdsc_instances to use that one..
Stan
>
> >
> > With that clarified,
> >
> > Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> >
> > > intel_dp_mode_to_fec_clock(mode_clock);
> > > bits_per_pixel = min(bits_per_pixel, max_bpp_bigjoiner);
> > > --
> > > 2.40.1
> > >
WARNING: multiple messages have this Message-ID (diff)
From: "Lisovskiy, Stanislav" <stanislav.lisovskiy@intel.com>
To: "Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>
Cc: intel-gfx@lists.freedesktop.org, anusha.srivatsa@intel.com,
dri-devel@lists.freedesktop.org, navaremanasi@google.com
Subject: Re: [PATCH 05/19] drm/i915/dp: Update Bigjoiner interface bits for computing compressed bpp
Date: Tue, 25 Jul 2023 13:13:31 +0300 [thread overview]
Message-ID: <ZL+gS640uxlrzhSP@intel.com> (raw)
In-Reply-To: <65cb4383-ff7d-f7b4-29b8-4d81fbe076c7@intel.com>
On Mon, Jul 24, 2023 at 05:49:11PM +0530, Nautiyal, Ankit K wrote:
> Hi Stan,
>
> Thanks for the reviews ans suggestions. Please my response inline:
>
>
> On 7/20/2023 2:59 PM, Lisovskiy, Stanislav wrote:
> > On Thu, Jul 13, 2023 at 04:03:32PM +0530, Ankit Nautiyal wrote:
> > > In Bigjoiner check for DSC, bigjoiner interface bits for DP for
> > > DISPLAY > 13 is 36 (Bspec: 49259).
> > >
> > > v2: Corrected Display ver to 13.
> > >
> > > v3: Follow convention for conditional statement. (Ville)
> > >
> > > v4: Fix check for display ver. (Ville)
> > >
> > > Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> > > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > ---
> > > drivers/gpu/drm/i915/display/intel_dp.c | 3 ++-
> > > 1 file changed, 2 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > > index 19768ac658ba..c1fd448d80e1 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > > @@ -802,8 +802,9 @@ u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915,
> > > bits_per_pixel = min(bits_per_pixel, max_bpp_small_joiner_ram);
> > > if (bigjoiner) {
> > > + int bigjoiner_interface_bits = DISPLAY_VER(i915) >= 14 ? 36 : 24;
> > > u32 max_bpp_bigjoiner =
> > > - i915->display.cdclk.max_cdclk_freq * 48 /
> > > + i915->display.cdclk.max_cdclk_freq * 2 * bigjoiner_interface_bits /
> > Probably "num_vdsc_instances = intel_dsc_get_num_vdsc_instances(crtc_state);" again,
> > instead of "2"?
>
> Currently intel_dsc_get_num_vdsc_instances will give total number of
> vdsc_engines including joined pipes.
>
> So with bigjoiner the function will return 4.
>
> This was good to calculate Pipe BW check: (Pixel clock < PPC * CDCLK
> frequency * Number of pipes joined
>
> as we get PPC * number of pipes joined from
> intel_dsc_get_num_vdsc_instances)
>
> Or to calculate DSC_PIC_WIDTH PPS parameter.
>
> But here we perhaps need intel_dsc_get_vdsc_engines_per_pipe that will just
> return 2 if dsc_split 1 otherwise.
>
> Thanks & Regards,
>
> Ankit
Yes, I agree, unfortunately not applicable here.
May be yeah we need some function like that and then refactor
also the intel_dsc_get_num_vdsc_instances to use that one..
Stan
>
> >
> > With that clarified,
> >
> > Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> >
> > > intel_dp_mode_to_fec_clock(mode_clock);
> > > bits_per_pixel = min(bits_per_pixel, max_bpp_bigjoiner);
> > > --
> > > 2.40.1
> > >
next prev parent reply other threads:[~2023-07-25 10:13 UTC|newest]
Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-13 10:33 [Intel-gfx] [PATCH 00/19] DSC misc fixes Ankit Nautiyal
2023-07-13 10:33 ` Ankit Nautiyal
2023-07-13 10:33 ` [Intel-gfx] [PATCH 01/19] drm/i915/dp: Consider output_format while computing dsc bpp Ankit Nautiyal
2023-07-13 10:33 ` Ankit Nautiyal
2023-07-13 10:33 ` [Intel-gfx] [PATCH 02/19] drm/i915/dp: Move compressed bpp check with 420 format inside the helper Ankit Nautiyal
2023-07-13 10:33 ` Ankit Nautiyal
2023-07-14 3:23 ` [Intel-gfx] " Murthy, Arun R
2023-07-14 3:23 ` Murthy, Arun R
2023-07-13 10:33 ` [Intel-gfx] [PATCH 03/19] drm/i915/dp_mst: Use output_format to get the final link bpp Ankit Nautiyal
2023-07-13 10:33 ` Ankit Nautiyal
2023-07-13 10:33 ` [Intel-gfx] [PATCH 04/19] drm/i915/dp: Use consistent name for link bpp and compressed bpp Ankit Nautiyal
2023-07-13 10:33 ` Ankit Nautiyal
2023-07-13 10:33 ` [Intel-gfx] [PATCH 05/19] drm/i915/dp: Update Bigjoiner interface bits for computing " Ankit Nautiyal
2023-07-13 10:33 ` Ankit Nautiyal
2023-07-20 9:29 ` [Intel-gfx] " Lisovskiy, Stanislav
2023-07-20 9:29 ` Lisovskiy, Stanislav
2023-07-24 12:19 ` [Intel-gfx] " Nautiyal, Ankit K
2023-07-24 12:19 ` Nautiyal, Ankit K
2023-07-25 10:13 ` Lisovskiy, Stanislav [this message]
2023-07-25 10:13 ` Lisovskiy, Stanislav
2023-07-25 11:19 ` [Intel-gfx] " Nautiyal, Ankit K
2023-07-25 11:19 ` Nautiyal, Ankit K
2023-07-28 4:18 ` [Intel-gfx] " Nautiyal, Ankit K
2023-07-28 4:18 ` Nautiyal, Ankit K
2023-07-13 10:33 ` [Intel-gfx] [PATCH 06/19] drm/i915/display: Account for DSC not split case while computing cdclk Ankit Nautiyal
2023-07-13 10:33 ` Ankit Nautiyal
2023-07-20 9:16 ` [Intel-gfx] " Lisovskiy, Stanislav
2023-07-20 9:16 ` Lisovskiy, Stanislav
2023-07-25 5:52 ` [Intel-gfx] " Nautiyal, Ankit K
2023-07-25 5:52 ` Nautiyal, Ankit K
2023-07-25 10:10 ` [Intel-gfx] " Lisovskiy, Stanislav
2023-07-25 10:10 ` Lisovskiy, Stanislav
2023-07-25 11:22 ` [Intel-gfx] " Nautiyal, Ankit K
2023-07-25 11:22 ` Nautiyal, Ankit K
2023-07-13 10:33 ` [Intel-gfx] [PATCH 07/19] drm/i915/intel_cdclk: Add vdsc with bigjoiner constraints on min_cdlck Ankit Nautiyal
2023-07-13 10:33 ` Ankit Nautiyal
2023-07-20 9:24 ` [Intel-gfx] " Lisovskiy, Stanislav
2023-07-20 9:24 ` Lisovskiy, Stanislav
2023-07-25 6:01 ` [Intel-gfx] " Nautiyal, Ankit K
2023-07-25 6:01 ` Nautiyal, Ankit K
2023-07-13 10:33 ` [Intel-gfx] [PATCH 08/19] drm/i915/dp: Remove extra logs for printing DSC info Ankit Nautiyal
2023-07-13 10:33 ` Ankit Nautiyal
2023-07-14 3:28 ` [Intel-gfx] " Murthy, Arun R
2023-07-14 3:28 ` Murthy, Arun R
2023-07-13 10:33 ` [Intel-gfx] [PATCH 09/19] drm/display/dp: Fix the DP DSC Receiver cap size Ankit Nautiyal
2023-07-13 10:33 ` Ankit Nautiyal
2023-07-13 10:33 ` [Intel-gfx] [PATCH 10/19] drm/i915/dp: Avoid forcing DSC BPC for MST case Ankit Nautiyal
2023-07-13 10:33 ` Ankit Nautiyal
2023-07-13 10:33 ` [Intel-gfx] [PATCH 11/19] drm/i915/dp: Add functions to get min/max src input bpc with DSC Ankit Nautiyal
2023-07-13 10:33 ` Ankit Nautiyal
2023-07-13 10:33 ` [Intel-gfx] [PATCH 12/19] drm/i915/dp: Check min bpc DSC limits for dsc_force_bpc also Ankit Nautiyal
2023-07-13 10:33 ` Ankit Nautiyal
2023-07-13 10:33 ` [Intel-gfx] [PATCH 13/19] drm/i915/dp: Avoid left shift of DSC output bpp by 4 Ankit Nautiyal
2023-07-13 10:33 ` Ankit Nautiyal
2023-07-20 9:31 ` [Intel-gfx] " Lisovskiy, Stanislav
2023-07-20 9:31 ` Lisovskiy, Stanislav
2023-07-13 10:33 ` [Intel-gfx] [PATCH 14/19] drm/i915/dp: Rename helper to get DSC max pipe_bpp Ankit Nautiyal
2023-07-13 10:33 ` Ankit Nautiyal
2023-07-13 10:33 ` [Intel-gfx] [PATCH 15/19] drm/i915/dp: Separate out functions for edp/DP for computing DSC bpp Ankit Nautiyal
2023-07-13 10:33 ` Ankit Nautiyal
2023-07-13 10:33 ` [Intel-gfx] [PATCH 16/19] drm/i915/dp: Add DSC BPC/BPP constraints while selecting pipe bpp with DSC Ankit Nautiyal
2023-07-13 10:33 ` Ankit Nautiyal
2023-07-13 10:33 ` [Intel-gfx] [PATCH 17/19] drm/i915/dp: Separate out function to get compressed bpp with joiner Ankit Nautiyal
2023-07-13 10:33 ` Ankit Nautiyal
2023-07-13 10:33 ` [Intel-gfx] [PATCH 18/19] drm/i915/dp: Get optimal link config to have best compressed bpp Ankit Nautiyal
2023-07-13 10:33 ` Ankit Nautiyal
2023-07-13 10:33 ` [Intel-gfx] [PATCH 19/19] drm/i915: Query compressed bpp properly using correct DPCD and DP Spec info Ankit Nautiyal
2023-07-13 10:33 ` Ankit Nautiyal
2023-07-13 11:56 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for DSC misc fixes (rev4) Patchwork
2023-07-13 12:07 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-07-13 15:14 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2023-06-30 12:46 [Intel-gfx] [PATCH 00/19] DSC misc fixes Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 05/19] drm/i915/dp: Update Bigjoiner interface bits for computing compressed bpp Ankit Nautiyal
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