Re: [Intel-gfx] [PATCH 13/19] drm/i915/dp: Avoid left shift of DSC output bpp by 4

["Lisovskiy, Stanislav" <stanislav.lisovskiy@intel.com>]

On Thu, Jul 13, 2023 at 04:03:40PM +0530, Ankit Nautiyal wrote:
> To make way for fractional bpp support, avoid left shifting the
> output_bpp by 4 in helper intel_dp_dsc_get_output_bpp.
> 
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c     | 10 +++-------
>  drivers/gpu/drm/i915/display/intel_dp_mst.c |  2 +-
>  2 files changed, 4 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 9d2d05da594b..a7d58eb914c6 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -812,11 +812,7 @@ u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915,
>  
>  	bits_per_pixel = intel_dp_dsc_nearest_valid_bpp(i915, bits_per_pixel, pipe_bpp);
>  
> -	/*
> -	 * Compressed BPP in U6.4 format so multiply by 16, for Gen 11,
> -	 * fractional part is 0
> -	 */
> -	return bits_per_pixel << 4;
> +	return bits_per_pixel;
>  }
>  
>  u8 intel_dp_dsc_get_slice_count(struct intel_dp *intel_dp,
> @@ -1206,7 +1202,7 @@ intel_dp_mode_valid(struct drm_connector *_connector,
>  								    mode->hdisplay,
>  								    bigjoiner,
>  								    output_format,
> -								    pipe_bpp, 64) >> 4;
> +								    pipe_bpp, 64);
>  			dsc_slice_count =
>  				intel_dp_dsc_get_slice_count(intel_dp,
>  							     target_clock,
> @@ -1812,7 +1808,7 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
>  							     pipe_config->pipe_bpp);
>  
>  			pipe_config->dsc.compressed_bpp = min_t(u16,
> -								dsc_max_compressed_bpp >> 4,
> +								dsc_max_compressed_bpp,
>  								output_bpp);
>  		}
>  		pipe_config->dsc.slice_count = dsc_dp_slice_count;
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index dff4717edbd0..4895d6242915 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -982,7 +982,7 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector,
>  								    mode->hdisplay,
>  								    bigjoiner,
>  								    INTEL_OUTPUT_FORMAT_RGB,
> -								    pipe_bpp, 64) >> 4;
> +								    pipe_bpp, 64);

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>

>  			dsc_slice_count =
>  				intel_dp_dsc_get_slice_count(intel_dp,
>  							     target_clock,
> -- 
> 2.40.1
>