From: Charlie Jenkins <charlie@rivosinc.com>
To: Conor Dooley <conor.dooley@microchip.com>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
bpf@vger.kernel.org, "Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Peter Zijlstra" <peterz@infradead.org>,
"Josh Poimboeuf" <jpoimboe@kernel.org>,
"Jason Baron" <jbaron@akamai.com>,
"Steven Rostedt" <rostedt@goodmis.org>,
"Ard Biesheuvel" <ardb@kernel.org>,
"Anup Patel" <anup@brainfault.org>,
"Atish Patra" <atishp@atishpatra.org>,
"Alexei Starovoitov" <ast@kernel.org>,
"Daniel Borkmann" <daniel@iogearbox.net>,
"Andrii Nakryiko" <andrii@kernel.org>,
"Martin KaFai Lau" <martin.lau@linux.dev>,
"Song Liu" <song@kernel.org>, "Yonghong Song" <yhs@fb.com>,
"John Fastabend" <john.fastabend@gmail.com>,
"KP Singh" <kpsingh@kernel.org>,
"Stanislav Fomichev" <sdf@google.com>,
"Hao Luo" <haoluo@google.com>, "Jiri Olsa" <jolsa@kernel.org>,
"Björn Töpel" <bjorn@kernel.org>,
"Luke Nelson" <luke.r.nels@gmail.com>,
"Xi Wang" <xi.wang@gmail.com>, "Nam Cao" <namcaov@gmail.com>
Subject: Re: [PATCH 01/10] RISC-V: Expand instruction definitions
Date: Fri, 4 Aug 2023 10:26:32 -0700 [thread overview]
Message-ID: <ZM00yFKcDczO50lJ@ghost> (raw)
In-Reply-To: <20230804-barterer-heritage-ed191081bc47@wendy>
On Fri, Aug 04, 2023 at 08:59:24AM +0100, Conor Dooley wrote:
> On Thu, Aug 03, 2023 at 07:10:26PM -0700, Charlie Jenkins wrote:
> > There are many systems across the kernel that rely on directly creating
> > and modifying instructions. In order to unify them, create shared
> > definitions for instructions and registers.
> >
> > Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
> > ---
> > arch/riscv/include/asm/insn.h | 2742 +++++++++++++++++++++++++++---
>
> "I did a lot of copy-pasting from the RISC-V spec"
>
> How is anyone supposed to cross check this when there's 1000s of lines
> of a diff here? We've had some subtle bugs in some of the definitions in
> the past, so I would like to be able to check at this opportune moment
> that things are correct.
>
> > arch/riscv/include/asm/reg.h | 88 +
> > arch/riscv/kernel/kgdb.c | 4 +-
> > arch/riscv/kernel/probes/simulate-insn.c | 39 +-
> > arch/riscv/kernel/vector.c | 2 +-
>
> You need to at least split this up. I doubt a 2742 change diff for
> insn.h was required to make the changes in these 4 files.
Yeah it is kind of a nightmare to look at, I will split it up.
>
> Then after that, it would be so much easier to reason about these
> changes if the additions to insn.h happened at the same time as the
> removals from the affected locations.
>
> I would probably split this so that things are done in more stages,
> with the larger patches split between changes that require no new
> definitions and changes that require moving things to insn.h
>
> > 5 files changed, 2629 insertions(+), 246 deletions(-)
>
> What you would want to see if this arrived in your inbox as a reviewer?
>
> Don't get me wrong, I do like what you are doing here, the BPF JIT
> especially is filled with "uhh okay, I guess those offsets are right",
> so I don't mean to be discouraging.
>
> Thanks,
> Conor.
WARNING: multiple messages have this Message-ID (diff)
From: Charlie Jenkins <charlie@rivosinc.com>
To: kvm-riscv@lists.infradead.org
Subject: [PATCH 01/10] RISC-V: Expand instruction definitions
Date: Fri, 4 Aug 2023 10:26:32 -0700 [thread overview]
Message-ID: <ZM00yFKcDczO50lJ@ghost> (raw)
In-Reply-To: <20230804-barterer-heritage-ed191081bc47@wendy>
On Fri, Aug 04, 2023 at 08:59:24AM +0100, Conor Dooley wrote:
> On Thu, Aug 03, 2023 at 07:10:26PM -0700, Charlie Jenkins wrote:
> > There are many systems across the kernel that rely on directly creating
> > and modifying instructions. In order to unify them, create shared
> > definitions for instructions and registers.
> >
> > Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
> > ---
> > arch/riscv/include/asm/insn.h | 2742 +++++++++++++++++++++++++++---
>
> "I did a lot of copy-pasting from the RISC-V spec"
>
> How is anyone supposed to cross check this when there's 1000s of lines
> of a diff here? We've had some subtle bugs in some of the definitions in
> the past, so I would like to be able to check at this opportune moment
> that things are correct.
>
> > arch/riscv/include/asm/reg.h | 88 +
> > arch/riscv/kernel/kgdb.c | 4 +-
> > arch/riscv/kernel/probes/simulate-insn.c | 39 +-
> > arch/riscv/kernel/vector.c | 2 +-
>
> You need to at least split this up. I doubt a 2742 change diff for
> insn.h was required to make the changes in these 4 files.
Yeah it is kind of a nightmare to look at, I will split it up.
>
> Then after that, it would be so much easier to reason about these
> changes if the additions to insn.h happened at the same time as the
> removals from the affected locations.
>
> I would probably split this so that things are done in more stages,
> with the larger patches split between changes that require no new
> definitions and changes that require moving things to insn.h
>
> > 5 files changed, 2629 insertions(+), 246 deletions(-)
>
> What you would want to see if this arrived in your inbox as a reviewer?
>
> Don't get me wrong, I do like what you are doing here, the BPF JIT
> especially is filled with "uhh okay, I guess those offsets are right",
> so I don't mean to be discouraging.
>
> Thanks,
> Conor.
WARNING: multiple messages have this Message-ID (diff)
From: Charlie Jenkins <charlie@rivosinc.com>
To: Conor Dooley <conor.dooley@microchip.com>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
bpf@vger.kernel.org, "Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Peter Zijlstra" <peterz@infradead.org>,
"Josh Poimboeuf" <jpoimboe@kernel.org>,
"Jason Baron" <jbaron@akamai.com>,
"Steven Rostedt" <rostedt@goodmis.org>,
"Ard Biesheuvel" <ardb@kernel.org>,
"Anup Patel" <anup@brainfault.org>,
"Atish Patra" <atishp@atishpatra.org>,
"Alexei Starovoitov" <ast@kernel.org>,
"Daniel Borkmann" <daniel@iogearbox.net>,
"Andrii Nakryiko" <andrii@kernel.org>,
"Martin KaFai Lau" <martin.lau@linux.dev>,
"Song Liu" <song@kernel.org>, "Yonghong Song" <yhs@fb.com>,
"John Fastabend" <john.fastabend@gmail.com>,
"KP Singh" <kpsingh@kernel.org>,
"Stanislav Fomichev" <sdf@google.com>,
"Hao Luo" <haoluo@google.com>, "Jiri Olsa" <jolsa@kernel.org>,
"Björn Töpel" <bjorn@kernel.org>,
"Luke Nelson" <luke.r.nels@gmail.com>,
"Xi Wang" <xi.wang@gmail.com>, "Nam Cao" <namcaov@gmail.com>
Subject: Re: [PATCH 01/10] RISC-V: Expand instruction definitions
Date: Fri, 4 Aug 2023 10:26:32 -0700 [thread overview]
Message-ID: <ZM00yFKcDczO50lJ@ghost> (raw)
In-Reply-To: <20230804-barterer-heritage-ed191081bc47@wendy>
On Fri, Aug 04, 2023 at 08:59:24AM +0100, Conor Dooley wrote:
> On Thu, Aug 03, 2023 at 07:10:26PM -0700, Charlie Jenkins wrote:
> > There are many systems across the kernel that rely on directly creating
> > and modifying instructions. In order to unify them, create shared
> > definitions for instructions and registers.
> >
> > Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
> > ---
> > arch/riscv/include/asm/insn.h | 2742 +++++++++++++++++++++++++++---
>
> "I did a lot of copy-pasting from the RISC-V spec"
>
> How is anyone supposed to cross check this when there's 1000s of lines
> of a diff here? We've had some subtle bugs in some of the definitions in
> the past, so I would like to be able to check at this opportune moment
> that things are correct.
>
> > arch/riscv/include/asm/reg.h | 88 +
> > arch/riscv/kernel/kgdb.c | 4 +-
> > arch/riscv/kernel/probes/simulate-insn.c | 39 +-
> > arch/riscv/kernel/vector.c | 2 +-
>
> You need to at least split this up. I doubt a 2742 change diff for
> insn.h was required to make the changes in these 4 files.
Yeah it is kind of a nightmare to look at, I will split it up.
>
> Then after that, it would be so much easier to reason about these
> changes if the additions to insn.h happened at the same time as the
> removals from the affected locations.
>
> I would probably split this so that things are done in more stages,
> with the larger patches split between changes that require no new
> definitions and changes that require moving things to insn.h
>
> > 5 files changed, 2629 insertions(+), 246 deletions(-)
>
> What you would want to see if this arrived in your inbox as a reviewer?
>
> Don't get me wrong, I do like what you are doing here, the BPF JIT
> especially is filled with "uhh okay, I guess those offsets are right",
> so I don't mean to be discouraging.
>
> Thanks,
> Conor.
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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2023-08-04 17:26 UTC|newest]
Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-04 2:10 [PATCH 00/10] RISC-V: Refactor instructions Charlie Jenkins
2023-08-04 2:10 ` Charlie Jenkins
2023-08-04 2:10 ` Charlie Jenkins
2023-08-04 2:10 ` [PATCH 01/10] RISC-V: Expand instruction definitions Charlie Jenkins
2023-08-04 2:10 ` Charlie Jenkins
2023-08-04 2:10 ` Charlie Jenkins
2023-08-04 7:59 ` Conor Dooley
2023-08-04 7:59 ` Conor Dooley
2023-08-04 7:59 ` Conor Dooley
2023-08-04 17:26 ` Charlie Jenkins [this message]
2023-08-04 17:26 ` Charlie Jenkins
2023-08-04 17:26 ` Charlie Jenkins
2023-08-04 2:10 ` [PATCH 02/10] RISC-V: vector: Refactor instructions Charlie Jenkins
2023-08-04 2:10 ` Charlie Jenkins
2023-08-04 2:10 ` Charlie Jenkins
2023-08-04 2:10 ` [PATCH 03/10] RISC-V: Refactor jump label instructions Charlie Jenkins
2023-08-04 2:10 ` Charlie Jenkins
2023-08-04 2:10 ` Charlie Jenkins
2023-08-04 2:10 ` [PATCH 04/10] RISC-V: KGDB: Refactor instructions Charlie Jenkins
2023-08-04 2:10 ` Charlie Jenkins
2023-08-04 2:10 ` Charlie Jenkins
2023-08-04 2:10 ` [PATCH 05/10] RISC-V: module: " Charlie Jenkins
2023-08-04 2:10 ` Charlie Jenkins
2023-08-04 2:10 ` Charlie Jenkins
2023-08-04 2:10 ` [PATCH 06/10] RISC-V: Refactor patch instructions Charlie Jenkins
2023-08-04 2:10 ` Charlie Jenkins
2023-08-04 2:10 ` Charlie Jenkins
2023-08-04 2:10 ` [PATCH 07/10] RISC-V: nommu: Refactor instructions Charlie Jenkins
2023-08-04 2:10 ` Charlie Jenkins
2023-08-04 2:10 ` Charlie Jenkins
2023-08-04 2:10 ` [PATCH 08/10] RISC-V: kvm: " Charlie Jenkins
2023-08-04 2:10 ` Charlie Jenkins
2023-08-04 2:10 ` Charlie Jenkins
2023-08-04 2:10 ` [PATCH 09/10] RISC-V: bpf: " Charlie Jenkins
2023-08-04 2:10 ` Charlie Jenkins
2023-08-04 2:10 ` Charlie Jenkins
2023-08-04 2:10 ` [PATCH 10/10] RISC-V: Refactor bug and traps instructions Charlie Jenkins
2023-08-04 2:10 ` Charlie Jenkins
2023-08-04 2:10 ` Charlie Jenkins
2023-08-04 5:16 ` kernel test robot
2023-08-04 5:16 ` kernel test robot
2023-08-04 5:16 ` kernel test robot
2023-08-04 9:28 ` [PATCH 00/10] RISC-V: Refactor instructions Andrew Jones
2023-08-04 9:28 ` Andrew Jones
2023-08-04 9:28 ` Andrew Jones
2023-08-04 17:24 ` Charlie Jenkins
2023-08-04 17:24 ` Charlie Jenkins
2023-08-04 17:24 ` Charlie Jenkins
2023-08-17 0:31 ` Charlie Jenkins
2023-08-17 0:31 ` Charlie Jenkins
2023-08-17 0:31 ` Charlie Jenkins
2023-08-17 3:57 ` Jessica Clarke
2023-08-17 3:57 ` Jessica Clarke
2023-08-17 3:57 ` Jessica Clarke
2023-08-17 4:05 ` Jessica Clarke
2023-08-17 4:05 ` Jessica Clarke
2023-08-17 4:05 ` Jessica Clarke
2023-08-17 16:43 ` Charlie Jenkins
2023-08-17 16:43 ` Charlie Jenkins
2023-08-17 16:43 ` Charlie Jenkins
2023-08-17 17:52 ` Palmer Dabbelt
2023-08-17 17:52 ` Palmer Dabbelt
2023-08-17 17:52 ` Palmer Dabbelt
2023-08-18 7:30 ` Andrew Jones
2023-08-18 7:30 ` Andrew Jones
2023-08-18 7:30 ` Andrew Jones
2023-09-06 18:51 ` Charlie Jenkins
2023-09-06 18:51 ` Charlie Jenkins
2023-09-06 18:51 ` Charlie Jenkins
2023-09-07 8:51 ` Andrew Jones
2023-09-07 8:51 ` Andrew Jones
2023-09-07 8:51 ` Andrew Jones
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