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From: Nicolin Chen <nicolinc@nvidia.com>
To: Michael Shavit <mshavit@google.com>
Cc: <iommu@lists.linux.dev>, <linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <will@kernel.org>,
	<robin.murphy@arm.com>, <jgg@nvidia.com>,
	<jean-philippe@linaro.org>
Subject: Re: [PATCH v2 4/8] iommu/arm-smmu-v3: move stall_enabled to the cd table
Date: Mon, 31 Jul 2023 21:52:29 -0700	[thread overview]
Message-ID: <ZMiPjRtch1c06F5Y@Asurada-Nvidia> (raw)
In-Reply-To: <ZMiJ9Cg5wfbxMZ+W@Asurada-Nvidia>

On Mon, Jul 31, 2023 at 09:28:40PM -0700, Nicolin Chen wrote:
> On Mon, Jul 31, 2023 at 06:48:14PM +0800, Michael Shavit wrote:
> > This controls whether CD entries will have the stall bit set when
> > writing entries into the table.
> > 
> > Signed-off-by: Michael Shavit <mshavit@google.com>
> > ---
> > 
> > Changes in v2:
> > - Use a bitfield instead of a bool for stall_enabled
> > 
> >  drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 8 ++++----
> >  drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 3 ++-
> >  2 files changed, 6 insertions(+), 5 deletions(-)
> > 
> > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> > index 8a286e3838d70..654acf6002bf3 100644
> > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> > @@ -1114,7 +1114,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_domain *smmu_domain, int ssid,
> >                         FIELD_PREP(CTXDESC_CD_0_ASID, cd->asid) |
> >                         CTXDESC_CD_0_V;
> > 
> > -               if (smmu_domain->stall_enabled)
> > +               if (smmu_domain->cd_table.stall_enabled)
> >                         val |= CTXDESC_CD_0_S;
> 
> This cd_table->stall_enabled comes from master->stall_enabled, and
> cd_table will be in master structure. Also, struct arm_smmu_master
> pointer will be passed in to arm_smmu_write_ctx_desc(). So, there
> seems to be no need of master->cd_table.stall_enabled in the end;
> just use master->stall_enabled directly?

Actually the stall_enabled might still need to be per-CD/domain.
If a domain is attached by two masters. The domain->stall_enabled
is initialized with the first master->stall_enabled. Then, the
second master->stall_enabled would be required to match with the
domain->stall_enabled. arm_smmu_attach_dev() has such a sanity.

So, I think we might not need this patch.

Nicolin

WARNING: multiple messages have this Message-ID (diff)
From: Nicolin Chen <nicolinc@nvidia.com>
To: Michael Shavit <mshavit@google.com>
Cc: <iommu@lists.linux.dev>, <linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <will@kernel.org>,
	<robin.murphy@arm.com>, <jgg@nvidia.com>,
	<jean-philippe@linaro.org>
Subject: Re: [PATCH v2 4/8] iommu/arm-smmu-v3: move stall_enabled to the cd table
Date: Mon, 31 Jul 2023 21:52:29 -0700	[thread overview]
Message-ID: <ZMiPjRtch1c06F5Y@Asurada-Nvidia> (raw)
In-Reply-To: <ZMiJ9Cg5wfbxMZ+W@Asurada-Nvidia>

On Mon, Jul 31, 2023 at 09:28:40PM -0700, Nicolin Chen wrote:
> On Mon, Jul 31, 2023 at 06:48:14PM +0800, Michael Shavit wrote:
> > This controls whether CD entries will have the stall bit set when
> > writing entries into the table.
> > 
> > Signed-off-by: Michael Shavit <mshavit@google.com>
> > ---
> > 
> > Changes in v2:
> > - Use a bitfield instead of a bool for stall_enabled
> > 
> >  drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 8 ++++----
> >  drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 3 ++-
> >  2 files changed, 6 insertions(+), 5 deletions(-)
> > 
> > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> > index 8a286e3838d70..654acf6002bf3 100644
> > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> > @@ -1114,7 +1114,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_domain *smmu_domain, int ssid,
> >                         FIELD_PREP(CTXDESC_CD_0_ASID, cd->asid) |
> >                         CTXDESC_CD_0_V;
> > 
> > -               if (smmu_domain->stall_enabled)
> > +               if (smmu_domain->cd_table.stall_enabled)
> >                         val |= CTXDESC_CD_0_S;
> 
> This cd_table->stall_enabled comes from master->stall_enabled, and
> cd_table will be in master structure. Also, struct arm_smmu_master
> pointer will be passed in to arm_smmu_write_ctx_desc(). So, there
> seems to be no need of master->cd_table.stall_enabled in the end;
> just use master->stall_enabled directly?

Actually the stall_enabled might still need to be per-CD/domain.
If a domain is attached by two masters. The domain->stall_enabled
is initialized with the first master->stall_enabled. Then, the
second master->stall_enabled would be required to match with the
domain->stall_enabled. arm_smmu_attach_dev() has such a sanity.

So, I think we might not need this patch.

Nicolin

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  reply	other threads:[~2023-08-01  4:52 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-31 10:48 [PATCH v2 0/8] Refactor the SMMU's CD table ownership Michael Shavit
2023-07-31 10:48 ` Michael Shavit
2023-07-31 10:48 ` [PATCH v2 1/8] iommu/arm-smmu-v3: Move ctx_desc out of s1_cfg Michael Shavit
2023-07-31 10:48   ` Michael Shavit
2023-08-01 14:08   ` Jason Gunthorpe
2023-08-01 14:08     ` Jason Gunthorpe
2023-07-31 10:48 ` [PATCH v2 2/8] iommu/arm-smmu-v3: Replace s1_cfg with cdtab_cfg Michael Shavit
2023-07-31 10:48   ` Michael Shavit
2023-08-01  4:14   ` Nicolin Chen
2023-08-01  4:14     ` Nicolin Chen
2023-08-01  8:00     ` Michael Shavit
2023-08-01  8:00       ` Michael Shavit
2023-08-01 13:43   ` Jason Gunthorpe
2023-08-01 13:43     ` Jason Gunthorpe
2023-07-31 10:48 ` [PATCH v2 3/8] iommu/arm-smmu-v3: Encapsulate ctx_desc_cfg init in alloc_cd_tables Michael Shavit
2023-07-31 10:48   ` Michael Shavit
2023-08-01 14:09   ` Jason Gunthorpe
2023-08-01 14:09     ` Jason Gunthorpe
2023-07-31 10:48 ` [PATCH v2 4/8] iommu/arm-smmu-v3: move stall_enabled to the cd table Michael Shavit
2023-07-31 10:48   ` Michael Shavit
2023-08-01  4:28   ` Nicolin Chen
2023-08-01  4:28     ` Nicolin Chen
2023-08-01  4:52     ` Nicolin Chen [this message]
2023-08-01  4:52       ` Nicolin Chen
2023-08-01  8:09       ` Michael Shavit
2023-08-01  8:09         ` Michael Shavit
2023-08-01 13:31         ` Jason Gunthorpe
2023-08-01 13:31           ` Jason Gunthorpe
2023-08-01 14:12   ` Jason Gunthorpe
2023-08-01 14:12     ` Jason Gunthorpe
2023-07-31 10:48 ` [PATCH v2 5/8] iommu/arm-smmu-v3: Skip cd sync if CD table isn't active Michael Shavit
2023-07-31 10:48   ` Michael Shavit
2023-08-01 14:13   ` Jason Gunthorpe
2023-08-01 14:13     ` Jason Gunthorpe
2023-07-31 10:48 ` [PATCH v2 6/8] iommu/arm-smmu-v3: Refactor write_ctx_desc Michael Shavit
2023-07-31 10:48   ` Michael Shavit
2023-08-01 14:18   ` Jason Gunthorpe
2023-08-01 14:18     ` Jason Gunthorpe
2023-08-01 17:03     ` Michael Shavit
2023-08-01 17:03       ` Michael Shavit
2023-07-31 10:48 ` [PATCH v2 7/8] iommu/arm-smmu-v3: Move CD table to arm_smmu_master Michael Shavit
2023-07-31 10:48   ` Michael Shavit
2023-08-01 14:42   ` Jason Gunthorpe
2023-08-01 14:42     ` Jason Gunthorpe
2023-07-31 10:48 ` [PATCH v2 8/8] iommu/arm-smmu-v3: Rename cdcfg to cd_table Michael Shavit
2023-07-31 10:48   ` Michael Shavit
2023-08-01 14:44   ` Jason Gunthorpe
2023-08-01 14:44     ` Jason Gunthorpe

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