All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Lisovskiy, Stanislav" <stanislav.lisovskiy@intel.com>
To: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 08/20] drm/display/dp: Fix the DP DSC Receiver cap size
Date: Wed, 2 Aug 2023 14:43:17 +0300	[thread overview]
Message-ID: <ZMpBVeZuCEhsW8Xw@intel.com> (raw)
In-Reply-To: <20230728041150.2524032-9-ankit.k.nautiyal@intel.com>

On Fri, Jul 28, 2023 at 09:41:38AM +0530, Ankit Nautiyal wrote:
> DP DSC Receiver Capabilities are exposed via DPCD 60h-6Fh.
> Fix the DSC RECEIVER CAP SIZE accordingly.
> 
> Fixes: ffddc4363c28 ("drm/dp: Add DP DSC DPCD receiver capability size define and missing SHIFT")
> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Cc: <stable@vger.kernel.org> # v5.0+
> 
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  include/drm/display/drm_dp.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
> index 02f2ac4dd2df..e69cece404b3 100644
> --- a/include/drm/display/drm_dp.h
> +++ b/include/drm/display/drm_dp.h
> @@ -1537,7 +1537,7 @@ enum drm_dp_phy {
>  
>  #define DP_BRANCH_OUI_HEADER_SIZE	0xc
>  #define DP_RECEIVER_CAP_SIZE		0xf
> -#define DP_DSC_RECEIVER_CAP_SIZE        0xf
> +#define DP_DSC_RECEIVER_CAP_SIZE        0x10 /* DSC Capabilities 0x60 through 0x6F */
>  #define EDP_PSR_RECEIVER_CAP_SIZE	2
>  #define EDP_DISPLAY_CTL_CAP_SIZE	3
>  #define DP_LTTPR_COMMON_CAP_SIZE	8

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>

> -- 
> 2.40.1
> 

WARNING: multiple messages have this Message-ID (diff)
From: "Lisovskiy, Stanislav" <stanislav.lisovskiy@intel.com>
To: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: intel-gfx@lists.freedesktop.org, anusha.srivatsa@intel.com,
	dri-devel@lists.freedesktop.org, navaremanasi@google.com
Subject: Re: [PATCH 08/20] drm/display/dp: Fix the DP DSC Receiver cap size
Date: Wed, 2 Aug 2023 14:43:17 +0300	[thread overview]
Message-ID: <ZMpBVeZuCEhsW8Xw@intel.com> (raw)
In-Reply-To: <20230728041150.2524032-9-ankit.k.nautiyal@intel.com>

On Fri, Jul 28, 2023 at 09:41:38AM +0530, Ankit Nautiyal wrote:
> DP DSC Receiver Capabilities are exposed via DPCD 60h-6Fh.
> Fix the DSC RECEIVER CAP SIZE accordingly.
> 
> Fixes: ffddc4363c28 ("drm/dp: Add DP DSC DPCD receiver capability size define and missing SHIFT")
> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Cc: <stable@vger.kernel.org> # v5.0+
> 
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  include/drm/display/drm_dp.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
> index 02f2ac4dd2df..e69cece404b3 100644
> --- a/include/drm/display/drm_dp.h
> +++ b/include/drm/display/drm_dp.h
> @@ -1537,7 +1537,7 @@ enum drm_dp_phy {
>  
>  #define DP_BRANCH_OUI_HEADER_SIZE	0xc
>  #define DP_RECEIVER_CAP_SIZE		0xf
> -#define DP_DSC_RECEIVER_CAP_SIZE        0xf
> +#define DP_DSC_RECEIVER_CAP_SIZE        0x10 /* DSC Capabilities 0x60 through 0x6F */
>  #define EDP_PSR_RECEIVER_CAP_SIZE	2
>  #define EDP_DISPLAY_CTL_CAP_SIZE	3
>  #define DP_LTTPR_COMMON_CAP_SIZE	8

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>

> -- 
> 2.40.1
> 

  reply	other threads:[~2023-08-02 11:43 UTC|newest]

Thread overview: 76+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-28  4:11 [Intel-gfx] [PATCH 00/20] DSC misc fixes Ankit Nautiyal
2023-07-28  4:11 ` Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 01/20] drm/i915/dp: Consider output_format while computing dsc bpp Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 02/20] drm/i915/dp: Move compressed bpp check with 420 format inside the helper Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 03/20] drm/i915/dp_mst: Use output_format to get the final link bpp Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 04/20] drm/i915/dp: Use consistent name for link bpp and compressed bpp Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 05/20] drm/i915/dp: Update Bigjoiner interface bits for computing " Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 06/20] drm/i915/intel_cdclk: Add vdsc with bigjoiner constraints on min_cdlck Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 07/20] drm/i915/dp: Remove extra logs for printing DSC info Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 08/20] drm/display/dp: Fix the DP DSC Receiver cap size Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-08-02 11:43   ` Lisovskiy, Stanislav [this message]
2023-08-02 11:43     ` Lisovskiy, Stanislav
2023-07-28  4:11 ` [Intel-gfx] [PATCH 09/20] drm/i915/dp: Avoid forcing DSC BPC for MST case Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-08-02 11:47   ` [Intel-gfx] " Lisovskiy, Stanislav
2023-08-02 11:47     ` Lisovskiy, Stanislav
2023-07-28  4:11 ` [Intel-gfx] [PATCH 10/20] drm/i915/dp: Add functions to get min/max src input bpc with DSC Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-08-02 12:05   ` [Intel-gfx] " Lisovskiy, Stanislav
2023-08-02 12:05     ` Lisovskiy, Stanislav
2023-08-04  4:12     ` [Intel-gfx] " Nautiyal, Ankit K
2023-08-04  4:12       ` Nautiyal, Ankit K
2023-08-07 12:30       ` [Intel-gfx] " Lisovskiy, Stanislav
2023-08-07 12:30         ` Lisovskiy, Stanislav
2023-08-08 10:08   ` [Intel-gfx] " Ankit Nautiyal
2023-08-08 10:08     ` Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 11/20] drm/i915/dp: Check min bpc DSC limits for dsc_force_bpc also Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-08-07 12:33   ` [Intel-gfx] " Lisovskiy, Stanislav
2023-08-07 12:33     ` Lisovskiy, Stanislav
2023-07-28  4:11 ` [Intel-gfx] [PATCH 12/20] drm/i915/dp: Avoid left shift of DSC output bpp by 4 Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 13/20] drm/i915/dp: Rename helper to get DSC max pipe_bpp Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-08-07 12:06   ` [Intel-gfx] " Lisovskiy, Stanislav
2023-08-07 12:06     ` Lisovskiy, Stanislav
2023-07-28  4:11 ` [Intel-gfx] [PATCH 14/20] drm/i915/dp: Separate out functions for edp/DP for computing DSC bpp Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-08-07 12:08   ` [Intel-gfx] " Lisovskiy, Stanislav
2023-08-07 12:08     ` Lisovskiy, Stanislav
2023-07-28  4:11 ` [Intel-gfx] [PATCH 15/20] drm/i915/dp: Add DSC BPC/BPP constraints while selecting pipe bpp with DSC Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-08-07 12:23   ` [Intel-gfx] " Lisovskiy, Stanislav
2023-08-07 12:23     ` Lisovskiy, Stanislav
2023-07-28  4:11 ` [Intel-gfx] [PATCH 16/20] drm/i915/dp: Separate out function to get compressed bpp with joiner Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-08-07 12:35   ` [Intel-gfx] " Lisovskiy, Stanislav
2023-08-07 12:35     ` Lisovskiy, Stanislav
2023-07-28  4:11 ` [Intel-gfx] [PATCH 17/20] drm/i915/dp: Get optimal link config to have best compressed bpp Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 18/20] drm/i915: Query compressed bpp properly using correct DPCD and DP Spec info Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 19/20] drm/i915/dp: Check src/sink compressed bpp limit for edp Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-08-07 12:27   ` [Intel-gfx] " Lisovskiy, Stanislav
2023-08-07 12:27     ` Lisovskiy, Stanislav
2023-07-28  4:11 ` [Intel-gfx] [PATCH 20/20] drm/i915/dp: Check if force_dsc_output_format is possible Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-08-07 12:25   ` [Intel-gfx] " Lisovskiy, Stanislav
2023-08-07 12:25     ` Lisovskiy, Stanislav
2023-07-28  4:57 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for DSC misc fixes (rev5) Patchwork
2023-07-28  5:12 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-07-28 12:40 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-08-08 10:42 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for DSC misc fixes (rev6) Patchwork
2023-08-08 10:42 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-08-08 10:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-08-08 17:29 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2023-08-10 13:02 [Intel-gfx] [PATCH 00/20] DSC misc fixes Ankit Nautiyal
2023-08-10 13:03 ` [Intel-gfx] [PATCH 08/20] drm/display/dp: Fix the DP DSC Receiver cap size Ankit Nautiyal

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=ZMpBVeZuCEhsW8Xw@intel.com \
    --to=stanislav.lisovskiy@intel.com \
    --cc=ankit.k.nautiyal@intel.com \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.