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From: "Lisovskiy, Stanislav" <stanislav.lisovskiy@intel.com>
To: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 11/20] drm/i915/dp: Check min bpc DSC limits for dsc_force_bpc also
Date: Mon, 7 Aug 2023 15:33:28 +0300	[thread overview]
Message-ID: <ZNDkmD0NdazyWNVj@intel.com> (raw)
In-Reply-To: <20230728041150.2524032-12-ankit.k.nautiyal@intel.com>

On Fri, Jul 28, 2023 at 09:41:41AM +0530, Ankit Nautiyal wrote:
> For DSC the min BPC is 8 for ICL+ and so the min pipe_bpp is 24.
> Check this condition for cases where bpc is forced by debugfs flag
> dsc_force_bpc. If the check fails, then WARN and ignore the debugfs
> flag.
> 
> For MST case the pipe_bpp is already computed (hardcoded to be 24),
> and this check is not required.

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>

> 
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 48 ++++++++++++++++---------
>  1 file changed, 31 insertions(+), 17 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index f41de126a8d3..78ac8f4fd348 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1697,6 +1697,12 @@ u8 intel_dp_dsc_min_src_input_bpc(struct drm_i915_private *i915)
>  	return 0;
>  }
>  
> +static
> +bool is_dsc_pipe_bpp_sufficient(struct drm_i915_private *i915, int pipe_bpp)
> +{
> +	return pipe_bpp >= intel_dp_dsc_min_src_input_bpc(i915) * 3;
> +}
> +
>  int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
>  				struct intel_crtc_state *pipe_config,
>  				struct drm_connector_state *conn_state,
> @@ -1708,7 +1714,6 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
>  	struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
>  	const struct drm_display_mode *adjusted_mode =
>  		&pipe_config->hw.adjusted_mode;
> -	int pipe_bpp;
>  	int ret;
>  
>  	pipe_config->fec_enable = !intel_dp_is_edp(intel_dp) &&
> @@ -1720,28 +1725,37 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
>  	if (!intel_dp_dsc_supports_format(intel_dp, pipe_config->output_format))
>  		return -EINVAL;
>  
> -	if (intel_dp->force_dsc_bpc && compute_pipe_bpp) {
> -		pipe_bpp = intel_dp->force_dsc_bpc * 3;
> -		drm_dbg_kms(&dev_priv->drm, "Input DSC BPC forced to %d\n",
> -			    intel_dp->force_dsc_bpc);
> -	} else if (compute_pipe_bpp) {
> -		pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, conn_state->max_requested_bpc);
> -	} else {
> -		pipe_bpp = pipe_config->pipe_bpp;
> -	}
> +	if (compute_pipe_bpp) {
> +		int pipe_bpp;
> +		int forced_bpp = intel_dp->force_dsc_bpc * 3;
>  
> -	if (pipe_bpp < intel_dp_dsc_min_src_input_bpc(dev_priv) * 3) {
> -		drm_dbg_kms(&dev_priv->drm,
> -			    "Computed BPC less than min supported by source for DSC\n");
> -		return -EINVAL;
> +		if (forced_bpp && is_dsc_pipe_bpp_sufficient(dev_priv, forced_bpp)) {
> +			pipe_bpp = forced_bpp;
> +			drm_dbg_kms(&dev_priv->drm, "Input DSC BPC forced to %d\n",
> +				    intel_dp->force_dsc_bpc);
> +		} else {
> +			drm_WARN(&dev_priv->drm, forced_bpp,
> +				 "Cannot force DSC BPC:%d, due to DSC BPC limits\n",
> +				 intel_dp->force_dsc_bpc);
> +
> +			pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp,
> +							    conn_state->max_requested_bpc);
> +
> +			if (!is_dsc_pipe_bpp_sufficient(dev_priv, pipe_bpp)) {
> +				drm_dbg_kms(&dev_priv->drm,
> +					    "Computed BPC less than min supported by source for DSC\n");
> +				return -EINVAL;
> +			}
> +		}
> +
> +		pipe_config->pipe_bpp = pipe_bpp;
>  	}
>  
>  	/*
> -	 * For now enable DSC for max bpp, max link rate, max lane count.
> +	 * For now enable DSC for max link rate, max lane count.
>  	 * Optimize this later for the minimum possible link rate/lane count
>  	 * with DSC enabled for the requested mode.
>  	 */
> -	pipe_config->pipe_bpp = pipe_bpp;
>  	pipe_config->port_clock = limits->max_rate;
>  	pipe_config->lane_count = limits->max_lane_count;
>  
> @@ -1770,7 +1784,7 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
>  								    adjusted_mode->crtc_hdisplay,
>  								    pipe_config->bigjoiner_pipes,
>  								    pipe_config->output_format,
> -								    pipe_bpp,
> +								    pipe_config->pipe_bpp,
>  								    timeslots);
>  			if (!dsc_max_compressed_bpp) {
>  				drm_dbg_kms(&dev_priv->drm,
> -- 
> 2.40.1
> 

WARNING: multiple messages have this Message-ID (diff)
From: "Lisovskiy, Stanislav" <stanislav.lisovskiy@intel.com>
To: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: intel-gfx@lists.freedesktop.org, anusha.srivatsa@intel.com,
	dri-devel@lists.freedesktop.org, navaremanasi@google.com
Subject: Re: [PATCH 11/20] drm/i915/dp: Check min bpc DSC limits for dsc_force_bpc also
Date: Mon, 7 Aug 2023 15:33:28 +0300	[thread overview]
Message-ID: <ZNDkmD0NdazyWNVj@intel.com> (raw)
In-Reply-To: <20230728041150.2524032-12-ankit.k.nautiyal@intel.com>

On Fri, Jul 28, 2023 at 09:41:41AM +0530, Ankit Nautiyal wrote:
> For DSC the min BPC is 8 for ICL+ and so the min pipe_bpp is 24.
> Check this condition for cases where bpc is forced by debugfs flag
> dsc_force_bpc. If the check fails, then WARN and ignore the debugfs
> flag.
> 
> For MST case the pipe_bpp is already computed (hardcoded to be 24),
> and this check is not required.

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>

> 
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 48 ++++++++++++++++---------
>  1 file changed, 31 insertions(+), 17 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index f41de126a8d3..78ac8f4fd348 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1697,6 +1697,12 @@ u8 intel_dp_dsc_min_src_input_bpc(struct drm_i915_private *i915)
>  	return 0;
>  }
>  
> +static
> +bool is_dsc_pipe_bpp_sufficient(struct drm_i915_private *i915, int pipe_bpp)
> +{
> +	return pipe_bpp >= intel_dp_dsc_min_src_input_bpc(i915) * 3;
> +}
> +
>  int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
>  				struct intel_crtc_state *pipe_config,
>  				struct drm_connector_state *conn_state,
> @@ -1708,7 +1714,6 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
>  	struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
>  	const struct drm_display_mode *adjusted_mode =
>  		&pipe_config->hw.adjusted_mode;
> -	int pipe_bpp;
>  	int ret;
>  
>  	pipe_config->fec_enable = !intel_dp_is_edp(intel_dp) &&
> @@ -1720,28 +1725,37 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
>  	if (!intel_dp_dsc_supports_format(intel_dp, pipe_config->output_format))
>  		return -EINVAL;
>  
> -	if (intel_dp->force_dsc_bpc && compute_pipe_bpp) {
> -		pipe_bpp = intel_dp->force_dsc_bpc * 3;
> -		drm_dbg_kms(&dev_priv->drm, "Input DSC BPC forced to %d\n",
> -			    intel_dp->force_dsc_bpc);
> -	} else if (compute_pipe_bpp) {
> -		pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, conn_state->max_requested_bpc);
> -	} else {
> -		pipe_bpp = pipe_config->pipe_bpp;
> -	}
> +	if (compute_pipe_bpp) {
> +		int pipe_bpp;
> +		int forced_bpp = intel_dp->force_dsc_bpc * 3;
>  
> -	if (pipe_bpp < intel_dp_dsc_min_src_input_bpc(dev_priv) * 3) {
> -		drm_dbg_kms(&dev_priv->drm,
> -			    "Computed BPC less than min supported by source for DSC\n");
> -		return -EINVAL;
> +		if (forced_bpp && is_dsc_pipe_bpp_sufficient(dev_priv, forced_bpp)) {
> +			pipe_bpp = forced_bpp;
> +			drm_dbg_kms(&dev_priv->drm, "Input DSC BPC forced to %d\n",
> +				    intel_dp->force_dsc_bpc);
> +		} else {
> +			drm_WARN(&dev_priv->drm, forced_bpp,
> +				 "Cannot force DSC BPC:%d, due to DSC BPC limits\n",
> +				 intel_dp->force_dsc_bpc);
> +
> +			pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp,
> +							    conn_state->max_requested_bpc);
> +
> +			if (!is_dsc_pipe_bpp_sufficient(dev_priv, pipe_bpp)) {
> +				drm_dbg_kms(&dev_priv->drm,
> +					    "Computed BPC less than min supported by source for DSC\n");
> +				return -EINVAL;
> +			}
> +		}
> +
> +		pipe_config->pipe_bpp = pipe_bpp;
>  	}
>  
>  	/*
> -	 * For now enable DSC for max bpp, max link rate, max lane count.
> +	 * For now enable DSC for max link rate, max lane count.
>  	 * Optimize this later for the minimum possible link rate/lane count
>  	 * with DSC enabled for the requested mode.
>  	 */
> -	pipe_config->pipe_bpp = pipe_bpp;
>  	pipe_config->port_clock = limits->max_rate;
>  	pipe_config->lane_count = limits->max_lane_count;
>  
> @@ -1770,7 +1784,7 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
>  								    adjusted_mode->crtc_hdisplay,
>  								    pipe_config->bigjoiner_pipes,
>  								    pipe_config->output_format,
> -								    pipe_bpp,
> +								    pipe_config->pipe_bpp,
>  								    timeslots);
>  			if (!dsc_max_compressed_bpp) {
>  				drm_dbg_kms(&dev_priv->drm,
> -- 
> 2.40.1
> 

  reply	other threads:[~2023-08-07 12:33 UTC|newest]

Thread overview: 76+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-28  4:11 [Intel-gfx] [PATCH 00/20] DSC misc fixes Ankit Nautiyal
2023-07-28  4:11 ` Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 01/20] drm/i915/dp: Consider output_format while computing dsc bpp Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 02/20] drm/i915/dp: Move compressed bpp check with 420 format inside the helper Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 03/20] drm/i915/dp_mst: Use output_format to get the final link bpp Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 04/20] drm/i915/dp: Use consistent name for link bpp and compressed bpp Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 05/20] drm/i915/dp: Update Bigjoiner interface bits for computing " Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 06/20] drm/i915/intel_cdclk: Add vdsc with bigjoiner constraints on min_cdlck Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 07/20] drm/i915/dp: Remove extra logs for printing DSC info Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 08/20] drm/display/dp: Fix the DP DSC Receiver cap size Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-08-02 11:43   ` [Intel-gfx] " Lisovskiy, Stanislav
2023-08-02 11:43     ` Lisovskiy, Stanislav
2023-07-28  4:11 ` [Intel-gfx] [PATCH 09/20] drm/i915/dp: Avoid forcing DSC BPC for MST case Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-08-02 11:47   ` [Intel-gfx] " Lisovskiy, Stanislav
2023-08-02 11:47     ` Lisovskiy, Stanislav
2023-07-28  4:11 ` [Intel-gfx] [PATCH 10/20] drm/i915/dp: Add functions to get min/max src input bpc with DSC Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-08-02 12:05   ` [Intel-gfx] " Lisovskiy, Stanislav
2023-08-02 12:05     ` Lisovskiy, Stanislav
2023-08-04  4:12     ` [Intel-gfx] " Nautiyal, Ankit K
2023-08-04  4:12       ` Nautiyal, Ankit K
2023-08-07 12:30       ` [Intel-gfx] " Lisovskiy, Stanislav
2023-08-07 12:30         ` Lisovskiy, Stanislav
2023-08-08 10:08   ` [Intel-gfx] " Ankit Nautiyal
2023-08-08 10:08     ` Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 11/20] drm/i915/dp: Check min bpc DSC limits for dsc_force_bpc also Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-08-07 12:33   ` Lisovskiy, Stanislav [this message]
2023-08-07 12:33     ` Lisovskiy, Stanislav
2023-07-28  4:11 ` [Intel-gfx] [PATCH 12/20] drm/i915/dp: Avoid left shift of DSC output bpp by 4 Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 13/20] drm/i915/dp: Rename helper to get DSC max pipe_bpp Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-08-07 12:06   ` [Intel-gfx] " Lisovskiy, Stanislav
2023-08-07 12:06     ` Lisovskiy, Stanislav
2023-07-28  4:11 ` [Intel-gfx] [PATCH 14/20] drm/i915/dp: Separate out functions for edp/DP for computing DSC bpp Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-08-07 12:08   ` [Intel-gfx] " Lisovskiy, Stanislav
2023-08-07 12:08     ` Lisovskiy, Stanislav
2023-07-28  4:11 ` [Intel-gfx] [PATCH 15/20] drm/i915/dp: Add DSC BPC/BPP constraints while selecting pipe bpp with DSC Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-08-07 12:23   ` [Intel-gfx] " Lisovskiy, Stanislav
2023-08-07 12:23     ` Lisovskiy, Stanislav
2023-07-28  4:11 ` [Intel-gfx] [PATCH 16/20] drm/i915/dp: Separate out function to get compressed bpp with joiner Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-08-07 12:35   ` [Intel-gfx] " Lisovskiy, Stanislav
2023-08-07 12:35     ` Lisovskiy, Stanislav
2023-07-28  4:11 ` [Intel-gfx] [PATCH 17/20] drm/i915/dp: Get optimal link config to have best compressed bpp Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 18/20] drm/i915: Query compressed bpp properly using correct DPCD and DP Spec info Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-07-28  4:11 ` [Intel-gfx] [PATCH 19/20] drm/i915/dp: Check src/sink compressed bpp limit for edp Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-08-07 12:27   ` [Intel-gfx] " Lisovskiy, Stanislav
2023-08-07 12:27     ` Lisovskiy, Stanislav
2023-07-28  4:11 ` [Intel-gfx] [PATCH 20/20] drm/i915/dp: Check if force_dsc_output_format is possible Ankit Nautiyal
2023-07-28  4:11   ` Ankit Nautiyal
2023-08-07 12:25   ` [Intel-gfx] " Lisovskiy, Stanislav
2023-08-07 12:25     ` Lisovskiy, Stanislav
2023-07-28  4:57 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for DSC misc fixes (rev5) Patchwork
2023-07-28  5:12 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-07-28 12:40 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-08-08 10:42 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for DSC misc fixes (rev6) Patchwork
2023-08-08 10:42 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-08-08 10:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-08-08 17:29 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2023-08-10 13:02 [Intel-gfx] [PATCH 00/20] DSC misc fixes Ankit Nautiyal
2023-08-10 13:03 ` [Intel-gfx] [PATCH 11/20] drm/i915/dp: Check min bpc DSC limits for dsc_force_bpc also Ankit Nautiyal

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