From: Oliver Upton <oliver.upton@linux.dev>
To: Marc Zyngier <maz@kernel.org>
Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
kvm@vger.kernel.org, James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Zenghui Yu <yuzenghui@huawei.com>
Subject: Re: [PATCH] KVM: arm64: Do not let a L1 hypervisor access the *32_EL2 sysregs
Date: Sat, 14 Oct 2023 03:32:46 +0000 [thread overview]
Message-ID: <ZSoL3vZDZk5RBhCS@linux.dev> (raw)
In-Reply-To: <20231013223311.3950585-1-maz@kernel.org>
On Fri, Oct 13, 2023 at 11:33:11PM +0100, Marc Zyngier wrote:
> DBGVCR32_EL2, DACR32_EL2, IFSR32_EL2 and FPEXC32_EL2 are required to
> UNDEF when AArch32 isn't implemented, which is definitely the case when
> running NV.
>
> Given that this is the only case where these registers can trap,
> unconditionally inject an UNDEF exception.
>
> Signed-off-by: Marc Zyngier <maz@kernel.org>
If you intend to send this as a fix for 6.6:
Reviewed-by: Oliver Upton <oliver.upton@linux.dev>
Otherwise it is on the stack of patches I'll pick up for 6.7
--
Thanks,
Oliver
WARNING: multiple messages have this Message-ID (diff)
From: Oliver Upton <oliver.upton@linux.dev>
To: Marc Zyngier <maz@kernel.org>
Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
kvm@vger.kernel.org, James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Zenghui Yu <yuzenghui@huawei.com>
Subject: Re: [PATCH] KVM: arm64: Do not let a L1 hypervisor access the *32_EL2 sysregs
Date: Sat, 14 Oct 2023 03:32:46 +0000 [thread overview]
Message-ID: <ZSoL3vZDZk5RBhCS@linux.dev> (raw)
In-Reply-To: <20231013223311.3950585-1-maz@kernel.org>
On Fri, Oct 13, 2023 at 11:33:11PM +0100, Marc Zyngier wrote:
> DBGVCR32_EL2, DACR32_EL2, IFSR32_EL2 and FPEXC32_EL2 are required to
> UNDEF when AArch32 isn't implemented, which is definitely the case when
> running NV.
>
> Given that this is the only case where these registers can trap,
> unconditionally inject an UNDEF exception.
>
> Signed-off-by: Marc Zyngier <maz@kernel.org>
If you intend to send this as a fix for 6.6:
Reviewed-by: Oliver Upton <oliver.upton@linux.dev>
Otherwise it is on the stack of patches I'll pick up for 6.7
--
Thanks,
Oliver
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-10-14 3:32 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-13 22:33 [PATCH] KVM: arm64: Do not let a L1 hypervisor access the *32_EL2 sysregs Marc Zyngier
2023-10-13 22:33 ` Marc Zyngier
2023-10-14 3:32 ` Oliver Upton [this message]
2023-10-14 3:32 ` Oliver Upton
2023-10-17 18:50 ` Marc Zyngier
2023-10-17 18:50 ` Marc Zyngier
2023-10-16 14:15 ` Miguel Luis
2023-10-16 14:15 ` Miguel Luis
2023-10-16 14:28 ` Marc Zyngier
2023-10-16 14:28 ` Marc Zyngier
2023-10-16 15:01 ` Miguel Luis
2023-10-16 15:01 ` Miguel Luis
2023-10-16 14:58 ` Eric Auger
2023-10-16 14:58 ` Eric Auger
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ZSoL3vZDZk5RBhCS@linux.dev \
--to=oliver.upton@linux.dev \
--cc=james.morse@arm.com \
--cc=kvm@vger.kernel.org \
--cc=kvmarm@lists.linux.dev \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=maz@kernel.org \
--cc=suzuki.poulose@arm.com \
--cc=yuzenghui@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.