From: Ethan Chen via <qemu-devel@nongnu.org>
To: David Hildenbrand <david@redhat.com>
Cc: qemu-devel@nongnu.org, "Paolo Bonzini" <pbonzini@redhat.com>,
"Peter Xu" <peterx@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: Re: [PATCH 1/6] exec/memory: Introduce the translate_size function within the IOMMU class
Date: Thu, 26 Oct 2023 15:14:14 +0800 [thread overview]
Message-ID: <ZToRxn/jFyj1Mm1r@ethan84-VirtualBox> (raw)
In-Reply-To: <babd9eb7-1f9c-478a-b288-96606795fc8b@redhat.com>
On Wed, Oct 25, 2023 at 04:56:22PM +0200, David Hildenbrand wrote:
> On 25.10.23 07:14, Ethan Chen wrote:
> > IOMMU have size information during translation.
> >
>
> Can you add some more information why we would want this and how the backend
> can do "better" things with the size at hand?
>
With size information, IOMMU can reject a memory access which is patially in
valid region.
Currently translation function limit memory access size with a mask, so the
valid part of access will success. My target is to detect partially hit and
reject whole access. Translation function cannot detect partially hit because
it lacks size information.
> Note that I was not CCed on the cover letter.
>
> > Signed-off-by: Ethan Chen <ethan84@andestech.com>
> > ---
> > include/exec/memory.h | 19 +++++++++++++++++++
> > 1 file changed, 19 insertions(+)
> >
> > diff --git a/include/exec/memory.h b/include/exec/memory.h
> > index 9087d02769..5520b7c8c0 100644
> > --- a/include/exec/memory.h
> > +++ b/include/exec/memory.h
> > @@ -396,6 +396,25 @@ struct IOMMUMemoryRegionClass {
> > */
> > IOMMUTLBEntry (*translate)(IOMMUMemoryRegion *iommu, hwaddr addr,
> > IOMMUAccessFlags flag, int iommu_idx);
> > + /**
> > + * @translate_size:
> > + *
> > + * Return a TLB entry that contains a given address and size.
> > + *
> > + * @iommu: the IOMMUMemoryRegion
> > + *
> > + * @hwaddr: address to be translated within the memory region
> > + *
> > + * @size: size to indicate the scope of the entire transaction
> > + *
> > + * @flag: requested access permission
> > + *
> > + * @iommu_idx: IOMMU index for the translation
> > + */
> > + IOMMUTLBEntry (*translate_size)(IOMMUMemoryRegion *iommu, hwaddr addr,
> > + hwaddr size, IOMMUAccessFlags flag,
> > + int iommu_idx);
> > +
> > /**
> > * @get_min_page_size:
> > *
>
> --
> Cheers,
>
> David / dhildenb
>
Thanks,
Ethan Chen
WARNING: multiple messages have this Message-ID (diff)
From: Ethan Chen <ethan84@andestech.com>
To: David Hildenbrand <david@redhat.com>
Cc: qemu-devel@nongnu.org, "Paolo Bonzini" <pbonzini@redhat.com>,
"Peter Xu" <peterx@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: Re: [PATCH 1/6] exec/memory: Introduce the translate_size function within the IOMMU class
Date: Thu, 26 Oct 2023 15:14:14 +0800 [thread overview]
Message-ID: <ZToRxn/jFyj1Mm1r@ethan84-VirtualBox> (raw)
Message-ID: <20231026071414.o4mt8O4hD0Nab_ZpEe7phRU62_IrsWVA37WBo4t73Jg@z> (raw)
In-Reply-To: <babd9eb7-1f9c-478a-b288-96606795fc8b@redhat.com>
On Wed, Oct 25, 2023 at 04:56:22PM +0200, David Hildenbrand wrote:
> On 25.10.23 07:14, Ethan Chen wrote:
> > IOMMU have size information during translation.
> >
>
> Can you add some more information why we would want this and how the backend
> can do "better" things with the size at hand?
>
With size information, IOMMU can reject a memory access which is patially in
valid region.
Currently translation function limit memory access size with a mask, so the
valid part of access will success. My target is to detect partially hit and
reject whole access. Translation function cannot detect partially hit because
it lacks size information.
> Note that I was not CCed on the cover letter.
>
> > Signed-off-by: Ethan Chen <ethan84@andestech.com>
> > ---
> > include/exec/memory.h | 19 +++++++++++++++++++
> > 1 file changed, 19 insertions(+)
> >
> > diff --git a/include/exec/memory.h b/include/exec/memory.h
> > index 9087d02769..5520b7c8c0 100644
> > --- a/include/exec/memory.h
> > +++ b/include/exec/memory.h
> > @@ -396,6 +396,25 @@ struct IOMMUMemoryRegionClass {
> > */
> > IOMMUTLBEntry (*translate)(IOMMUMemoryRegion *iommu, hwaddr addr,
> > IOMMUAccessFlags flag, int iommu_idx);
> > + /**
> > + * @translate_size:
> > + *
> > + * Return a TLB entry that contains a given address and size.
> > + *
> > + * @iommu: the IOMMUMemoryRegion
> > + *
> > + * @hwaddr: address to be translated within the memory region
> > + *
> > + * @size: size to indicate the scope of the entire transaction
> > + *
> > + * @flag: requested access permission
> > + *
> > + * @iommu_idx: IOMMU index for the translation
> > + */
> > + IOMMUTLBEntry (*translate_size)(IOMMUMemoryRegion *iommu, hwaddr addr,
> > + hwaddr size, IOMMUAccessFlags flag,
> > + int iommu_idx);
> > +
> > /**
> > * @get_min_page_size:
> > *
>
> --
> Cheers,
>
> David / dhildenb
>
Thanks,
Ethan Chen
next prev parent reply other threads:[~2023-10-26 7:15 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-25 5:14 [PATCH 0/6] Support RISC-V IOPMP Ethan Chen via
2023-10-25 5:14 ` Ethan Chen
2023-10-25 5:14 ` [PATCH 1/6] exec/memory: Introduce the translate_size function within the IOMMU class Ethan Chen via
2023-10-25 5:14 ` Ethan Chen
2023-10-25 14:56 ` David Hildenbrand
2023-10-26 7:14 ` Ethan Chen via [this message]
2023-10-26 7:14 ` Ethan Chen
2023-10-26 7:26 ` David Hildenbrand
2023-10-25 5:14 ` [PATCH 2/6] system/physmem: IOMMU: Invoke the translate_size function if it is implemented Ethan Chen via
2023-10-25 5:14 ` Ethan Chen
2023-10-25 15:14 ` Peter Xu
2023-10-26 6:48 ` Ethan Chen via
2023-10-26 6:48 ` Ethan Chen
2023-10-26 14:20 ` Peter Xu
2023-10-27 3:28 ` Ethan Chen via
2023-10-27 3:28 ` Ethan Chen
2023-10-27 16:02 ` Peter Xu
2023-10-27 16:13 ` Peter Xu
2023-10-30 6:00 ` Ethan Chen via
2023-10-30 6:00 ` Ethan Chen
2023-10-30 15:02 ` Peter Xu
2023-10-31 8:52 ` Ethan Chen via
2023-10-31 8:52 ` Ethan Chen
2023-10-25 5:14 ` [PATCH 3/6] exec/memattrs: Add iopmp source id to MemTxAttrs Ethan Chen via
2023-10-25 5:14 ` Ethan Chen
2023-10-25 5:14 ` [PATCH 4/6] Add RISC-V IOPMP support Ethan Chen via
2023-10-25 5:14 ` Ethan Chen
2023-10-25 5:14 ` [PATCH 5/6] hw/dma: Add Andes ATCDMAC300 support Ethan Chen via
2023-10-25 5:14 ` Ethan Chen
2023-10-25 5:14 ` [PATCH 6/6] hw/riscv/virt: Add IOPMP support Ethan Chen via
2023-10-25 5:14 ` Ethan Chen
2023-10-25 5:14 ` Ethan Chen via
2023-10-26 12:02 ` [PATCH 0/6] Support RISC-V IOPMP Ethan Chen via
2023-10-26 12:02 ` Ethan Chen
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