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From: Abel Vesa <abel.vesa@linaro.org>
To: Alexander Stein <alexander.stein@ew.tq-group.com>
Cc: Abel Vesa <abelvesa@kernel.org>, Peng Fan <peng.fan@nxp.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	NXP Linux Team <linux-imx@nxp.com>,
	linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	"Oliver F . Brown" <oliver.brown@oss.nxp.com>,
	Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>
Subject: Re: [PATCH 1/1] clk: imx: clk-imx8qxp: fix LVDS bypass, pixel and phy clocks
Date: Tue, 19 Dec 2023 18:52:20 +0200	[thread overview]
Message-ID: <ZYHKRISW1TNR3Ifd@linaro.org> (raw)
In-Reply-To: <20231218122407.2757175-1-alexander.stein@ew.tq-group.com>

On 23-12-18 13:24:07, Alexander Stein wrote:
> To be compatibel with SCU firmware based on 1.15 a different clock
> routing for LVDS is needed.
> 

compatible

> Signed-off-by: Oliver F. Brown <oliver.brown@oss.nxp.com>
> Signed-off-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>
> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>

With that:

Reviewed-by: Abel Vesa <abel.vesa@linaro.org>

> ---
> This patch originates from the downstream kernel squashing patches [1] and [2]
> as suggested by the commit message.
> I adjusted the commit so that the name stays the same as before.
> 
> I am somewhat unsure about the From: tag, as both commits have different
> authors.
> 
> Best regards,
> Alexander
> 
> [1] https://github.com/Freescale/linux-fslc/commit/05b5fd0eebd0
> [2] https://github.com/Freescale/linux-fslc/commit/0a202c564e5f
>  drivers/clk/imx/clk-imx8qxp.c | 24 ++++++++++++++++++++----
>  1 file changed, 20 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/clk/imx/clk-imx8qxp.c b/drivers/clk/imx/clk-imx8qxp.c
> index 41f0a45aa162..7d8883916cac 100644
> --- a/drivers/clk/imx/clk-imx8qxp.c
> +++ b/drivers/clk/imx/clk-imx8qxp.c
> @@ -66,6 +66,22 @@ static const char * const lcd_pxl_sels[] = {
>  	"lcd_pxl_bypass_div_clk",
>  };
>  
> +static const char *const lvds0_sels[] = {
> +	"clk_dummy",
> +	"clk_dummy",
> +	"clk_dummy",
> +	"clk_dummy",
> +	"mipi0_lvds_bypass_clk",
> +};
> +
> +static const char *const lvds1_sels[] = {
> +	"clk_dummy",
> +	"clk_dummy",
> +	"clk_dummy",
> +	"clk_dummy",
> +	"mipi1_lvds_bypass_clk",
> +};
> +
>  static const char * const mipi_sels[] = {
>  	"clk_dummy",
>  	"clk_dummy",
> @@ -207,9 +223,9 @@ static int imx8qxp_clk_probe(struct platform_device *pdev)
>  	/* MIPI-LVDS SS */
>  	imx_clk_scu("mipi0_bypass_clk", IMX_SC_R_MIPI_0, IMX_SC_PM_CLK_BYPASS);
>  	imx_clk_scu("mipi0_pixel_clk", IMX_SC_R_MIPI_0, IMX_SC_PM_CLK_PER);
> -	imx_clk_scu("mipi0_lvds_pixel_clk", IMX_SC_R_LVDS_0, IMX_SC_PM_CLK_MISC2);
>  	imx_clk_scu("mipi0_lvds_bypass_clk", IMX_SC_R_LVDS_0, IMX_SC_PM_CLK_BYPASS);
> -	imx_clk_scu("mipi0_lvds_phy_clk", IMX_SC_R_LVDS_0, IMX_SC_PM_CLK_MISC3);
> +	imx_clk_scu2("mipi0_lvds_pixel_clk", lvds0_sels, ARRAY_SIZE(lvds0_sels), IMX_SC_R_LVDS_0, IMX_SC_PM_CLK_MISC2);
> +	imx_clk_scu2("mipi0_lvds_phy_clk", lvds0_sels, ARRAY_SIZE(lvds0_sels), IMX_SC_R_LVDS_0, IMX_SC_PM_CLK_MISC3);
>  	imx_clk_scu2("mipi0_dsi_tx_esc_clk", mipi_sels, ARRAY_SIZE(mipi_sels), IMX_SC_R_MIPI_0, IMX_SC_PM_CLK_MST_BUS);
>  	imx_clk_scu2("mipi0_dsi_rx_esc_clk", mipi_sels, ARRAY_SIZE(mipi_sels), IMX_SC_R_MIPI_0, IMX_SC_PM_CLK_SLV_BUS);
>  	imx_clk_scu2("mipi0_dsi_phy_clk", mipi_sels, ARRAY_SIZE(mipi_sels), IMX_SC_R_MIPI_0, IMX_SC_PM_CLK_PHY);
> @@ -219,9 +235,9 @@ static int imx8qxp_clk_probe(struct platform_device *pdev)
>  
>  	imx_clk_scu("mipi1_bypass_clk", IMX_SC_R_MIPI_1, IMX_SC_PM_CLK_BYPASS);
>  	imx_clk_scu("mipi1_pixel_clk", IMX_SC_R_MIPI_1, IMX_SC_PM_CLK_PER);
> -	imx_clk_scu("mipi1_lvds_pixel_clk", IMX_SC_R_LVDS_1, IMX_SC_PM_CLK_MISC2);
>  	imx_clk_scu("mipi1_lvds_bypass_clk", IMX_SC_R_LVDS_1, IMX_SC_PM_CLK_BYPASS);
> -	imx_clk_scu("mipi1_lvds_phy_clk", IMX_SC_R_LVDS_1, IMX_SC_PM_CLK_MISC3);
> +	imx_clk_scu2("mipi1_lvds_pixel_clk", lvds1_sels, ARRAY_SIZE(lvds1_sels), IMX_SC_R_LVDS_1, IMX_SC_PM_CLK_MISC2);
> +	imx_clk_scu2("mipi1_lvds_phy_clk", lvds1_sels, ARRAY_SIZE(lvds1_sels), IMX_SC_R_LVDS_1, IMX_SC_PM_CLK_MISC3);
>  
>  	imx_clk_scu2("mipi1_dsi_tx_esc_clk", mipi_sels, ARRAY_SIZE(mipi_sels), IMX_SC_R_MIPI_1, IMX_SC_PM_CLK_MST_BUS);
>  	imx_clk_scu2("mipi1_dsi_rx_esc_clk", mipi_sels, ARRAY_SIZE(mipi_sels), IMX_SC_R_MIPI_1, IMX_SC_PM_CLK_SLV_BUS);
> -- 
> 2.34.1
> 

WARNING: multiple messages have this Message-ID (diff)
From: Abel Vesa <abel.vesa@linaro.org>
To: Alexander Stein <alexander.stein@ew.tq-group.com>
Cc: Abel Vesa <abelvesa@kernel.org>, Peng Fan <peng.fan@nxp.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	NXP Linux Team <linux-imx@nxp.com>,
	linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	"Oliver F . Brown" <oliver.brown@oss.nxp.com>,
	Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>
Subject: Re: [PATCH 1/1] clk: imx: clk-imx8qxp: fix LVDS bypass, pixel and phy clocks
Date: Tue, 19 Dec 2023 18:52:20 +0200	[thread overview]
Message-ID: <ZYHKRISW1TNR3Ifd@linaro.org> (raw)
In-Reply-To: <20231218122407.2757175-1-alexander.stein@ew.tq-group.com>

On 23-12-18 13:24:07, Alexander Stein wrote:
> To be compatibel with SCU firmware based on 1.15 a different clock
> routing for LVDS is needed.
> 

compatible

> Signed-off-by: Oliver F. Brown <oliver.brown@oss.nxp.com>
> Signed-off-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>
> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>

With that:

Reviewed-by: Abel Vesa <abel.vesa@linaro.org>

> ---
> This patch originates from the downstream kernel squashing patches [1] and [2]
> as suggested by the commit message.
> I adjusted the commit so that the name stays the same as before.
> 
> I am somewhat unsure about the From: tag, as both commits have different
> authors.
> 
> Best regards,
> Alexander
> 
> [1] https://github.com/Freescale/linux-fslc/commit/05b5fd0eebd0
> [2] https://github.com/Freescale/linux-fslc/commit/0a202c564e5f
>  drivers/clk/imx/clk-imx8qxp.c | 24 ++++++++++++++++++++----
>  1 file changed, 20 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/clk/imx/clk-imx8qxp.c b/drivers/clk/imx/clk-imx8qxp.c
> index 41f0a45aa162..7d8883916cac 100644
> --- a/drivers/clk/imx/clk-imx8qxp.c
> +++ b/drivers/clk/imx/clk-imx8qxp.c
> @@ -66,6 +66,22 @@ static const char * const lcd_pxl_sels[] = {
>  	"lcd_pxl_bypass_div_clk",
>  };
>  
> +static const char *const lvds0_sels[] = {
> +	"clk_dummy",
> +	"clk_dummy",
> +	"clk_dummy",
> +	"clk_dummy",
> +	"mipi0_lvds_bypass_clk",
> +};
> +
> +static const char *const lvds1_sels[] = {
> +	"clk_dummy",
> +	"clk_dummy",
> +	"clk_dummy",
> +	"clk_dummy",
> +	"mipi1_lvds_bypass_clk",
> +};
> +
>  static const char * const mipi_sels[] = {
>  	"clk_dummy",
>  	"clk_dummy",
> @@ -207,9 +223,9 @@ static int imx8qxp_clk_probe(struct platform_device *pdev)
>  	/* MIPI-LVDS SS */
>  	imx_clk_scu("mipi0_bypass_clk", IMX_SC_R_MIPI_0, IMX_SC_PM_CLK_BYPASS);
>  	imx_clk_scu("mipi0_pixel_clk", IMX_SC_R_MIPI_0, IMX_SC_PM_CLK_PER);
> -	imx_clk_scu("mipi0_lvds_pixel_clk", IMX_SC_R_LVDS_0, IMX_SC_PM_CLK_MISC2);
>  	imx_clk_scu("mipi0_lvds_bypass_clk", IMX_SC_R_LVDS_0, IMX_SC_PM_CLK_BYPASS);
> -	imx_clk_scu("mipi0_lvds_phy_clk", IMX_SC_R_LVDS_0, IMX_SC_PM_CLK_MISC3);
> +	imx_clk_scu2("mipi0_lvds_pixel_clk", lvds0_sels, ARRAY_SIZE(lvds0_sels), IMX_SC_R_LVDS_0, IMX_SC_PM_CLK_MISC2);
> +	imx_clk_scu2("mipi0_lvds_phy_clk", lvds0_sels, ARRAY_SIZE(lvds0_sels), IMX_SC_R_LVDS_0, IMX_SC_PM_CLK_MISC3);
>  	imx_clk_scu2("mipi0_dsi_tx_esc_clk", mipi_sels, ARRAY_SIZE(mipi_sels), IMX_SC_R_MIPI_0, IMX_SC_PM_CLK_MST_BUS);
>  	imx_clk_scu2("mipi0_dsi_rx_esc_clk", mipi_sels, ARRAY_SIZE(mipi_sels), IMX_SC_R_MIPI_0, IMX_SC_PM_CLK_SLV_BUS);
>  	imx_clk_scu2("mipi0_dsi_phy_clk", mipi_sels, ARRAY_SIZE(mipi_sels), IMX_SC_R_MIPI_0, IMX_SC_PM_CLK_PHY);
> @@ -219,9 +235,9 @@ static int imx8qxp_clk_probe(struct platform_device *pdev)
>  
>  	imx_clk_scu("mipi1_bypass_clk", IMX_SC_R_MIPI_1, IMX_SC_PM_CLK_BYPASS);
>  	imx_clk_scu("mipi1_pixel_clk", IMX_SC_R_MIPI_1, IMX_SC_PM_CLK_PER);
> -	imx_clk_scu("mipi1_lvds_pixel_clk", IMX_SC_R_LVDS_1, IMX_SC_PM_CLK_MISC2);
>  	imx_clk_scu("mipi1_lvds_bypass_clk", IMX_SC_R_LVDS_1, IMX_SC_PM_CLK_BYPASS);
> -	imx_clk_scu("mipi1_lvds_phy_clk", IMX_SC_R_LVDS_1, IMX_SC_PM_CLK_MISC3);
> +	imx_clk_scu2("mipi1_lvds_pixel_clk", lvds1_sels, ARRAY_SIZE(lvds1_sels), IMX_SC_R_LVDS_1, IMX_SC_PM_CLK_MISC2);
> +	imx_clk_scu2("mipi1_lvds_phy_clk", lvds1_sels, ARRAY_SIZE(lvds1_sels), IMX_SC_R_LVDS_1, IMX_SC_PM_CLK_MISC3);
>  
>  	imx_clk_scu2("mipi1_dsi_tx_esc_clk", mipi_sels, ARRAY_SIZE(mipi_sels), IMX_SC_R_MIPI_1, IMX_SC_PM_CLK_MST_BUS);
>  	imx_clk_scu2("mipi1_dsi_rx_esc_clk", mipi_sels, ARRAY_SIZE(mipi_sels), IMX_SC_R_MIPI_1, IMX_SC_PM_CLK_SLV_BUS);
> -- 
> 2.34.1
> 

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  reply	other threads:[~2023-12-19 16:52 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-18 12:24 [PATCH 1/1] clk: imx: clk-imx8qxp: fix LVDS bypass, pixel and phy clocks Alexander Stein
2023-12-18 12:24 ` Alexander Stein
2023-12-19 16:52 ` Abel Vesa [this message]
2023-12-19 16:52   ` Abel Vesa
2023-12-20  9:26 ` Abel Vesa
2023-12-20  9:26   ` Abel Vesa

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