[PATCH] drm/i915: clear the QGV mask set by GOP while booting

[PATCH] drm/i915: clear the QGV mask set by GOP while booting

[George D Sworo]

From: George D Sworo <george.d.sworo@intel.com>

GOP driver in the firmware is masking the QGV points except the one
which can
provide high Bandwidth required for panel.

On boot to the OS the mask is already set, and is not cleared anywhere
in the i915 driver
even though sagv is enabled. This means Pcode is unable to switch to
other QGV work points
except the one enabled by default in the GOP driver at boot time.

This change resets the mask, when i915 driver is finding the QGV
points at the boot time. So that Pcode can switch to QGV work points
based
on the Workloads.

Signed-off-by: George D Sworo <george.d.sworo@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bw.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index bef96db62c80..e2576c0fb729 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -212,6 +212,7 @@ static int icl_get_qgv_points(struct drm_i915_private *dev_priv,
 			      bool is_y_tile)
 {
 	const struct dram_info *dram_info = &dev_priv->dram_info;
+	u32 val = 0x00, val2 = 0;
 	int i, ret;
 
 	qi->num_points = dram_info->num_qgv_points;
@@ -311,6 +312,11 @@ static int icl_get_qgv_points(struct drm_i915_private *dev_priv,
 				    i, qi->psf_points[i].clk);
 	}
 
+	/* clear the QGV points mask set by the GOP driver while booting */
+	ret = snb_pcode_read(&dev_priv->uncore, ICL_PCODE_SAGV_DE_MEM_SS_CONFIG, &val, &val2);
+	if (ret)
+		return ret;
+
 	return 0;
 }
 
-- 
2.34.1

Re: [PATCH] drm/i915: clear the QGV mask set by GOP while booting

[Lisovskiy, Stanislav]

On Wed, Jan 03, 2024 at 06:57:45PM -0800, George D Sworo wrote:
> From: George D Sworo <george.d.sworo@intel.com>
> 
> GOP driver in the firmware is masking the QGV points except the one
> which can
> provide high Bandwidth required for panel.
> 
> On boot to the OS the mask is already set, and is not cleared anywhere
> in the i915 driver
> even though sagv is enabled. This means Pcode is unable to switch to
> other QGV work points
> except the one enabled by default in the GOP driver at boot time.
> 
> This change resets the mask, when i915 driver is finding the QGV
> points at the boot time. So that Pcode can switch to QGV work points
> based
> on the Workloads.
> 
> Signed-off-by: George D Sworo <george.d.sworo@intel.com>

Hi,

We already have a case similar to this, you might want to check this out:

https://patchwork.freedesktop.org/series/126962/

Stan

> ---
>  drivers/gpu/drm/i915/display/intel_bw.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
> index bef96db62c80..e2576c0fb729 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -212,6 +212,7 @@ static int icl_get_qgv_points(struct drm_i915_private *dev_priv,
>  			      bool is_y_tile)
>  {
>  	const struct dram_info *dram_info = &dev_priv->dram_info;
> +	u32 val = 0x00, val2 = 0;
>  	int i, ret;
>  
>  	qi->num_points = dram_info->num_qgv_points;
> @@ -311,6 +312,11 @@ static int icl_get_qgv_points(struct drm_i915_private *dev_priv,
>  				    i, qi->psf_points[i].clk);
>  	}
>  
> +	/* clear the QGV points mask set by the GOP driver while booting */
> +	ret = snb_pcode_read(&dev_priv->uncore, ICL_PCODE_SAGV_DE_MEM_SS_CONFIG, &val, &val2);
> +	if (ret)
> +		return ret;
> +
>  	return 0;
>  }
>  
> -- 
> 2.34.1
> 

Re: [PATCH] drm/i915: clear the QGV mask set by GOP while booting

[Lisovskiy, Stanislav]

On Wed, Jan 03, 2024 at 06:57:45PM -0800, George D Sworo wrote:
> From: George D Sworo <george.d.sworo@intel.com>
> 
> GOP driver in the firmware is masking the QGV points except the one
> which can
> provide high Bandwidth required for panel.
> 
> On boot to the OS the mask is already set, and is not cleared anywhere
> in the i915 driver
> even though sagv is enabled. This means Pcode is unable to switch to
> other QGV work points
> except the one enabled by default in the GOP driver at boot time.
> 
> This change resets the mask, when i915 driver is finding the QGV
> points at the boot time. So that Pcode can switch to QGV work points
> based
> on the Workloads.
> 
> Signed-off-by: George D Sworo <george.d.sworo@intel.com>


Hi,

We already have a case similar to this, you might want to check this out:

https://patchwork.freedesktop.org/series/126962/

Stan


> ---
>  drivers/gpu/drm/i915/display/intel_bw.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
> index bef96db62c80..e2576c0fb729 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -212,6 +212,7 @@ static int icl_get_qgv_points(struct drm_i915_private *dev_priv,
>  			      bool is_y_tile)
>  {
>  	const struct dram_info *dram_info = &dev_priv->dram_info;
> +	u32 val = 0x00, val2 = 0;
>  	int i, ret;
>  
>  	qi->num_points = dram_info->num_qgv_points;
> @@ -311,6 +312,11 @@ static int icl_get_qgv_points(struct drm_i915_private *dev_priv,
>  				    i, qi->psf_points[i].clk);
>  	}
>  
> +	/* clear the QGV points mask set by the GOP driver while booting */
> +	ret = snb_pcode_read(&dev_priv->uncore, ICL_PCODE_SAGV_DE_MEM_SS_CONFIG, &val, &val2);
> +	if (ret)
> +		return ret;
> +
>  	return 0;
>  }
>  
> -- 
> 2.34.1
> 

Re: [PATCH] drm/i915: clear the QGV mask set by GOP while booting

[Sworo, George D]

On Thu, 2024-01-04 at 10:13 +0200, Lisovskiy, Stanislav wrote:
> On Wed, Jan 03, 2024 at 06:57:45PM -0800, George D Sworo wrote:
> > From: George D Sworo <george.d.sworo@intel.com>
> > 
> > GOP driver in the firmware is masking the QGV points except the one
> > which can
> > provide high Bandwidth required for panel.
> > 
> > On boot to the OS the mask is already set, and is not cleared
> > anywhere
> > in the i915 driver
> > even though sagv is enabled. This means Pcode is unable to switch
> > to
> > other QGV work points
> > except the one enabled by default in the GOP driver at boot time.
> > 
> > This change resets the mask, when i915 driver is finding the QGV
> > points at the boot time. So that Pcode can switch to QGV work
> > points
> > based
> > on the Workloads.
> > 
> > Signed-off-by: George D Sworo <george.d.sworo@intel.com>
> 
> Hi,
> 
> We already have a case similar to this, you might want to check this
> out:
> 
> https://patchwork.freedesktop.org/series/126962/
> 
> Stan
> 
> > ---
> >  drivers/gpu/drm/i915/display/intel_bw.c | 6 ++++++
> >  1 file changed, 6 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_bw.c
> > b/drivers/gpu/drm/i915/display/intel_bw.c
> > index bef96db62c80..e2576c0fb729 100644
> > --- a/drivers/gpu/drm/i915/display/intel_bw.c
> > +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> > @@ -212,6 +212,7 @@ static int icl_get_qgv_points(struct
> > drm_i915_private *dev_priv,
> >  			      bool is_y_tile)
> >  {
> >  	const struct dram_info *dram_info = &dev_priv->dram_info;
> > +	u32 val = 0x00, val2 = 0;
> >  	int i, ret;
> >  
> >  	qi->num_points = dram_info->num_qgv_points;
> > @@ -311,6 +312,11 @@ static int icl_get_qgv_points(struct
> > drm_i915_private *dev_priv,
> >  				    i, qi->psf_points[i].clk);
> >  	}
> >  
> > +	/* clear the QGV points mask set by the GOP driver while
> > booting */
> > +	ret = snb_pcode_read(&dev_priv->uncore,
> > ICL_PCODE_SAGV_DE_MEM_SS_CONFIG, &val, &val2);
> > +	if (ret)
> > +		return ret;
> > +
> >  	return 0;
> >  }
> >  
> > -- 
> > 2.34.1
> > 

hi Stan,

Thanks for the quick reply. unfortunately, SAGV frequency doesnt seem
to be scaling even with this patch added 
https://patchwork.freedesktop.org/series/126962/ .

[PATCH] drm/i915: clear the QGV mask set by GOP while booting

[george.d.sworo]

From: George D Sworo <george.d.sworo@intel.com>

GOP driver in the firmware is masking the QGV points except the one
which can
provide high Bandwidth required for panel.

On boot to the OS the mask is already set, and is not cleared anywhere
in the i915 driver
even though sagv is enabled. This means Pcode is unable to switch to
other QGV work points
except the one enabled by default in the GOP driver at boot time.

This change resets the mask, when i915 driver is finding the QGV
points at the boot time. So that Pcode can switch to QGV work points
based
on the Workloads.

Signed-off-by: George D Sworo <george.d.sworo@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bw.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index bef96db62c80..e2576c0fb729 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -212,6 +212,7 @@ static int icl_get_qgv_points(struct drm_i915_private *dev_priv,
 			      bool is_y_tile)
 {
 	const struct dram_info *dram_info = &dev_priv->dram_info;
+	u32 val = 0x00, val2 = 0;
 	int i, ret;
 
 	qi->num_points = dram_info->num_qgv_points;
@@ -311,6 +312,11 @@ static int icl_get_qgv_points(struct drm_i915_private *dev_priv,
 				    i, qi->psf_points[i].clk);
 	}
 
+	/* clear the QGV points mask set by the GOP driver while booting */
+	ret = snb_pcode_read(&dev_priv->uncore, ICL_PCODE_SAGV_DE_MEM_SS_CONFIG, &val, &val2);
+	if (ret)
+		return ret;
+
 	return 0;
 }
 
-- 
2.34.1

Re: [PATCH] drm/i915: clear the QGV mask set by GOP while booting

[Sworo, George D]

On Thu, 2024-01-04 at 11:04 -0800, george.d.sworo@intel.com wrote:
> From: George D Sworo <george.d.sworo@intel.com>
> 
> GOP driver in the firmware is masking the QGV points except the one
> which can
> provide high Bandwidth required for panel.
> 
> On boot to the OS the mask is already set, and is not cleared
> anywhere
> in the i915 driver
> even though sagv is enabled. This means Pcode is unable to switch to
> other QGV work points
> except the one enabled by default in the GOP driver at boot time.
> 
> This change resets the mask, when i915 driver is finding the QGV
> points at the boot time. So that Pcode can switch to QGV work points
> based
> on the Workloads.
> 
> Signed-off-by: George D Sworo <george.d.sworo@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_bw.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c
> b/drivers/gpu/drm/i915/display/intel_bw.c
> index bef96db62c80..e2576c0fb729 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -212,6 +212,7 @@ static int icl_get_qgv_points(struct
> drm_i915_private *dev_priv,
>  			      bool is_y_tile)
>  {
>  	const struct dram_info *dram_info = &dev_priv->dram_info;
> +	u32 val = 0x00, val2 = 0;
>  	int i, ret;
>  
>  	qi->num_points = dram_info->num_qgv_points;
> @@ -311,6 +312,11 @@ static int icl_get_qgv_points(struct
> drm_i915_private *dev_priv,
>  				    i, qi->psf_points[i].clk);
>  	}
>  
> +	/* clear the QGV points mask set by the GOP driver while
> booting */
> +	ret = snb_pcode_read(&dev_priv->uncore,
> ICL_PCODE_SAGV_DE_MEM_SS_CONFIG, &val, &val2);
> +	if (ret)
> +		return ret;
> +
>  	return 0;
>  }
>  

hi Stan,

Thanks for the quick reply. unfortunately, SAGV frequency doesnt seem
to be scaling even with this patch added 
https://patchwork.freedesktop.org/series/126962/ .
Apologies, the first patch you replied to was sent with an email that
was not registered with intel-gfx. I had to resubmit. 

✗ Fi.CI.BAT: failure for drm/i915: clear the QGV mask set by GOP while booting (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 6576 bytes --]

== Series Details ==

Series: drm/i915: clear the QGV mask set by GOP while booting (rev2)
URL   : https://patchwork.freedesktop.org/series/128223/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_14093 -> Patchwork_128223v2
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_128223v2 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_128223v2, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128223v2/index.html

Participating hosts (37 -> 39)
------------------------------

  Additional (3): bat-rpls-2 fi-bsw-n3050 fi-pnv-d510 
  Missing    (1): fi-snb-2520m 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_128223v2:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_module_load@load:
    - fi-rkl-11600:       [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14093/fi-rkl-11600/igt@i915_module_load@load.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128223v2/fi-rkl-11600/igt@i915_module_load@load.html
    - bat-dg1-7:          [PASS][3] -> [ABORT][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14093/bat-dg1-7/igt@i915_module_load@load.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128223v2/bat-dg1-7/igt@i915_module_load@load.html
    - fi-tgl-1115g4:      [PASS][5] -> [INCOMPLETE][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14093/fi-tgl-1115g4/igt@i915_module_load@load.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128223v2/fi-tgl-1115g4/igt@i915_module_load@load.html
    - bat-mtlp-6:         [PASS][7] -> [INCOMPLETE][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14093/bat-mtlp-6/igt@i915_module_load@load.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128223v2/bat-mtlp-6/igt@i915_module_load@load.html
    - bat-rpls-2:         NOTRUN -> [ABORT][9]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128223v2/bat-rpls-2/igt@i915_module_load@load.html
    - bat-mtlp-8:         [PASS][10] -> [INCOMPLETE][11]
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14093/bat-mtlp-8/igt@i915_module_load@load.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128223v2/bat-mtlp-8/igt@i915_module_load@load.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_module_load@load:
    - {bat-adls-6}:       [PASS][12] -> [ABORT][13]
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14093/bat-adls-6/igt@i915_module_load@load.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128223v2/bat-adls-6/igt@i915_module_load@load.html

  
Known issues
------------

  Here are the changes found in Patchwork_128223v2 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_lmem_swapping@basic:
    - fi-pnv-d510:        NOTRUN -> [SKIP][14] ([fdo#109271]) +31 other tests skip
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128223v2/fi-pnv-d510/igt@gem_lmem_swapping@basic.html

  * igt@gem_lmem_swapping@random-engines:
    - fi-bsw-n3050:       NOTRUN -> [SKIP][15] ([fdo#109271]) +15 other tests skip
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128223v2/fi-bsw-n3050/igt@gem_lmem_swapping@random-engines.html

  * igt@kms_pm_backlight@basic-brightness@edp-1:
    - bat-rplp-1:         NOTRUN -> [ABORT][16] ([i915#8668])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128223v2/bat-rplp-1/igt@kms_pm_backlight@basic-brightness@edp-1.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@hangcheck:
    - {bat-rpls-3}:       [DMESG-WARN][17] ([i915#5591]) -> [PASS][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14093/bat-rpls-3/igt@i915_selftest@live@hangcheck.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128223v2/bat-rpls-3/igt@i915_selftest@live@hangcheck.html
    - {bat-dg2-14}:       [ABORT][19] ([i915#9840]) -> [PASS][20]
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14093/bat-dg2-14/igt@i915_selftest@live@hangcheck.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128223v2/bat-dg2-14/igt@i915_selftest@live@hangcheck.html

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
    - bat-rplp-1:         [ABORT][21] ([i915#8668] / [i915#9368]) -> [PASS][22]
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14093/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128223v2/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1.html

  * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-dp-3:
    - fi-kbl-7567u:       [FAIL][23] -> [PASS][24] +2 other tests pass
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14093/fi-kbl-7567u/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-dp-3.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128223v2/fi-kbl-7567u/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-dp-3.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#5591]: https://gitlab.freedesktop.org/drm/intel/issues/5591
  [i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
  [i915#9368]: https://gitlab.freedesktop.org/drm/intel/issues/9368
  [i915#9840]: https://gitlab.freedesktop.org/drm/intel/issues/9840


Build changes
-------------

  * Linux: CI_DRM_14093 -> Patchwork_128223v2

  CI-20190529: 20190529
  CI_DRM_14093: 9b1ed6b14bc86ec11c031a76c807bffe43609198 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7661: 17df2eb8cded19c629cacee8a369629b56976068 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_128223v2: 9b1ed6b14bc86ec11c031a76c807bffe43609198 @ git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

428bf8f437c9 drm/i915: clear the QGV mask set by GOP while booting

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128223v2/index.html

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