From: Daniel Vetter <daniel@ffwll.ch>
To: "André Almeida" <andrealmeid@igalia.com>
Cc: daniel@ffwll.ch, "'Marek Olšák'" <maraeo@gmail.com>,
"Michel Dänzer" <michel.daenzer@mailbox.org>,
"Simon Ser" <contact@emersion.fr>,
linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org,
"Xaver Hugl" <xaver.hugl@gmail.com>,
"Pekka Paalanen" <ppaalanen@gmail.com>,
dri-devel@lists.freedesktop.org, kernel-dev@igalia.com,
alexander.deucher@amd.com, "Joshua Ashton" <joshua@froggi.es>,
"Daniel Stone" <daniel@fooishbar.org>,
"Dave Airlie" <airlied@gmail.com>,
christian.koenig@amd.com, ville.syrjala@linux.intel.com
Subject: Re: [PATCH v3 3/3] drm/amdgpu: Implement check_async_props for planes
Date: Tue, 30 Jan 2024 11:56:08 +0100 [thread overview]
Message-ID: <ZbjVyI_AnTBHACT8@phenom.ffwll.local> (raw)
In-Reply-To: <20240128212515.630345-4-andrealmeid@igalia.com>
On Sun, Jan 28, 2024 at 06:25:15PM -0300, André Almeida wrote:
> AMD GPUs can do async flips with changes on more properties than just
> the FB ID, so implement a custom check_async_props for AMD planes.
>
> Allow amdgpu to do async flips with overlay planes as well.
>
> Signed-off-by: André Almeida <andrealmeid@igalia.com>
> ---
> v3: allow overlay planes
This comment very much written with a lack of clearly better ideas, but:
Do we really need this much flexibility, especially for the first driver
adding the first few additional properties?
A simple bool on struct drm_plane to indicate whether async flips are ok
or not should also do this job here? Maybe a bit of work to roll that out
to the primary planes for current drivers, but not much. And wouldn't need
drivers to implement some very uapi-marshalling atomic code ...
Also we could probably remove the current drm_mode_config.async_flip flag
and entirely replace it with the per-plane one.
-Sima
>
> .../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 29 +++++++++++++++++++
> 1 file changed, 29 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
> index 116121e647ca..ed75b69636b4 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
> @@ -25,6 +25,7 @@
> */
>
> #include <drm/drm_atomic_helper.h>
> +#include <drm/drm_atomic_uapi.h>
> #include <drm/drm_blend.h>
> #include <drm/drm_gem_atomic_helper.h>
> #include <drm/drm_plane_helper.h>
> @@ -1430,6 +1431,33 @@ static void amdgpu_dm_plane_drm_plane_destroy_state(struct drm_plane *plane,
> drm_atomic_helper_plane_destroy_state(plane, state);
> }
>
> +static int amdgpu_dm_plane_check_async_props(struct drm_property *prop,
> + struct drm_plane *plane,
> + struct drm_plane_state *plane_state,
> + struct drm_mode_object *obj,
> + u64 prop_value, u64 old_val)
> +{
> + struct drm_mode_config *config = &plane->dev->mode_config;
> + int ret;
> +
> + if (prop != config->prop_fb_id &&
> + prop != config->prop_in_fence_fd) {
> + ret = drm_atomic_plane_get_property(plane, plane_state,
> + prop, &old_val);
> + return drm_atomic_check_prop_changes(ret, old_val, prop_value, prop);
> + }
> +
> + if (plane_state->plane->type != DRM_PLANE_TYPE_PRIMARY &&
> + plane_state->plane->type != DRM_PLANE_TYPE_OVERLAY) {
> + drm_dbg_atomic(prop->dev,
> + "[OBJECT:%d] Only primary or overlay planes can be changed during async flip\n",
> + obj->id);
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> static const struct drm_plane_funcs dm_plane_funcs = {
> .update_plane = drm_atomic_helper_update_plane,
> .disable_plane = drm_atomic_helper_disable_plane,
> @@ -1438,6 +1466,7 @@ static const struct drm_plane_funcs dm_plane_funcs = {
> .atomic_duplicate_state = amdgpu_dm_plane_drm_plane_duplicate_state,
> .atomic_destroy_state = amdgpu_dm_plane_drm_plane_destroy_state,
> .format_mod_supported = amdgpu_dm_plane_format_mod_supported,
> + .check_async_props = amdgpu_dm_plane_check_async_props,
> };
>
> int amdgpu_dm_plane_init(struct amdgpu_display_manager *dm,
> --
> 2.43.0
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
WARNING: multiple messages have this Message-ID (diff)
From: Daniel Vetter <daniel@ffwll.ch>
To: "André Almeida" <andrealmeid@igalia.com>
Cc: daniel@ffwll.ch, "'Marek Olšák'" <maraeo@gmail.com>,
"Michel Dänzer" <michel.daenzer@mailbox.org>,
linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org,
"Xaver Hugl" <xaver.hugl@gmail.com>,
"Pekka Paalanen" <ppaalanen@gmail.com>,
dri-devel@lists.freedesktop.org, kernel-dev@igalia.com,
alexander.deucher@amd.com, "Joshua Ashton" <joshua@froggi.es>,
"Dave Airlie" <airlied@gmail.com>,
christian.koenig@amd.com
Subject: Re: [PATCH v3 3/3] drm/amdgpu: Implement check_async_props for planes
Date: Tue, 30 Jan 2024 11:56:08 +0100 [thread overview]
Message-ID: <ZbjVyI_AnTBHACT8@phenom.ffwll.local> (raw)
In-Reply-To: <20240128212515.630345-4-andrealmeid@igalia.com>
On Sun, Jan 28, 2024 at 06:25:15PM -0300, André Almeida wrote:
> AMD GPUs can do async flips with changes on more properties than just
> the FB ID, so implement a custom check_async_props for AMD planes.
>
> Allow amdgpu to do async flips with overlay planes as well.
>
> Signed-off-by: André Almeida <andrealmeid@igalia.com>
> ---
> v3: allow overlay planes
This comment very much written with a lack of clearly better ideas, but:
Do we really need this much flexibility, especially for the first driver
adding the first few additional properties?
A simple bool on struct drm_plane to indicate whether async flips are ok
or not should also do this job here? Maybe a bit of work to roll that out
to the primary planes for current drivers, but not much. And wouldn't need
drivers to implement some very uapi-marshalling atomic code ...
Also we could probably remove the current drm_mode_config.async_flip flag
and entirely replace it with the per-plane one.
-Sima
>
> .../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 29 +++++++++++++++++++
> 1 file changed, 29 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
> index 116121e647ca..ed75b69636b4 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
> @@ -25,6 +25,7 @@
> */
>
> #include <drm/drm_atomic_helper.h>
> +#include <drm/drm_atomic_uapi.h>
> #include <drm/drm_blend.h>
> #include <drm/drm_gem_atomic_helper.h>
> #include <drm/drm_plane_helper.h>
> @@ -1430,6 +1431,33 @@ static void amdgpu_dm_plane_drm_plane_destroy_state(struct drm_plane *plane,
> drm_atomic_helper_plane_destroy_state(plane, state);
> }
>
> +static int amdgpu_dm_plane_check_async_props(struct drm_property *prop,
> + struct drm_plane *plane,
> + struct drm_plane_state *plane_state,
> + struct drm_mode_object *obj,
> + u64 prop_value, u64 old_val)
> +{
> + struct drm_mode_config *config = &plane->dev->mode_config;
> + int ret;
> +
> + if (prop != config->prop_fb_id &&
> + prop != config->prop_in_fence_fd) {
> + ret = drm_atomic_plane_get_property(plane, plane_state,
> + prop, &old_val);
> + return drm_atomic_check_prop_changes(ret, old_val, prop_value, prop);
> + }
> +
> + if (plane_state->plane->type != DRM_PLANE_TYPE_PRIMARY &&
> + plane_state->plane->type != DRM_PLANE_TYPE_OVERLAY) {
> + drm_dbg_atomic(prop->dev,
> + "[OBJECT:%d] Only primary or overlay planes can be changed during async flip\n",
> + obj->id);
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> static const struct drm_plane_funcs dm_plane_funcs = {
> .update_plane = drm_atomic_helper_update_plane,
> .disable_plane = drm_atomic_helper_disable_plane,
> @@ -1438,6 +1466,7 @@ static const struct drm_plane_funcs dm_plane_funcs = {
> .atomic_duplicate_state = amdgpu_dm_plane_drm_plane_duplicate_state,
> .atomic_destroy_state = amdgpu_dm_plane_drm_plane_destroy_state,
> .format_mod_supported = amdgpu_dm_plane_format_mod_supported,
> + .check_async_props = amdgpu_dm_plane_check_async_props,
> };
>
> int amdgpu_dm_plane_init(struct amdgpu_display_manager *dm,
> --
> 2.43.0
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
WARNING: multiple messages have this Message-ID (diff)
From: Daniel Vetter <daniel@ffwll.ch>
To: "André Almeida" <andrealmeid@igalia.com>
Cc: dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org,
linux-kernel@vger.kernel.org, kernel-dev@igalia.com,
alexander.deucher@amd.com, christian.koenig@amd.com,
"Simon Ser" <contact@emersion.fr>,
"Pekka Paalanen" <ppaalanen@gmail.com>,
daniel@ffwll.ch, "Daniel Stone" <daniel@fooishbar.org>,
"'Marek Olšák'" <maraeo@gmail.com>,
"Dave Airlie" <airlied@gmail.com>,
ville.syrjala@linux.intel.com,
"Xaver Hugl" <xaver.hugl@gmail.com>,
"Joshua Ashton" <joshua@froggi.es>,
"Michel Dänzer" <michel.daenzer@mailbox.org>
Subject: Re: [PATCH v3 3/3] drm/amdgpu: Implement check_async_props for planes
Date: Tue, 30 Jan 2024 11:56:08 +0100 [thread overview]
Message-ID: <ZbjVyI_AnTBHACT8@phenom.ffwll.local> (raw)
In-Reply-To: <20240128212515.630345-4-andrealmeid@igalia.com>
On Sun, Jan 28, 2024 at 06:25:15PM -0300, André Almeida wrote:
> AMD GPUs can do async flips with changes on more properties than just
> the FB ID, so implement a custom check_async_props for AMD planes.
>
> Allow amdgpu to do async flips with overlay planes as well.
>
> Signed-off-by: André Almeida <andrealmeid@igalia.com>
> ---
> v3: allow overlay planes
This comment very much written with a lack of clearly better ideas, but:
Do we really need this much flexibility, especially for the first driver
adding the first few additional properties?
A simple bool on struct drm_plane to indicate whether async flips are ok
or not should also do this job here? Maybe a bit of work to roll that out
to the primary planes for current drivers, but not much. And wouldn't need
drivers to implement some very uapi-marshalling atomic code ...
Also we could probably remove the current drm_mode_config.async_flip flag
and entirely replace it with the per-plane one.
-Sima
>
> .../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 29 +++++++++++++++++++
> 1 file changed, 29 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
> index 116121e647ca..ed75b69636b4 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
> @@ -25,6 +25,7 @@
> */
>
> #include <drm/drm_atomic_helper.h>
> +#include <drm/drm_atomic_uapi.h>
> #include <drm/drm_blend.h>
> #include <drm/drm_gem_atomic_helper.h>
> #include <drm/drm_plane_helper.h>
> @@ -1430,6 +1431,33 @@ static void amdgpu_dm_plane_drm_plane_destroy_state(struct drm_plane *plane,
> drm_atomic_helper_plane_destroy_state(plane, state);
> }
>
> +static int amdgpu_dm_plane_check_async_props(struct drm_property *prop,
> + struct drm_plane *plane,
> + struct drm_plane_state *plane_state,
> + struct drm_mode_object *obj,
> + u64 prop_value, u64 old_val)
> +{
> + struct drm_mode_config *config = &plane->dev->mode_config;
> + int ret;
> +
> + if (prop != config->prop_fb_id &&
> + prop != config->prop_in_fence_fd) {
> + ret = drm_atomic_plane_get_property(plane, plane_state,
> + prop, &old_val);
> + return drm_atomic_check_prop_changes(ret, old_val, prop_value, prop);
> + }
> +
> + if (plane_state->plane->type != DRM_PLANE_TYPE_PRIMARY &&
> + plane_state->plane->type != DRM_PLANE_TYPE_OVERLAY) {
> + drm_dbg_atomic(prop->dev,
> + "[OBJECT:%d] Only primary or overlay planes can be changed during async flip\n",
> + obj->id);
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> static const struct drm_plane_funcs dm_plane_funcs = {
> .update_plane = drm_atomic_helper_update_plane,
> .disable_plane = drm_atomic_helper_disable_plane,
> @@ -1438,6 +1466,7 @@ static const struct drm_plane_funcs dm_plane_funcs = {
> .atomic_duplicate_state = amdgpu_dm_plane_drm_plane_duplicate_state,
> .atomic_destroy_state = amdgpu_dm_plane_drm_plane_destroy_state,
> .format_mod_supported = amdgpu_dm_plane_format_mod_supported,
> + .check_async_props = amdgpu_dm_plane_check_async_props,
> };
>
> int amdgpu_dm_plane_init(struct amdgpu_display_manager *dm,
> --
> 2.43.0
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
next prev parent reply other threads:[~2024-01-30 10:57 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-28 21:25 [PATCH v3 0/3] drm/atomic: Allow drivers to write their own plane check for async André Almeida
2024-01-28 21:25 ` André Almeida
2024-01-28 21:25 ` André Almeida
2024-01-28 21:25 ` [PATCH v3 1/3] drm/atomic: Allow drivers to write their own plane check for async flips André Almeida
2024-01-28 21:25 ` André Almeida
2024-01-28 21:25 ` André Almeida
2024-01-29 8:49 ` Pekka Paalanen
2024-01-29 8:49 ` Pekka Paalanen
2024-01-29 8:49 ` Pekka Paalanen
2024-02-01 18:42 ` André Almeida
2024-01-28 21:25 ` [PATCH v3 2/3] drm/atomic: Allow userspace to use explicit sync with atomic " André Almeida
2024-01-28 21:25 ` André Almeida
2024-01-28 21:25 ` André Almeida
2024-01-28 21:25 ` [PATCH v3 3/3] drm/amdgpu: Implement check_async_props for planes André Almeida
2024-01-28 21:25 ` André Almeida
2024-01-28 21:25 ` André Almeida
2024-01-30 10:56 ` Daniel Vetter [this message]
2024-01-30 10:56 ` Daniel Vetter
2024-01-30 10:56 ` Daniel Vetter
2024-01-30 11:02 ` Simon Ser
2024-01-30 11:02 ` Simon Ser
2024-01-30 11:02 ` Simon Ser
2024-02-01 18:45 ` André Almeida
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