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From: Jisheng Zhang <jszhang@kernel.org>
To: Conor Dooley <conor.dooley@microchip.com>
Cc: Yangyu Chen <cyy@cyyself.name>,
	linux-riscv@lists.infradead.org,
	Conor Dooley <conor+dt@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Samuel Holland <samuel.holland@sifive.com>,
	Anup Patel <anup.patel@wdc.com>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1 7/9] riscv: dts: add initial SpacemiT K1 SoC device tree
Date: Mon, 17 Jun 2024 21:31:17 +0800	[thread overview]
Message-ID: <ZnA6pZLkI2StP8Hh@xhacker> (raw)
In-Reply-To: <20240617-carat-poise-ee63ed6a224e@wendy>

On Mon, Jun 17, 2024 at 02:29:46PM +0100, Conor Dooley wrote:
> On Mon, Jun 17, 2024 at 08:49:57PM +0800, Jisheng Zhang wrote:
> > On Mon, Jun 17, 2024 at 01:20:52AM +0800, Yangyu Chen wrote:
> > > Banana Pi BPI-F3 motherboard is powered by SpacemiT K1[1].
> > > 
> > > Key features:
> > > - 4 cores per cluster, 2 clusters on chip
> > > - UART IP is Intel XScale UART
> > > 
> > > Some key considerations:
> > > - ISA string is inferred from vendor documentation[2]
> > > - Cluster topology is inferred from datasheet[1] and L2 in vendor dts[3]
> > > - No coherent DMA on this board
> > >     Inferred by taking vendor ethernet and MMC drivers to the mainline
> > >     kernel. Without dma-noncoherent in soc node, the driver fails.
> > > - No cache nodes now
> > >     The parameters from vendor dts are likely to be wrong. It has 512
> > >     sets for a 32KiB L1 Cache. In this case, each set is 64B in size.
> > >     When the size of the cache line is 64B, it is a directly mapped
> > >     cache rather than a set-associative cache, the latter is commonly
> > >     used. Thus, I didn't use the parameters from vendor dts.
> > > 
> > > Currently only support booting into console with only uart, other
> > > features will be added soon later.
> > 
> > Hi Yangyu,
> > 
> > Per recent practice of cv1800b and th1520 upstream, I think a complete
> > initial support would include pinctrl, clk and reset, I have received
> > the complains from the community. So can you please bring the pinctrl
> > clk  and reset at the same time?
> 
> What sort of complaints have you got? That the support is too minimal to
> be useful?

For example https://lore.kernel.org/linux-riscv/95c20c6c-66cd-4f87-920b-5da766317e19@sifive.com/

Now, I think it's better to "model the clocks/resets/other dependencies"
in the initial support. So lacking of pinctrl, clk and reset doesn't
fully describe the hardware.

_______________________________________________
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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Jisheng Zhang <jszhang@kernel.org>
To: Conor Dooley <conor.dooley@microchip.com>
Cc: Yangyu Chen <cyy@cyyself.name>,
	linux-riscv@lists.infradead.org,
	Conor Dooley <conor+dt@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Samuel Holland <samuel.holland@sifive.com>,
	Anup Patel <anup.patel@wdc.com>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1 7/9] riscv: dts: add initial SpacemiT K1 SoC device tree
Date: Mon, 17 Jun 2024 21:31:17 +0800	[thread overview]
Message-ID: <ZnA6pZLkI2StP8Hh@xhacker> (raw)
In-Reply-To: <20240617-carat-poise-ee63ed6a224e@wendy>

On Mon, Jun 17, 2024 at 02:29:46PM +0100, Conor Dooley wrote:
> On Mon, Jun 17, 2024 at 08:49:57PM +0800, Jisheng Zhang wrote:
> > On Mon, Jun 17, 2024 at 01:20:52AM +0800, Yangyu Chen wrote:
> > > Banana Pi BPI-F3 motherboard is powered by SpacemiT K1[1].
> > > 
> > > Key features:
> > > - 4 cores per cluster, 2 clusters on chip
> > > - UART IP is Intel XScale UART
> > > 
> > > Some key considerations:
> > > - ISA string is inferred from vendor documentation[2]
> > > - Cluster topology is inferred from datasheet[1] and L2 in vendor dts[3]
> > > - No coherent DMA on this board
> > >     Inferred by taking vendor ethernet and MMC drivers to the mainline
> > >     kernel. Without dma-noncoherent in soc node, the driver fails.
> > > - No cache nodes now
> > >     The parameters from vendor dts are likely to be wrong. It has 512
> > >     sets for a 32KiB L1 Cache. In this case, each set is 64B in size.
> > >     When the size of the cache line is 64B, it is a directly mapped
> > >     cache rather than a set-associative cache, the latter is commonly
> > >     used. Thus, I didn't use the parameters from vendor dts.
> > > 
> > > Currently only support booting into console with only uart, other
> > > features will be added soon later.
> > 
> > Hi Yangyu,
> > 
> > Per recent practice of cv1800b and th1520 upstream, I think a complete
> > initial support would include pinctrl, clk and reset, I have received
> > the complains from the community. So can you please bring the pinctrl
> > clk  and reset at the same time?
> 
> What sort of complaints have you got? That the support is too minimal to
> be useful?

For example https://lore.kernel.org/linux-riscv/95c20c6c-66cd-4f87-920b-5da766317e19@sifive.com/

Now, I think it's better to "model the clocks/resets/other dependencies"
in the initial support. So lacking of pinctrl, clk and reset doesn't
fully describe the hardware.

  reply	other threads:[~2024-06-17 13:45 UTC|newest]

Thread overview: 92+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-16 17:18 [PATCH v1 0/9] riscv: add initial support for SpacemiT K1 Yangyu Chen
2024-06-16 17:18 ` Yangyu Chen
2024-06-16 17:20 ` [PATCH v1 1/9] dt-bindings: vendor-prefixes: add spacemit Yangyu Chen
2024-06-16 17:20   ` Yangyu Chen
2024-06-18 15:46   ` Conor Dooley
2024-06-18 15:46     ` Conor Dooley
2024-06-16 17:20 ` [PATCH v1 2/9] dt-bindings: riscv: Add SpacemiT X60 compatibles Yangyu Chen
2024-06-16 17:20   ` Yangyu Chen
2024-06-18 15:45   ` Conor Dooley
2024-06-18 15:45     ` Conor Dooley
2024-06-16 17:20 ` [PATCH v1 3/9] dt-bindings: riscv: add SpacemiT K1 bindings Yangyu Chen
2024-06-16 17:20   ` Yangyu Chen
2024-06-16 18:42   ` Rob Herring (Arm)
2024-06-16 18:42     ` Rob Herring (Arm)
2024-06-18 15:45     ` Conor Dooley
2024-06-18 15:45       ` Conor Dooley
2024-06-16 17:20 ` [PATCH v1 4/9] dt-bindings: timer: Add SpacemiT K1 CLINT Yangyu Chen
2024-06-16 17:20   ` Yangyu Chen
2024-06-18 15:40   ` Conor Dooley
2024-06-18 15:40     ` Conor Dooley
2024-06-18 15:48     ` Yangyu Chen
2024-06-18 15:48       ` Yangyu Chen
2024-06-18 17:05       ` Conor Dooley
2024-06-18 17:05         ` Conor Dooley
2024-06-16 17:20 ` [PATCH v1 5/9] dt-bindings: interrupt-controller: Add SpacemiT K1 PLIC Yangyu Chen
2024-06-16 17:20   ` Yangyu Chen
2024-06-18 15:44   ` Conor Dooley
2024-06-18 15:44     ` Conor Dooley
2024-06-16 17:20 ` [PATCH v1 6/9] riscv: add SpacemiT SOC family Kconfig support Yangyu Chen
2024-06-16 17:20   ` Yangyu Chen
2024-06-16 22:26   ` Yixun Lan
2024-06-16 22:26     ` Yixun Lan
2024-06-17  2:12     ` Yangyu Chen
2024-06-17  2:12       ` Yangyu Chen
2024-06-16 23:06   ` Yixun Lan
2024-06-16 23:06     ` Yixun Lan
2024-06-17  2:12     ` Yangyu Chen
2024-06-17  2:12       ` Yangyu Chen
2024-06-16 17:20 ` [PATCH v1 7/9] riscv: dts: add initial SpacemiT K1 SoC device tree Yangyu Chen
2024-06-16 17:20   ` Yangyu Chen
2024-06-16 22:53   ` Yixun Lan
2024-06-16 22:53     ` Yixun Lan
2024-06-17  2:10     ` Yangyu Chen
2024-06-17  2:10       ` Yangyu Chen
2024-06-17  6:02       ` Yixun Lan
2024-06-17  6:02         ` Yixun Lan
2024-06-17  7:31     ` Conor Dooley
2024-06-17  7:31       ` Conor Dooley
2024-06-17 12:49   ` Jisheng Zhang
2024-06-17 12:49     ` Jisheng Zhang
2024-06-17 13:29     ` Conor Dooley
2024-06-17 13:29       ` Conor Dooley
2024-06-17 13:31       ` Jisheng Zhang [this message]
2024-06-17 13:31         ` Jisheng Zhang
2024-06-17 17:01         ` Yangyu Chen
2024-06-17 17:01           ` Yangyu Chen
2024-06-16 17:20 ` [PATCH v1 8/9] riscv: dts: spacemit: add Banana Pi BPI-F3 board " Yangyu Chen
2024-06-16 17:20   ` Yangyu Chen
2024-06-16 22:31   ` Yixun Lan
2024-06-16 22:31     ` Yixun Lan
2024-06-17  2:16     ` Yangyu Chen
2024-06-17  2:16       ` Yangyu Chen
2024-06-16 17:20 ` [PATCH v1 9/9] riscv: defconfig: enable SpacemiT SoC Yangyu Chen
2024-06-16 17:20   ` Yangyu Chen
2024-06-16 18:35 ` [PATCH v1 0/9] riscv: add initial support for SpacemiT K1 Conor Dooley
2024-06-16 18:35   ` Conor Dooley
2024-06-16 22:48   ` Yixun Lan
2024-06-16 22:48     ` Yixun Lan
2024-06-17  2:00     ` Yangyu Chen
2024-06-17  2:00       ` Yangyu Chen
2024-06-17  7:28       ` Conor Dooley
2024-06-17  7:28         ` Conor Dooley
2024-06-17  8:15       ` Icenowy Zheng
2024-06-17  8:15         ` Icenowy Zheng
2024-06-17 14:11     ` Jisheng Zhang
2024-06-17 14:11       ` Jisheng Zhang
2024-06-17 15:32       ` Conor Dooley
2024-06-17 15:32         ` Conor Dooley
2024-06-17 16:39         ` Yangyu Chen
2024-06-17 16:39           ` Yangyu Chen
2024-06-17 17:14           ` Conor Dooley
2024-06-17 17:14             ` Conor Dooley
2024-06-17 17:42             ` Yangyu Chen
2024-06-17 17:42               ` Yangyu Chen
2024-06-18  6:58               ` Conor Dooley
2024-06-18  6:58                 ` Conor Dooley
2024-06-18  4:39           ` Jisheng Zhang
2024-06-18  4:39             ` Jisheng Zhang
2024-06-18  4:34         ` Jisheng Zhang
2024-06-18  4:34           ` Jisheng Zhang
2024-06-18 10:16           ` Conor Dooley
2024-06-18 10:16             ` Conor Dooley

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