From: Charlie Jenkins <charlie@rivosinc.com>
To: Samuel Holland <samuel.holland@sifive.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
Catalin Marinas <catalin.marinas@arm.com>,
linux-kernel@vger.kernel.org, Anup Patel <anup@brainfault.org>,
Conor Dooley <conor@kernel.org>,
kasan-dev@googlegroups.com, Atish Patra <atishp@atishpatra.org>,
Evgenii Stepanov <eugenis@google.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
"Kirill A . Shutemov" <kirill.shutemov@linux.intel.com>
Subject: Re: [PATCH v4 03/10] riscv: Add CSR definitions for pointer masking
Date: Thu, 12 Sep 2024 18:16:20 -0700 [thread overview]
Message-ID: <ZuOSZPJLBUeoTMA9@ghost> (raw)
In-Reply-To: <20240829010151.2813377-4-samuel.holland@sifive.com>
On Wed, Aug 28, 2024 at 06:01:25PM -0700, Samuel Holland wrote:
> Pointer masking is controlled via a two-bit PMM field, which appears in
> various CSRs depending on which extensions are implemented. Smmpm adds
> the field to mseccfg; Smnpm adds the field to menvcfg; Ssnpm adds the
> field to senvcfg. If the H extension is implemented, Ssnpm also defines
> henvcfg.PMM and hstatus.HUPMM.
>
> Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Charlie Jenkins <charlie@rivosinc.com>
> ---
>
> (no changes since v3)
>
> Changes in v3:
> - Use shifts instead of large numbers in ENVCFG_PMM* macro definitions
>
> Changes in v2:
> - Use the correct name for the hstatus.HUPMM field
>
> arch/riscv/include/asm/csr.h | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h
> index 25966995da04..fe5d4eb9adea 100644
> --- a/arch/riscv/include/asm/csr.h
> +++ b/arch/riscv/include/asm/csr.h
> @@ -119,6 +119,10 @@
>
> /* HSTATUS flags */
> #ifdef CONFIG_64BIT
> +#define HSTATUS_HUPMM _AC(0x3000000000000, UL)
> +#define HSTATUS_HUPMM_PMLEN_0 _AC(0x0000000000000, UL)
> +#define HSTATUS_HUPMM_PMLEN_7 _AC(0x2000000000000, UL)
> +#define HSTATUS_HUPMM_PMLEN_16 _AC(0x3000000000000, UL)
> #define HSTATUS_VSXL _AC(0x300000000, UL)
> #define HSTATUS_VSXL_SHIFT 32
> #endif
> @@ -195,6 +199,10 @@
> /* xENVCFG flags */
> #define ENVCFG_STCE (_AC(1, ULL) << 63)
> #define ENVCFG_PBMTE (_AC(1, ULL) << 62)
> +#define ENVCFG_PMM (_AC(0x3, ULL) << 32)
> +#define ENVCFG_PMM_PMLEN_0 (_AC(0x0, ULL) << 32)
> +#define ENVCFG_PMM_PMLEN_7 (_AC(0x2, ULL) << 32)
> +#define ENVCFG_PMM_PMLEN_16 (_AC(0x3, ULL) << 32)
> #define ENVCFG_CBZE (_AC(1, UL) << 7)
> #define ENVCFG_CBCFE (_AC(1, UL) << 6)
> #define ENVCFG_CBIE_SHIFT 4
> @@ -216,6 +224,12 @@
> #define SMSTATEEN0_SSTATEEN0_SHIFT 63
> #define SMSTATEEN0_SSTATEEN0 (_ULL(1) << SMSTATEEN0_SSTATEEN0_SHIFT)
>
> +/* mseccfg bits */
> +#define MSECCFG_PMM ENVCFG_PMM
> +#define MSECCFG_PMM_PMLEN_0 ENVCFG_PMM_PMLEN_0
> +#define MSECCFG_PMM_PMLEN_7 ENVCFG_PMM_PMLEN_7
> +#define MSECCFG_PMM_PMLEN_16 ENVCFG_PMM_PMLEN_16
> +
> /* symbolic CSR names: */
> #define CSR_CYCLE 0xc00
> #define CSR_TIME 0xc01
> @@ -382,6 +396,8 @@
> #define CSR_MIP 0x344
> #define CSR_PMPCFG0 0x3a0
> #define CSR_PMPADDR0 0x3b0
> +#define CSR_MSECCFG 0x747
> +#define CSR_MSECCFGH 0x757
> #define CSR_MVENDORID 0xf11
> #define CSR_MARCHID 0xf12
> #define CSR_MIMPID 0xf13
> --
> 2.45.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
_______________________________________________
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WARNING: multiple messages have this Message-ID (diff)
From: Charlie Jenkins <charlie@rivosinc.com>
To: Samuel Holland <samuel.holland@sifive.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
Catalin Marinas <catalin.marinas@arm.com>,
linux-kernel@vger.kernel.org, Anup Patel <anup@brainfault.org>,
Conor Dooley <conor@kernel.org>,
kasan-dev@googlegroups.com, Atish Patra <atishp@atishpatra.org>,
Evgenii Stepanov <eugenis@google.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
"Kirill A . Shutemov" <kirill.shutemov@linux.intel.com>
Subject: Re: [PATCH v4 03/10] riscv: Add CSR definitions for pointer masking
Date: Thu, 12 Sep 2024 18:16:20 -0700 [thread overview]
Message-ID: <ZuOSZPJLBUeoTMA9@ghost> (raw)
In-Reply-To: <20240829010151.2813377-4-samuel.holland@sifive.com>
On Wed, Aug 28, 2024 at 06:01:25PM -0700, Samuel Holland wrote:
> Pointer masking is controlled via a two-bit PMM field, which appears in
> various CSRs depending on which extensions are implemented. Smmpm adds
> the field to mseccfg; Smnpm adds the field to menvcfg; Ssnpm adds the
> field to senvcfg. If the H extension is implemented, Ssnpm also defines
> henvcfg.PMM and hstatus.HUPMM.
>
> Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Charlie Jenkins <charlie@rivosinc.com>
> ---
>
> (no changes since v3)
>
> Changes in v3:
> - Use shifts instead of large numbers in ENVCFG_PMM* macro definitions
>
> Changes in v2:
> - Use the correct name for the hstatus.HUPMM field
>
> arch/riscv/include/asm/csr.h | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h
> index 25966995da04..fe5d4eb9adea 100644
> --- a/arch/riscv/include/asm/csr.h
> +++ b/arch/riscv/include/asm/csr.h
> @@ -119,6 +119,10 @@
>
> /* HSTATUS flags */
> #ifdef CONFIG_64BIT
> +#define HSTATUS_HUPMM _AC(0x3000000000000, UL)
> +#define HSTATUS_HUPMM_PMLEN_0 _AC(0x0000000000000, UL)
> +#define HSTATUS_HUPMM_PMLEN_7 _AC(0x2000000000000, UL)
> +#define HSTATUS_HUPMM_PMLEN_16 _AC(0x3000000000000, UL)
> #define HSTATUS_VSXL _AC(0x300000000, UL)
> #define HSTATUS_VSXL_SHIFT 32
> #endif
> @@ -195,6 +199,10 @@
> /* xENVCFG flags */
> #define ENVCFG_STCE (_AC(1, ULL) << 63)
> #define ENVCFG_PBMTE (_AC(1, ULL) << 62)
> +#define ENVCFG_PMM (_AC(0x3, ULL) << 32)
> +#define ENVCFG_PMM_PMLEN_0 (_AC(0x0, ULL) << 32)
> +#define ENVCFG_PMM_PMLEN_7 (_AC(0x2, ULL) << 32)
> +#define ENVCFG_PMM_PMLEN_16 (_AC(0x3, ULL) << 32)
> #define ENVCFG_CBZE (_AC(1, UL) << 7)
> #define ENVCFG_CBCFE (_AC(1, UL) << 6)
> #define ENVCFG_CBIE_SHIFT 4
> @@ -216,6 +224,12 @@
> #define SMSTATEEN0_SSTATEEN0_SHIFT 63
> #define SMSTATEEN0_SSTATEEN0 (_ULL(1) << SMSTATEEN0_SSTATEEN0_SHIFT)
>
> +/* mseccfg bits */
> +#define MSECCFG_PMM ENVCFG_PMM
> +#define MSECCFG_PMM_PMLEN_0 ENVCFG_PMM_PMLEN_0
> +#define MSECCFG_PMM_PMLEN_7 ENVCFG_PMM_PMLEN_7
> +#define MSECCFG_PMM_PMLEN_16 ENVCFG_PMM_PMLEN_16
> +
> /* symbolic CSR names: */
> #define CSR_CYCLE 0xc00
> #define CSR_TIME 0xc01
> @@ -382,6 +396,8 @@
> #define CSR_MIP 0x344
> #define CSR_PMPCFG0 0x3a0
> #define CSR_PMPADDR0 0x3b0
> +#define CSR_MSECCFG 0x747
> +#define CSR_MSECCFGH 0x757
> #define CSR_MVENDORID 0xf11
> #define CSR_MARCHID 0xf12
> #define CSR_MIMPID 0xf13
> --
> 2.45.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2024-09-13 1:16 UTC|newest]
Thread overview: 73+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-29 1:01 [PATCH v4 00/10] riscv: Userspace pointer masking and tagged address ABI Samuel Holland
2024-08-29 1:01 ` Samuel Holland
2024-08-29 1:01 ` [PATCH v4 01/10] dt-bindings: riscv: Add pointer masking ISA extensions Samuel Holland
2024-08-29 1:01 ` Samuel Holland
2024-09-13 1:08 ` Charlie Jenkins
2024-09-13 1:08 ` Charlie Jenkins
2024-08-29 1:01 ` [PATCH v4 02/10] riscv: Add ISA extension parsing for pointer masking Samuel Holland
2024-08-29 1:01 ` Samuel Holland
2024-09-13 1:09 ` Charlie Jenkins
2024-09-13 1:09 ` Charlie Jenkins
2024-08-29 1:01 ` [PATCH v4 03/10] riscv: Add CSR definitions " Samuel Holland
2024-08-29 1:01 ` Samuel Holland
2024-09-13 1:16 ` Charlie Jenkins [this message]
2024-09-13 1:16 ` Charlie Jenkins
2024-08-29 1:01 ` [PATCH v4 04/10] riscv: Add support for userspace " Samuel Holland
2024-08-29 1:01 ` Samuel Holland
2024-09-13 1:52 ` Charlie Jenkins
2024-09-13 1:52 ` Charlie Jenkins
2024-08-29 1:01 ` [PATCH v4 05/10] riscv: Add support for the tagged address ABI Samuel Holland
2024-08-29 1:01 ` Samuel Holland
2024-09-13 2:45 ` Charlie Jenkins
2024-09-13 2:45 ` Charlie Jenkins
2024-09-14 2:57 ` Samuel Holland
2024-09-14 2:57 ` Samuel Holland
2024-09-14 3:16 ` Charlie Jenkins
2024-09-14 3:16 ` Charlie Jenkins
2024-08-29 1:01 ` [PATCH v4 06/10] riscv: Allow ptrace control of " Samuel Holland
2024-08-29 1:01 ` Samuel Holland
2024-09-13 2:51 ` Charlie Jenkins
2024-09-13 2:51 ` Charlie Jenkins
2024-10-16 17:50 ` Samuel Holland
2024-10-16 17:50 ` Samuel Holland
2024-10-17 0:58 ` Charlie Jenkins
2024-10-17 0:58 ` Charlie Jenkins
2024-08-29 1:01 ` [PATCH v4 07/10] selftests: riscv: Add a pointer masking test Samuel Holland
2024-08-29 1:01 ` Samuel Holland
2024-09-13 2:54 ` Charlie Jenkins
2024-09-13 2:54 ` Charlie Jenkins
2024-08-29 1:01 ` [PATCH v4 08/10] riscv: hwprobe: Export the Supm ISA extension Samuel Holland
2024-08-29 1:01 ` Samuel Holland
2024-08-29 1:01 ` [PATCH v4 09/10] RISC-V: KVM: Allow Smnpm and Ssnpm extensions for guests Samuel Holland
2024-08-29 1:01 ` Samuel Holland
2024-09-04 12:17 ` Anup Patel
2024-09-04 12:17 ` Anup Patel
2024-09-04 14:31 ` Samuel Holland
2024-09-04 14:31 ` Samuel Holland
2024-09-04 14:31 ` Samuel Holland
2024-09-04 14:45 ` Anup Patel
2024-09-04 14:45 ` Anup Patel
2024-09-04 14:45 ` Anup Patel
2024-09-04 14:57 ` Samuel Holland
2024-09-04 14:57 ` Samuel Holland
2024-09-04 14:57 ` Samuel Holland
2024-09-04 15:20 ` Anup Patel
2024-09-04 15:20 ` Anup Patel
2024-09-04 15:20 ` Anup Patel
2024-09-04 15:55 ` Samuel Holland
2024-09-04 15:55 ` Samuel Holland
2024-09-04 15:55 ` Samuel Holland
2024-09-05 5:18 ` Anup Patel
2024-09-05 5:18 ` Anup Patel
2024-09-05 5:18 ` Anup Patel
2024-09-14 2:52 ` Samuel Holland
2024-09-14 2:52 ` Samuel Holland
2024-09-14 2:52 ` Samuel Holland
2024-08-29 1:01 ` [PATCH v4 10/10] KVM: riscv: selftests: Add Smnpm and Ssnpm to get-reg-list test Samuel Holland
2024-08-29 1:01 ` Samuel Holland
2024-09-04 12:22 ` Anup Patel
2024-09-04 12:22 ` Anup Patel
2024-09-04 12:32 ` [PATCH v4 00/10] riscv: Userspace pointer masking and tagged address ABI Anup Patel
2024-09-04 12:32 ` Anup Patel
2024-09-13 18:08 ` Charlie Jenkins
2024-09-13 18:08 ` Charlie Jenkins
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